EP1039487A2 - Auf einem Substrat aufgebaute Schichtenfolge in Dünnschichttechnologie - Google Patents
Auf einem Substrat aufgebaute Schichtenfolge in Dünnschichttechnologie Download PDFInfo
- Publication number
- EP1039487A2 EP1039487A2 EP00103863A EP00103863A EP1039487A2 EP 1039487 A2 EP1039487 A2 EP 1039487A2 EP 00103863 A EP00103863 A EP 00103863A EP 00103863 A EP00103863 A EP 00103863A EP 1039487 A2 EP1039487 A2 EP 1039487A2
- Authority
- EP
- European Patent Office
- Prior art keywords
- layer
- layer sequence
- sequence according
- substrate
- adjustment
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/06—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base
- H01C17/075—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base by thin-film techniques
- H01C17/12—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base by thin-film techniques by sputtering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/22—Apparatus or processes specially adapted for manufacturing resistors adapted for trimming
- H01C17/24—Apparatus or processes specially adapted for manufacturing resistors adapted for trimming by removing or adding resistive material
- H01C17/242—Apparatus or processes specially adapted for manufacturing resistors adapted for trimming by removing or adding resistive material by laser
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S428/00—Stock material or miscellaneous articles
- Y10S428/922—Static electricity metal bleed-off metallic stock
- Y10S428/9335—Product by special process
- Y10S428/934—Electrical process
- Y10S428/935—Electroplating
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S428/00—Stock material or miscellaneous articles
- Y10S428/922—Static electricity metal bleed-off metallic stock
- Y10S428/9335—Product by special process
- Y10S428/938—Vapor deposition or gas diffusion
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/12—All metal or with adjacent metals
- Y10T428/12389—All metal or with adjacent metals having variation in thickness
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/12—All metal or with adjacent metals
- Y10T428/12486—Laterally noncoextensive components [e.g., embedded, etc.]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/12—All metal or with adjacent metals
- Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
- Y10T428/12639—Adjacent, identical composition, components
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/12—All metal or with adjacent metals
- Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
- Y10T428/12771—Transition metal-base component
- Y10T428/12861—Group VIII or IB metal-base component
- Y10T428/12896—Ag-base component
Definitions
- the invention is based on the genus, as in independent claim 1 specified.
- the subject of the application with the features of claim 1 has the following advantage:
- the selected layer structure in thin-film technology can minimize contamination during laser ablation.
- a sputtered adhesive layer 2 with a thickness of a few 10 nm.
- Resistor layer 3 with a thickness in the same Order of magnitude applied.
- a gold layer 4 also sputtered with the conductive layer a thickness in the range between about 200 nm and 400 nm.
- Reinforcement layer another about 2 - 10 microns thick Gold layer 5, which is by electrodeposition, chemical amplification or physical (e.g. Dusting, rolling) was generated.
- the smaller layer thickness increases the Surface resistance of the remaining layer, and thus the power losses increase. At high frequencies however, this increase is small because of the skin effect the current can hardly penetrate a conductor and only in a thin layer flows in the conductor surface.
- the Current losses are proportional to the prevailing Current density.
- the increase in losses due to the thinner The guiding layer can be minimized in that the Adjustment ranges, if possible in terms of circuitry, in Areas are attached in which no or only one low current flows, for example at the end of one open line.
- the adjustment ranges in the generally small compared to the overall ladder structure. Hence the local increase in sheet resistance little impact on the losses of the whole Ladder structure.
- Figures 2 and 3 show a chip capacitor on its top and bottom surfaces are metallized. Becomes now a part on the top in an adjustment area 6 only a thin metallic coating on the surface, so these are compared. Part 7 of the top with normal layering is used to connect the upper capacitor side by means of bond wire 8. With 9 is a solder or adhesive connection on the substrate 1 designated.
- Figure 4 shows the schematic representation of a ceramic Multilayer capacitor in SMD technology with its Contact surfaces 11 and 12 for gluing or soldering.
- Adjustment area 19 only thinly metallized.
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Plasma & Fusion (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
- Physical Vapour Deposition (AREA)
Abstract
Description
Beim Laserabtrag von 3 - 5 µm dicken Goldschichten, wie sie in der Dünnschichttechnologie oft verwendet werden, entstehen in der Nähe des Abgleichpunktes goldhaltige Ablagerungen mit Partikelgrößen bis zu einigen 10 µm. Diese sind sehr problematisch, da in der Dünnschichttechnologie oftmals mit offenen Halbleitern (z.B. Transistoren mit 0,25 µm Gatestrukturen) gearbeitet wird, die Verschmutzungen gegenüber sehr empfindlich sind. Da es sich meistens um einen Funktionsabgleich mit vollständig bestückten Aufbauten handelt, ist eine Reinigung zur Beseitigung der Abgleichrückstände nur in Sonderfällen möglich. Durch eine Absaugung während des Abgleiches kann nur eine teilweise Reduzierung der abgelagerten Partikel erreicht werden.
Durch den gewählten Schichtaufbau in Dünnschichttechnologie können Verschmutzungen beim Laserabtrag minimiert werden. Das zeigen folgende Überlegungen:
Schematisch ist gezeigt in
Claims (8)
- Auf einem Substrat (1) aufgebaute Schichtenfolge in Dünnschichttechnologie mit einer gesputterten, elektrischen Leitschicht (4), die durch eine ebenfalls elektrisch leitende Verstärkungeschicht (5) verstärkt ist, welche mit einem anderen Verfahren auf der Leitschicht (4) aufgebracht ist,
dadurch gekennzeichnet, dass die Leitschicht (4) in einem Abgleichbereich (6, 10, 14, 16, 17, 19) weniger bis überhaupt nicht durch die Verstärkungsschicht (5) verstärkt ist. - Schichtenfolge nach Anspruch 1, dadurch gekennzeichnet, dass die Leitschicht (4) aus Gold besteht.
- Schichtenfolge nach Anspruch 1 oder 2, dadurch gekennzeichnet, dass die Verstärkungsschicht (5) aus Gold besteht.
- Schichtenfolge nach einem der vorangehenden Ansprüche, dadurch gekennzeichnet, dass sich der Abgleichbereich (14, 16, 17) in einem Bereich verringerter Stromstärke befindet.
- Schichtenfolge nach Anspruch 4, dadurch gekennzeichnet, dass dass sich der Abgleichbereich (14) am Ende einer offenen Leitung (13) befindet.
- Schichtenfolge nach einem der vorangehenden Ansprüche, dadurch gekennzeichnet, dass die Leitschicht an einer Kontaktfläche (11, 12) stärker verstärkt ist als im Abgleichbereich (10).
- Schichtenfolge nach einem der vorangehenden Ansprüche, dadurch gekennzeichnet, dass sich der Abgleichbereich (6, 10, 14, 16, 17, 19) an der Seite befindet, die dem Substrat (1) gegenüber liegt.
- Schichtenfolge nach einem der vorangehenden Ansprüche, dadurch gekennzeichnet, dass auf der gesamten Leitschicht (10) auf die Verstärkungsschicht verzichtet ist.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19913466A DE19913466A1 (de) | 1999-03-25 | 1999-03-25 | Auf einem Substrat aufgebaute Schichtenfolge in Dünnschichttechnologie |
| DE19913466 | 1999-03-25 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| EP1039487A2 true EP1039487A2 (de) | 2000-09-27 |
| EP1039487A3 EP1039487A3 (de) | 2004-01-02 |
| EP1039487B1 EP1039487B1 (de) | 2007-05-09 |
Family
ID=7902319
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP00103863A Expired - Lifetime EP1039487B1 (de) | 1999-03-25 | 2000-02-24 | Auf einem Substrat aufgebaute Schichtenfolge in Dünnschichttechnologie zum Abgleich einer elektronischen Schaltung |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US7018720B1 (de) |
| EP (1) | EP1039487B1 (de) |
| AT (1) | ATE362186T1 (de) |
| DE (2) | DE19913466A1 (de) |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3556951A (en) * | 1967-08-04 | 1971-01-19 | Sylvania Electric Prod | Method of forming leads on semiconductor devices |
| DE2409312C3 (de) * | 1974-02-27 | 1981-01-08 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Halbleiteranordnung mit einer auf der Halbleiteroberfläche angeordneten Metallschicht und Verfahren zu ihrer Herstellung |
| US4301439A (en) * | 1978-12-26 | 1981-11-17 | Electro Materials Corp. Of America | Film type resistor and method of producing same |
| US4338506A (en) * | 1979-09-07 | 1982-07-06 | Motorola, Inc. | Method of trimming thick film capacitor |
| US4288530A (en) * | 1979-10-15 | 1981-09-08 | Motorola, Inc. | Method of tuning apparatus by low power laser beam removal |
| US4357395A (en) * | 1980-08-22 | 1982-11-02 | General Electric Company | Transfer lamination of vapor deposited foils, method and product |
| US4626822A (en) * | 1985-05-02 | 1986-12-02 | Motorola, Inc. | Thick film resistor element with coarse and fine adjustment provision |
| JPH0678590B2 (ja) * | 1988-09-19 | 1994-10-05 | パイオニア株式会社 | スタンパー製造方法 |
| US5167776A (en) * | 1991-04-16 | 1992-12-01 | Hewlett-Packard Company | Thermal inkjet printhead orifice plate and method of manufacture |
| US5261593A (en) * | 1992-08-19 | 1993-11-16 | Sheldahl, Inc. | Direct application of unpackaged integrated circuit to flexible printed circuit |
| US5374792A (en) * | 1993-01-04 | 1994-12-20 | General Electric Company | Micromechanical moving structures including multiple contact switching system |
| DE19821382A1 (de) | 1998-05-13 | 1999-11-25 | Bosch Gmbh Robert | Verfahren zum Abgleichen der Resonanzfrequenz eines Ringresonators |
-
1999
- 1999-03-25 DE DE19913466A patent/DE19913466A1/de not_active Withdrawn
-
2000
- 2000-02-24 DE DE50014312T patent/DE50014312D1/de not_active Expired - Lifetime
- 2000-02-24 AT AT00103863T patent/ATE362186T1/de not_active IP Right Cessation
- 2000-02-24 EP EP00103863A patent/EP1039487B1/de not_active Expired - Lifetime
- 2000-03-21 US US09/532,144 patent/US7018720B1/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| DE19913466A1 (de) | 2000-09-28 |
| DE50014312D1 (de) | 2007-06-21 |
| EP1039487B1 (de) | 2007-05-09 |
| EP1039487A3 (de) | 2004-01-02 |
| ATE362186T1 (de) | 2007-06-15 |
| US7018720B1 (en) | 2006-03-28 |
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