EP0991088A1 - Multilayer type chip inductor - Google Patents

Multilayer type chip inductor Download PDF

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Publication number
EP0991088A1
EP0991088A1 EP99119524A EP99119524A EP0991088A1 EP 0991088 A1 EP0991088 A1 EP 0991088A1 EP 99119524 A EP99119524 A EP 99119524A EP 99119524 A EP99119524 A EP 99119524A EP 0991088 A1 EP0991088 A1 EP 0991088A1
Authority
EP
European Patent Office
Prior art keywords
shielding
sheets
sheet
chip inductor
type chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP99119524A
Other languages
German (de)
English (en)
French (fr)
Inventor
Nam Kee Kang
In Shig Park
Wook Lim
Chan Sei Yoo
Jong Dae Kim
Hyun Jong Ko
Sang Cheol Kim
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pilkor Electronics Ltd
Korea Electronics Technology Institute
Original Assignee
Pilkor Electronics Ltd
Korea Electronics Technology Institute
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pilkor Electronics Ltd, Korea Electronics Technology Institute filed Critical Pilkor Electronics Ltd
Publication of EP0991088A1 publication Critical patent/EP0991088A1/en
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00—Fixed inductances of the signal type 
    • H01F17/0006—Printed inductances
    • H01F17/0013—Printed inductances with stacked layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00—Fixed inductances of the signal type 
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00—Details of transformers or inductances, in general
    • H01F27/34—Special means for preventing or reducing unwanted electric or magnetic effects, e.g. no-load losses, reactive currents, harmonics, oscillations, leakage fields
    • H01F27/36—Electric or magnetic shields or screens
    • H01F27/363—Electric or magnetic shields or screens made of electrically conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00—Details of transformers or inductances, in general
    • H01F27/34—Special means for preventing or reducing unwanted electric or magnetic effects, e.g. no-load losses, reactive currents, harmonics, oscillations, leakage fields
    • H01F27/36—Electric or magnetic shields or screens

Definitions

  • the present invention relates to a chip inductor; and, more particularly, to a multilayer type chip inductor capable of preventing electromagnetic waves generated thereby from being emitted.
  • a multilayer type chip inductor is comprised of a stack of the sheets made of a ferrite or a dielectric material, having respective coil patterned conductors formed thereon, and connected electrically by the through holes in series with each other in a substantially zigzag fashion.
  • Such a multilayer type chip inductor is used, for example, for suppressing noise or making a LC resonance circuit.
  • FIG. 1 An exploded view of the conventional multilayer type chip inductor.
  • the conventional multilayer type chip inductor includes a pair of first cover plates 1, a pair of second cover plates 5, a first and a second outermost sheets 10, 20 having a generally rectangular shape, and a first, a second, a third intermediate sheets 30, 40, 50 stacked one above the other and interposed between the outermost sheets 10, 20.
  • the cover plates and the sheets 1, 5, 10, 20, 30, 40, 50 are made of the ferrite or the dielectric material.
  • the first outermost sheet 10 is formed with a first electric terminal pattern 12.
  • the electric terminal pattern 12 has a lateral strip portion 14 extending along a shorter side of the first outermost sheet 10 for electric connection with an end cap or like terminal member (not shown), a coiled portion 16 at a general central portion of the first outermost sheet 10, and a connecting portion 18 for connecting the lateral strip portion 14 with the coiled portion 16.
  • the second outermost sheet 20 is formed with a second electric terminal pattern 22 having a lateral strip portion 24, a coiled portion 26 and a connecting portion 28.
  • the second outermost sheet 20 has a first through hole 29 at a free end of the coiled portion 26 thereof.
  • the first through hole 29 is formed by perforating the second outermost sheet 20 and filled with a conductive material for establishing an electrical connection with neighboring pattern, as will be described later.
  • the first, the second, the third intermediate sheets 30, 40, 50 are, respectively, formed with a first, a second, a third coiled electric conductor patterns 32, 42, 52.
  • the first conductor pattern 32 has a perforated ends 32a and a non-perforated end 32b.
  • the second and the third conductor patterns 42, 52 have a perforated and a non-perforated ends 42a, 42b and a perforated and a non-perforated ends 52a, 52b, respectively.
  • the perforated ends 32a, 42a, 52a are, respectively, formed with a second, a third, a fourth via holes 34, 44, 54.
  • Each of the via holes 34, 44, 54 is formed by perforating the respective intermediate sheets 30, 40, 50 and filled with a conductive material for establishing an electrical connection with neighboring patterns, as will be described later.
  • the first outermost sheet 10 is positioned in a lowermost location.
  • the first intermediate sheet 30 is disposed above the first outermost sheet 10 in such a way that the perforated end 32a thereof is aligned with a free end of the first electric terminal pattern 12 of the first outermost sheet 10 and the first coiled electric conductor pattern 32 thereof is electrically connected with the first electric terminal pattern 12 of the first outermost sheet 10 through the second via hole 34 thereof.
  • the second intermediate sheet 40 is installed above the first intermediate sheet 30 in such a way that the perforated end 42a and the non-perforated ends 42b thereof are, respectively, aligned with the non-perforated end 32b and perforated end 32a of the first intermediate sheet 30 and the second electric conductor pattern 42 thereof is electrically connected with the first electric conductor pattern 32 of the first intermediate sheet 30 through the third via hole 44 thereof.
  • the third intermediate sheet 50 is installed above the second intermediate sheet 40 in such a way that the perforated end 52a and the non-perforated ends 52b thereof are, respectively, aligned with the non-perforated end 42b and perforated end 42a of the second intermediate sheer 40 and the third electric conductor pattern 52 thereof is electrically connected with the second electric conductor pattern 42 of the second intermediate sheet 40 through the fourth via hole 54 thereof.
  • the second outermost sheet 20 is disposed on the third intermediate sheet 50 in such a way that the free end of the second electric terminal pattern 22 thereof is aligned with the non-perforated end 52b of the third electric conductor pattern 52 of the third intermediate sheet 50 and the second electric terminal pattern 22 thereof is electrically connected with the third coiled electric conductor pattern 52 of the third intermediate sheet 50 through the first via hole 29 thereof through via holes 29, 34, 44, 54.
  • the forgoing arrangement allows the sheets 10, 20, 30, 40, 50 to be electrically connected with each other.
  • the first and the second cover plates 1, 5 are, respectively, installed below the first outermost sheet 10 and above the second outermost sheet 20.
  • a multilayer type chip inductor having a pair of outermost sheets and a plurality of intermediate sheets stacked between the outermost sheets, the inductor comprising a pair of shielding sheets each of which has a shielding pattern for shielding electromagnetic waves.
  • a first preferred embodiment of the present invention includes a pair of first cover plates 101, a pair of second cover plates 105, a first and a second shielding sheets 160, 170, a first and a second outermost sheets 110, 120 having a generally rectangular shape, and a first, a second, a third intermediate sheets 130, 140, 150 stacked one above the other and interposed between the outermost sheets 110, 120.
  • the cover plates and the sheets 101, 105, 110, 120, 130, 140, 150, 160, 170 are made of a ferrite or a dielectric material.
  • the first outermost sheet 110 is formed with a first electric terminal pattern 112.
  • the electric terminal pattern 112 has a lateral strip portion 114 extending along a shorter side of the first outermost sheet 110 for electric connection with an end cap or like terminal member (not shown), a coiled portion 116 at a general central portion of the first outermost sheet 110, and a connecting portion 118 for connecting the lateral strip portion 114 with the coiled portion 116.
  • the second outermost sheet 120 is formed with a second electric terminal pattern 122 having a lateral strip portion 124, a coiled portion 126 and a connecting portion 128.
  • the second outermost sheet 120 has a first through hole 129 at a free end of the coiled portion 126 thereof.
  • the first through hole 129 is formed by perforating the second outermost sheet 120 and filled with a conductive material for establishing an electrical connection with neighboring pattern, as will be described later.
  • the first, the second, the third intermediate sheets 130, 140, 150 are, respectively, formed with a first, a second, a third coiled electric conductor patterns 132, 142, 152.
  • the first conductor pattern 132 has a perforated ends 132a and a non-perforated end 132b.
  • the second and the third conductor patterns 142, 152 have a perforated and a non-perforated ends 142a, 142b and a perforated and a non-perforated ends 152a, 152b, respectively.
  • the perforated ends 132a, 142a, 152a are, respectively, formed with a second, a third, a fourth via holes 134, 144, 154.
  • Each of the via holes 134, 144, 154 is formed by perforating the respective intermediate sheets 130, 140, 150 and filled with a conductive material for establishing an electrical connection with neighboring patterns, as will be described later.
  • the first and the second shielding sheets 160, 170 for shielding electromagnetic waves caused by the inductor are, respectively, formed with a first and a second shielding patterns 165, 175.
  • Each of the shielding patterns 165, 175 has, for example, a rectangular shape.
  • each of the shielding patterns 165, 175 extends from a shorter side of each of the shielding sheet 160, 170 toward an opposite shorter side thereof.
  • the first and the second shielding sheets 160, 170 are, respectively, interposed between the first cover plates 101 and between the second cover plates 105 so as to prevent electromagnetic waves generated by the inductor from being emitted.
  • the first outermost sheet 110 is positioned immediately above the first cover plates 101.
  • the first intermediate sheet 130 is disposed above the first outermost sheet 110 in such a way that the perforated end 132a thereof is aligned with a free end of the first electric terminal pattern 112 of the first outermost sheet 110 and the first coiled electric conductor pattern 132 thereof is electrically connected with the first electric terminal pattern 112 of the first outermost sheet 110 through the second via hole 134 thereof.
  • the second intermediate sheet 140 is installed above the first intermediate sheet 130 in such a way that the perforated end 142a and the non-perforated ends 142b thereof are, respectively, aligned with the non-perforated end 132b and perforated end 132a of the first intermediate sheet 130 and the second electric conductor pattern 142 thereof is electrically connected with the first electric conductor pattern 132 of the first intermediate sheet 130 through the third via hole 144 thereof.
  • the third intermediate sheet 150 is installed above the second intermediate sheet 140 in such a way that the perforated end and 152a the non-perforated ends 152a, 152b thereof are, respectively, aligned with the non-perforated end 142b and perforated end 142a of the second intermediate sheet 140 and the third electric conductor pattern 152 thereof is electrically connected with the second electric conductor pattern 142 of the second intermediate sheet 140 through the fourth via hole 154 thereof.
  • the second outermost sheet 120 is disposed on the third intermediate sheet 150 in such a way that the free end of the second electric terminal pattern 122 thereof is aligned with the non-perforated end 152b of the third electric conductor pattern 152 of the third intermediate sheet 150 and the second electric terminal pattern 122 thereof is electrically connected with the third coiled electric conductor pattern 152 of the third intermediate sheet 50 through the first via hole 129 thereof.
  • the forgoing arrangement allows the sheets 110, 120, 130, 140, 150 to be electrically connected with each other through via holes 129, 134, 144, 154.
  • the first cover plates 101 between which the first shielding sheet 160 is interposed and the second cover plates 105 between which the second shielding sheet 170 is interposed are, respectively, installed below the first outermost sheet 110 and above the second outermost sheet 120.
  • the second shielding sheet 170 is positioned in such a way that, when the second shielding sheet 170 is turned 180° on an imaginary plane parallel thereto, the second shielding pattern 175 thereof is aligned with the first shielding pattern 165 of the first shielding sheet 160. This protects the inductor from the external influences, preventing electromagnetic waves generated thereby from being emitted.
  • This embodiment is similar to the first one, except that a pair of shielding patterns 265, 275 are positioned at a central portion of each of the shielding sheets 160, 170. To be more specific, the shielding patterns 265, 275 are not contacted with the sides of the shielding sheets 160, 170.
  • This embodiment is similar to the first one, except that a pair of shielding patterns 365, 375 are, respectively, divided into two portions 365a, 365b and 375a, 375b.
  • One portion 365a of the shielding pattern 365 extends from one shorter side of the shielding sheet 160 and terminates at a generally intermediate portion of a longer side of the shielding sheet 160
  • the other portion 365b of the shielding pattern 365 extends from an opposite shorter side of the shielding sheet 160 and terminates at a generally intermediate portion of the longer side of the shielding sheet 160.
  • the portions 375a, 375b have an identical shape as that of the portions 365a, 365b.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Coils Or Transformers For Communication (AREA)
EP99119524A 1998-10-02 1999-10-01 Multilayer type chip inductor Withdrawn EP0991088A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR9841680 1998-10-02
KR1019980041680A KR100279729B1 (ko) 1998-10-02 1998-10-02 적층형 칩 인덕터

Publications (1)

Publication Number Publication Date
EP0991088A1 true EP0991088A1 (en) 2000-04-05

Family

ID=19553125

Family Applications (1)

Application Number Title Priority Date Filing Date
EP99119524A Withdrawn EP0991088A1 (en) 1998-10-02 1999-10-01 Multilayer type chip inductor

Country Status (2)

Country Link
EP (1) EP0991088A1 (ko)
KR (1) KR100279729B1 (ko)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1304707A3 (en) * 2001-10-19 2003-05-14 Broadcom Corporation Multiple layer inductor and method of making the same
US20150316937A1 (en) * 2013-01-28 2015-11-05 Shimadzu Corporation Gas pressure controller
CN106935360A (zh) * 2008-07-15 2017-07-07 株式会社村田制作所 电子元器件

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100392259B1 (ko) * 2001-05-29 2003-07-22 한국전자통신연구원 전자기파 차폐형 매몰 인덕터 및 그 제작방법
KR101148369B1 (ko) * 2010-10-21 2012-05-21 삼성전기주식회사 적층형 칩 부품 및 그 제조방법
WO2018169206A1 (ko) * 2017-03-14 2018-09-20 엘지이노텍(주) 무선 충전 장치

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4916582A (en) * 1988-12-20 1990-04-10 Murata Manufacturing Co., Ltd. Electronic component and its production method
US5250923A (en) * 1992-01-10 1993-10-05 Murata Manufacturing Co., Ltd. Laminated chip common mode choke coil
US5392019A (en) * 1991-11-28 1995-02-21 Murata Manufacturing Co., Ltd. Inductance device and manufacturing process thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4916582A (en) * 1988-12-20 1990-04-10 Murata Manufacturing Co., Ltd. Electronic component and its production method
US5392019A (en) * 1991-11-28 1995-02-21 Murata Manufacturing Co., Ltd. Inductance device and manufacturing process thereof
US5250923A (en) * 1992-01-10 1993-10-05 Murata Manufacturing Co., Ltd. Laminated chip common mode choke coil

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1304707A3 (en) * 2001-10-19 2003-05-14 Broadcom Corporation Multiple layer inductor and method of making the same
US6847282B2 (en) 2001-10-19 2005-01-25 Broadcom Corporation Multiple layer inductor and method of making the same
US7026904B2 (en) 2001-10-19 2006-04-11 Broadcom Corporation Multiple layer inductor and method of making the same
CN106935360A (zh) * 2008-07-15 2017-07-07 株式会社村田制作所 电子元器件
US20150316937A1 (en) * 2013-01-28 2015-11-05 Shimadzu Corporation Gas pressure controller

Also Published As

Publication number Publication date
KR20000024888A (ko) 2000-05-06
KR100279729B1 (ko) 2001-03-02

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