EP0981203A1 - Source de courant contrôlée à commutation accélérée - Google Patents
Source de courant contrôlée à commutation accélérée Download PDFInfo
- Publication number
- EP0981203A1 EP0981203A1 EP99202607A EP99202607A EP0981203A1 EP 0981203 A1 EP0981203 A1 EP 0981203A1 EP 99202607 A EP99202607 A EP 99202607A EP 99202607 A EP99202607 A EP 99202607A EP 0981203 A1 EP0981203 A1 EP 0981203A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- output
- current
- transistor
- charge pump
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000010287 polarization Effects 0.000 claims description 8
- 238000006243 chemical reaction Methods 0.000 claims description 4
- 238000001914 filtration Methods 0.000 claims description 4
- 230000009466 transformation Effects 0.000 claims description 3
- 230000001105 regulatory effect Effects 0.000 claims description 2
- 239000013256 coordination polymer Substances 0.000 description 21
- 230000010355 oscillation Effects 0.000 description 9
- 230000003071 parasitic effect Effects 0.000 description 7
- 101000685663 Homo sapiens Sodium/nucleoside cotransporter 1 Proteins 0.000 description 5
- 102100023116 Sodium/nucleoside cotransporter 1 Human genes 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 239000013641 positive control Substances 0.000 description 3
- 230000004075 alteration Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 238000012937 correction Methods 0.000 description 2
- 235000021183 entrée Nutrition 0.000 description 2
- 241001080024 Telles Species 0.000 description 1
- 241000219422 Urtica Species 0.000 description 1
- 235000009108 Urtica dioica Nutrition 0.000 description 1
- 230000002238 attenuated effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000013642 negative control Substances 0.000 description 1
- 230000002688 persistence Effects 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/22—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the bipolar type only
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
Definitions
- Such sources of current are frequently used to construct charge pumps for supplying current pulses to control a charge or a discharge of capacitive elements in phase locked loops operating a frequency control of a signal delivered by a voltage controlled oscillator.
- Such a loop with phase locking is described in particular in European patent application No. 0 670 629 A1.
- the charge pump included in this loop implements current sources of the type described in the introductory paragraph, in which the transistors of power are PNP type, their bases, transmitters and collectors respectively constituting polarization, reference, and transfer terminals. These power transistors are polarized by means of an emitter current permanently delivered by a positive terminal power supply, their conduction being operated by the control module by means of a adequate base voltage when the control signal instructs the module to control. The power transistors then conduct the bias current from their transmitters to their collectors, and to the output of the controlled current source.
- the power transistors must be turned on very quickly, especially when the frequency of the oscillator output signal is high, for example of the order of GigaHertz, the so-called switching frequency with which the power transistors pass from a blocked state to a saturated state, being able then are of the order of the MegaHertz.
- the value of the current delivered by the controlled current source when it is in conduction called nominal value, is often important. This leads to using, for realize each controlled current source, several transistors whose dimensions are large in front of those of the other transistors included in the phase-locked loop.
- One of the aims of the invention is to remedy to a large extent these disadvantages, by proposing a controlled current source within which the influence of parasitic capacitances of the power transistors is considerably minimized.
- a controlled current source conforming to the introductory paragraph is characterized according to the invention in that the reference terminals of the power transistors are connected together to the output of the control module intended to deliver a current whose value depends on the value of the control signal, the bias terminals of the transistors of power being subjected permanently, when the current source is in operation, at a voltage of predetermined value making it possible to render said transistors potentially conductive power.
- the bias voltage applied at the bias terminals of the power transistors somehow performs preloading parasitic capacitances of said transistors and makes these transistors potentially conductors. It will then suffice to present a current at their reference terminals so that they become effectively conductive, almost instantly.
- parasitic capacities being preloaded they are not subject to discontinuities of voltage, unlike what occurs in the known controlled current source. The changes in the shape of the output current of the controlled current source due to switching of the power transistors are therefore considerably attenuated in the controlled current source according to the invention.
- a controlled current source such as described above is characterized in that the control module comprises a first and a second transistor forming a first differential pair, and intended to receive on their polarization terminals the control signal, and a third transistor whose path main current is arranged, in series with a first resistance, between a positive terminal supply and output of the control module, the transfer terminal of the first transistor being connected to the positive supply terminal, the transfer terminal of the second transistor being connected to the positive supply terminal via a second resistor, on the one hand, and to the bias terminal of the third transistor, on the other hand.
- This embodiment is advantageous by its simplicity, using a number limited components. Furthermore, it will be demonstrated in the following presentation that the value nominal output current of such a controlled current source directly depends on the value of the first resistance, which allows easy calibration of said output current of source.
- control module further includes a fourth and a fifth transistor, forming a second pair differential, and intended to receive on their polarization terminals a so-called selection signal, the transfer terminal of the fourth transistor being connected to the positive supply terminal, the transfer terminal of the fifth transistor being connected to the positive supply terminal via a voltage regulating element, on the one hand, and to the bias terminal of the third transistor via a third resistor, on the other hand.
- the element voltage regulator consists of a diode.
- the invention therefore also relates to a charge pump, provided with two control inputs intended to receive control signals, and an output intended to deliver a current output whose direction and value depend on the values of the control signals, characterized in that it comprises a first and a second controlled current source as described above, whose command inputs constitute the inputs of charge pump control, the outputs of the first and second current sources being connected to the first and second branches of a current mirror, the output of one of the current sources being further connected to the output of the charge pump.
- such a charge pump comprises in in addition to a so-called drainage current source, intended to flow continuously, when the charge pump is operating, a current whose nominal value is negligible before the maximum value of the charge pump output current, the current source of drainage being arranged between that of the outputs of the first and second current sources which is not connected to the output of the charge pump, and a negative supply terminal.
- Drainage current source allows evacuation of electrical charges stored in transistors constituting the current mirror, which prevents a current of parasitic leak does not appear in one of the branches of said current mirror to evacuate these charges to the negative supply terminal, after the conduction of the first source of current will have been interrupted. Such a leakage current would cause the persistence of a current negative at the outlet of the charge pump, a phenomenon which is all the more unacceptable as the charge pump switching frequency is high.
- Such a charge pump can advantageously be implemented in a phase locked loop.
- Such loops are commonly used to operate frequency conversions in receivers of radio signals, such as, for example, televisions or radiotelephones.
- the invention therefore also relates to a device for receiving radio signals, comprising an antenna and filtering system allowing the reception of a signal whose frequency is selected within a given frequency range, and its transformation into a signal.
- apparatus in which a frequency conversion, from the selected frequency to a predetermined intermediate frequency, is carried out by means of a mixer intended to receive the radio signal, on the one hand, and an output signal of a local oscillator whose frequency is determined by the value of an adjustment voltage, on the other hand, apparatus further comprising a phase / frequency detector intended to compare the frequency of the output signal of the oscillator with that of a reference signal and to deliver control signals to a charge pump, the values of which depend on the result of said comparison, the s nettle of the charge pump being connected to a capacity intended to generate at its terminals the adjustment voltage, device characterized in that the charge pump is as described above.
- the power transistors are bipolar PNP type transistors. Their reference terminals, transfer terminals and polarization terminals are respectively constituted by their transmitters, collectors and bases.
- the emitters of the power transistors are connected together to the output of the control module CNTi, their bases being permanently subjected, when the current source CSi is in operation, to a predetermined voltage VCC-3.Vd.
- This voltage is generated by means of the assembly of three diodes D1i, D2i and D3i, arranged in series with a resistor Rdi, between a positive supply terminal VCC and a negative supply terminal GND, which may be materialized by the circuit mass.
- the voltage generated by the three diodes D1i, D2i and D3i is equal to 3.Vd, where Vd is the threshold voltage of a diode.
- the emitter-base voltage of the power transistors is equal to 3Vd-Vcnti, where Vcnti represents a voltage drop generated by the control module CNTi.
- the components constituting the controlled current source CSi can easily be dimensioned so that 3Vd-Vcnti> Veb th, where Veb th represents the minimum value which the emitter-base voltage of the transistors must take power so that they can drive.
- the bias voltage VCC-3.Vd applied to the bases of the power transistors then in a way pre-charges the stray capacitances of said transistors and makes these transistors potentially conductive. It will therefore suffice, in this configuration, to present a current I1 to their transmitters so that they become effectively conductive, and this in an almost instantaneous manner.
- FIG. 2 is a block diagram showing a CP charge pump incorporating two current sources of the type described above.
- This CP charge pump is provided with two control inputs intended to receive control signals V1 and V2, and an OUT output intended to deliver an output current whose direction and value depend of the values of the control signals V1 and V2.
- the CP charge pump has a first and second controlled current source CS1 and CS2 of the aforementioned type, the control inputs constitute the control inputs of the charge pump CP, the outputs OUT1 and OUT2 of the first and second current sources being connected to the first and second branches of a current mirror (M1, M2), the output of the second source of current CS2 being further connected to the output OUT of the charge pump CP.
- M1, M2 current mirror
- the mirror of current (M1, M2) consists of two transistors, M1 and M2, whose collectors form respectively the first and second branches of the current mirror, the bases of which are connected together to the collector of the first transistor M1, and whose emitters are connected to a GND negative supply terminal.
- the control signal V1 of the first controlled current source CS1 orders the conduction of said source CS1, it delivers a current IO1 on the first branch of the current mirror (M1, M2), which current mirror then reproduces said current IO1 on its second branch.
- the second CS2 current source not conducting, the current flowing in the second branch of the current mirror (M1, M2), which is the image of the current IO1, is taken from the output OUT of the charge pump CP, which therefore delivers a negative current.
- the charge pump CP also includes a current source, known as drainage, disposed between the output of the first current source CS1 and the negative terminal GND power supply.
- This current source is intended to flow continuously, when the charge pump CP is in operation, a current Id whose nominal value is negligible compared to the maximum value of the output current IO1 or IO2 of the charge pump CP.
- the drain current source allows the evacuation of electrical charges stored in parasitic capacitances that comprise the transistors M1 and M2 constituting the current mirror (M1, M2), which prevents a parasitic leakage current from appearing in one of the branches of said current mirror to evacuate these charges towards the negative supply terminal GND, after the conduction of the first current source CS1 has been interrupted. Such leakage current would cause a negative current to persist at the OUT output of the CP load, a phenomenon which is all the more unacceptable as the switching frequency of the CP charge pump is high.
- FIG. 3 schematically represents a controlled current source CS1 according to a preferred embodiment of the invention.
- the module CNT1 control includes first and second transistors T1 and T2 forming a first differential pair, and intended to receive on their bases the control voltage V1, and a third transistor T3 including the main current path, that is to say the collector-emitter path, is arranged in series with a first resistor R11, between a positive terminal power supply VCC and the output of the control module CNT1, the emitter of the first transistor T1 being connected to the positive supply terminal VCC, the collector of the second transistor T2 being connected to the positive supply terminal VCC via a second resistor R21, on the one hand, and to the base of the third transistor T3, on the other hand.
- the CNT1 control module also includes a fourth and a fifth transistor T4 and T5, forming a second differential pair, and intended to receive on their bases a so-called selection signal Vx1, constituted here by a voltage, the collector of the fourth transistor T4 being connected to the positive supply terminal VCC, the collector of the fifth transistor T5 being connected to the positive supply terminal VCC via a transistor Q5 diode mounted, on the one hand, and at the base of the third transistor T3 via a third resistance R31, on the other hand.
- the diodes D1i, D2i and D3i are here constituted by transistors Q1, Q2 and Q3, polarized by means of a transistor Q4 arranged in series with the aforementioned transistors, according to a technique well known to the specialist.
- the transistors used are bipolar transistors, it is obvious that MOS type transistors, whose grids, drains and sources would respectively constitute the terminals of polarization, of transfer and of reference, can be substituted for them.
- the current source CS1 operates as follows: When the control voltage V1 is negative, the second transistor T2 is conductive while the first transistor T1 is blocked.
- the third transistor T3 operates as a voltage follower and copies the potential of the base of said third transistor T3 on its emitter with an offset equal to a base-emitter voltage.
- the second resistor R21 is traversed by a significant current and generates at its terminals a sufficiently large voltage drop so that the value of the difference between the potential of the emitter of the third transistor T3 and that of the bases of the power transistors is less than a minimum value authorizing the conduction of said power transistors.
- the voltage drop across the second resistor R21 thus ensures that the power transistors remain blocked.
- the current I1 delivered by the control module CNT1 is therefore zero and the power module PA1 is inactive.
- the second transistor T2 When the value of the control voltage V1 becomes positive, the second transistor T2 is blocked while the first transistor T1 becomes conductive.
- the potential of the base of the third transistor T3 therefore becomes close to that of the positive supply terminal VCC, the potential of the emitter of said third transistor T3 becoming sufficiently high to make the transistors potentially conductive.
- the third transistor T3 then delivers, via the first resistor R11, a non-zero current I1 to the output of the control module CNT1.
- This current I1 makes the power transistors conductive as soon as it reaches their emitters, and the controlled current source CS1 delivers a non-zero output current IO1.
- Vbe (T3) + V11 + Veb Vbe (Q1) + Vbe (Q2) + Vbe (Q3) , where Vbe (Ti) and Vbe (Qi) are the base-emitter voltages of the NPN, Ti and Qi transistors respectively, Veb the emitter-base voltage of the power transistors PNP and V11 the voltage across the first resistor R11.
- the base-emitter and emitter-base voltages of the various transistors are, by construction, substantially equal to a value Vbe, which is of the order of 0.6 volts.
- the output current IO1 of the charge pump CS1 therefore has the nominal value Vbe / R11.
- the choice of the value of the first resistor R11 thus makes it possible to easily calibrate the output current IO1.
- FIG. 4 partially shows a signal receiving apparatus which incorporates a CP charge pump built on the basis of two sources of controlled current CS1 and CS2 of the type described above.
- This device has a system antenna and AF filtering allowing the reception of a signal whose frequency is selected within a given frequency range, and its transformation into a signal electronic Vfr, called radio signal, having an FR frequency called radio frequency.
- a frequency conversion, from the selected FR radio frequency to a frequency intermediate predetermined FI, is carried out in this apparatus by means of an MX mixer intended to receive the radio signal Vfr, on the one hand, and an output signal Vco from a local oscillator OSC whose oscillation frequency FLO is determined by the value of an adjustment voltage Vtun, on the other hand.
- This device also includes a PD phase / frequency detector intended to compare the frequency FLO of the output signal Vco of the oscillator OSC with the frequency FREF of a reference signal Vref, and to deliver to the charge pump CP signals of command V1, V2 and selection Vx1, Vx2, whose values depend on the result of said comparison.
- the output of the charge pump CP is connected to a capacitor Cs intended for generate at its terminals the adjustment voltage Vtun.
- the FLO oscillation frequency is controlled by means of a phase locked loop incorporating the charge pump CP.
- This loop operates as follows: when the oscillation frequency FLO is less than the reference frequency FREF, the phase / frequency detector PD delivers a positive control voltage V2 to the charge pump CP which then delivers a current of Ics output positive towards the Cs capacity. The adjustment voltage Vtun present at the terminals of said capacitor Cs then increases, causing the value of the oscillation frequency FLO to increase. This cycle is repeated until the oscillation frequency FLO becomes equal to the reference frequency FREF, the loop then reaching its locking state.
- phase detector / frequency PD delivering a positive control voltage V1 to the charge pump CP which then controls by means a negative output current Ics a decrease in the value of the adjustment voltage Vtun, and therefore in the oscillation frequency FLO.
- said phase detector / PD frequency can advantageously deliver to the charge pump CP a negative control voltage Vx2, in addition to the positive control voltage V2.
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Nonlinear Science (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Control Of Electrical Variables (AREA)
- Dc-Dc Converters (AREA)
Abstract
Description
- une pluralité de transistors, dits de puissance, disposés en parallèle, chaque transistor étant muni d'une borne de référence, d'une borne de transfert et d'une borne de polarisation, les bornes de transfert des transistors de puissance étant reliées ensemble à la sortie de la source de courant, et
- un module de contrôle, muni d'une entrée destinée à recevoir le signal de commande, et d'une sortie destinée à délivrer un signal permettant la mise en conduction des transistors de puissance.
appareil caractérisé en ce que la pompe de charge est telle que décrite plus haut.
- la figure 1 est un schéma électrique décrivant une source de courant contrôlée conforme à l'invention,
- la figure 2 est un schéma fonctionnel décrivant une pompe de charge incorporant de telles sources de courant,
- la figure 3 est un schéma électrique décrivant une source de courant contrôlée conforme à un mode de réalisation préféré de l'invention, et
- la figure 4 est un schéma fonctionnel partiel décrivant un appareil récepteur de signaux radioélectriques incorporant l'invention.
- un module de puissance PAi comportant une pluralité de transistors, dits de puissance, disposés en parallèle, chaque transistor étant muni d'une borne de référence, d'une borne de transfert et d'une borne de polarisation, les bornes de transfert des transistors de puissance étant reliées ensemble à la sortie de la source de courant, et
- un module de contrôle CNTi, muni d'une entrée destinée à recevoir le signal de commande Vi, et d'une sortie destinée à délivrer un signal permettant la mise en conduction des transistors de puissance.
Lorsque la tension de commande V1 est négative, le deuxième transistor T2 est conducteur alors que le premier transistor T1 est bloqué. Le troisième transistor T3 fonctionne en suiveur de tension et recopie le potentiel de la base dudit troisième transistor T3 sur son émetteur avec un décalage égal à une tension base-émetteur. La deuxième résistance R21 est parcourue par un courant significatif et génère à ses bornes une chute de tension suffisamment importante pour que la valeur de la différence entre le potentiel de l'émetteur du troisième transistor T3 et celui des bases des transistors de puissance soit inférieure à une valeur minimale autorisant la mise en conduction desdits transistors de puissance. La chute de tension aux bornes de la deuxième résistance R21 assure ainsi le maintien du blocage des transistors de puissance. Le courant I1 délivré par le module de contrôle CNT1 est donc nul et le module de puissance PA1 est inactif.
Claims (7)
- Source de courant contrôlée, munie d'une entrée de commande destinée à recevoir un signal de commande, et d'une sortie destinée à délivrer un courant dont la valeur dépend de la valeur du signal de commande, comprenant :une pluralité de transistors, dits de puissance, disposés en parallèle, chaque transistor étant muni d'une borne de référence, d'une borne de transfert et d'une borne de polarisation, les bornes de transfert des transistors de puissance étant reliée ensemble à la sortie de la source de courant, etun module de contrôle, muni d'une entrée destinée à recevoir le signal de commande, et d'une sortie destinée à délivrer un signal permettant la mise en conduction des transistors de puissance,
- Source de courant contrôlée selon la revendication 1, caractérisée en ce que le module de contrôle comporte un premier et un deuxième transistor formant une première paire différentielle, et destinés à recevoir sur leurs bornes de polarisation le signal de commande, et un troisième transistor dont le trajet de courant principal est disposé, en série avec une première résistance, entre une borne positive d'alimentation et la sortie du module de contrôle, la borne de transfert du premier transistor étant reliée à la borne positive d'alimentation, la borne de transfert du deuxième transistor étant reliée à la borne positive d'alimentation via une deuxième résistance, d'une part, et à la borne de polarisation du troisième transistor, d'autre part.
- Source de courant contrôlée selon la revendication 2, caractérisée en ce que le module de contrôle comporte en outre un quatrième et un cinquième transistor, formant une deuxième paire différentielle, et destinés à recevoir sur leurs bornes de polarisation un signal dit de sélection, la borne de transfert du quatrième transistor étant reliée à la borne positive d'alimentation, la borne de transfert du cinquième transistor étant reliée à la borne positive d'alimentation via un élément régulateur de tension, d'une part, et à la borne de polarisation du troisième transistor via une troisième résistance, d'autre part.
- Source de courant contrôlée selon la revendication 3, caractérisée en ce que l'élément régulateur de tension est constitué par une diode.
- Pompe de charge, munie de deux entrées de commande destinées à recevoir des signaux de commande, et d'une sortie destinée à délivrer un courant de sortie dont le sens et la valeur dépendent des valeurs des signaux de commande, caractérisée en ce qu'elle comporte une première et une deuxième source de courant contrôlée conformes à la revendication 1, dont les entrées de commande constituent les entrées de commande de la pompe de charge, les sorties des première et deuxième sources de courant étant reliées aux première et deuxième branches d'un miroir de courant, la sortie de l'une des sources de courant étant en outre reliée à la sortie de la pompe de charge.
- Pompe de charge selon la revendication 5, caractérisée en ce qu'elle comporte en outre une source de courant dite de drainage, destinée à débiter en permanence, lorsque la pompe de charge est en fonctionnement, un courant dont la valeur nominale est négligeable devant la valeur maximale du courant de sortie de la pompe de charge, la source de courant de drainage étant disposée entre celle des sorties des première et deuxième sources de courant qui n'est pas reliée à la sortie de la pompe de charge, et une borne négative d'alimentation.
- Appareil récepteur de signaux radioélectriques, comportant un système d'antenne et de filtrage permettant la réception d'un signal dont la fréquence est sélectionnée au sein d'une gamme de fréquences donnée, et sa transformation en un signal électronique dit signal radio, appareil dans lequel une conversion de fréquence, à partir de la fréquence sélectionnée vers une fréquence intermédiaire prédéterminée, est réalisée au moyen d'un mélangeur destiné à recevoir le signal radio, d'une part, et un signal de sortie d'un oscillateur local dont la fréquence est déterminée par la valeur d'une tension de réglage, d'autre part, appareil comportant en outre un détecteur de phase/fréquence destiné à comparer la fréquence du signal de sortie de l'oscillateur avec celle d'un signal de référence et à délivrer à une pompe de charge des signaux de commande dont les valeurs dépendent du résultat de ladite comparaison, la sortie de la pompe de charge étant reliée à une capacité destinée à générer à ses bornes la tension de réglage,
appareil caractérisé en ce que la pompe de charge est conforme à la revendication 5.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9810509 | 1998-08-18 | ||
FR9810509 | 1998-08-18 |
Publications (2)
Publication Number | Publication Date |
---|---|
EP0981203A1 true EP0981203A1 (fr) | 2000-02-23 |
EP0981203B1 EP0981203B1 (fr) | 2004-01-21 |
Family
ID=9529748
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP99202607A Expired - Lifetime EP0981203B1 (fr) | 1998-08-18 | 1999-08-10 | Source de courant contrôlée à commutation accélérée |
Country Status (5)
Country | Link |
---|---|
US (1) | US6150806A (fr) |
EP (1) | EP0981203B1 (fr) |
JP (1) | JP2000200111A (fr) |
KR (1) | KR20000017372A (fr) |
DE (1) | DE69914266T2 (fr) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6445170B1 (en) * | 2000-10-24 | 2002-09-03 | Intel Corporation | Current source with internal variable resistance and control loop for reduced process sensitivity |
US6448811B1 (en) | 2001-04-02 | 2002-09-10 | Intel Corporation | Integrated circuit current reference |
US6507225B2 (en) | 2001-04-16 | 2003-01-14 | Intel Corporation | Current mode driver with variable equalization |
US6522174B2 (en) * | 2001-04-16 | 2003-02-18 | Intel Corporation | Differential cascode current mode driver |
US6791356B2 (en) * | 2001-06-28 | 2004-09-14 | Intel Corporation | Bidirectional port with clock channel used for synchronization |
TWI435654B (zh) * | 2010-12-07 | 2014-04-21 | 安恩國際公司 | 雙端電流控制器及相關發光二極體照明裝置 |
CN112953227B (zh) * | 2021-05-14 | 2021-08-10 | 上海芯龙半导体技术股份有限公司 | 开关电源电路、芯片及系统 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0438039A1 (fr) * | 1990-01-15 | 1991-07-24 | Telefonaktiebolaget L M Ericsson | Procédé et dispositif pour synthèse de fréquence |
EP0561456A1 (fr) * | 1992-03-18 | 1993-09-22 | Philips Composants Et Semiconducteurs | Synthétiseur de fréquence utilisant un miroir de courant à commutation accélérée et appareil comprenant un tel synthétiseur |
US5453680A (en) * | 1994-01-28 | 1995-09-26 | Texas Instruments Incorporated | Charge pump circuit and method |
US5485125A (en) * | 1994-03-02 | 1996-01-16 | U.S. Philips Corporation | Phase-locked oscillator arrangement |
US5508702A (en) * | 1994-06-17 | 1996-04-16 | National Semiconductor Corp. | BiCOMS digital-to-analog conversion |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4740766A (en) * | 1987-09-04 | 1988-04-26 | Tektronix, Inc. | Precision tracking current generator |
US5412309A (en) * | 1993-02-22 | 1995-05-02 | National Semiconductor Corporation | Current amplifiers |
BE1007853A3 (nl) * | 1993-12-03 | 1995-11-07 | Philips Electronics Nv | Bandgapreferentiestroombron met compensatie voor spreiding in saturatiestroom van bipolaire transistors. |
US5506543A (en) * | 1994-12-14 | 1996-04-09 | Texas Instruments Incorporated | Circuitry for bias current generation |
JP2953383B2 (ja) * | 1996-07-03 | 1999-09-27 | 日本電気株式会社 | 電圧電流変換回路 |
JP3334548B2 (ja) * | 1997-03-21 | 2002-10-15 | ヤマハ株式会社 | 定電流駆動回路 |
US5883507A (en) * | 1997-05-09 | 1999-03-16 | Stmicroelectronics, Inc. | Low power temperature compensated, current source and associated method |
-
1999
- 1999-08-10 DE DE1999614266 patent/DE69914266T2/de not_active Expired - Fee Related
- 1999-08-10 EP EP99202607A patent/EP0981203B1/fr not_active Expired - Lifetime
- 1999-08-17 JP JP11230943A patent/JP2000200111A/ja active Pending
- 1999-08-18 US US09/376,862 patent/US6150806A/en not_active Expired - Lifetime
- 1999-08-18 KR KR1019990034134A patent/KR20000017372A/ko not_active Application Discontinuation
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0438039A1 (fr) * | 1990-01-15 | 1991-07-24 | Telefonaktiebolaget L M Ericsson | Procédé et dispositif pour synthèse de fréquence |
EP0561456A1 (fr) * | 1992-03-18 | 1993-09-22 | Philips Composants Et Semiconducteurs | Synthétiseur de fréquence utilisant un miroir de courant à commutation accélérée et appareil comprenant un tel synthétiseur |
US5453680A (en) * | 1994-01-28 | 1995-09-26 | Texas Instruments Incorporated | Charge pump circuit and method |
US5485125A (en) * | 1994-03-02 | 1996-01-16 | U.S. Philips Corporation | Phase-locked oscillator arrangement |
US5508702A (en) * | 1994-06-17 | 1996-04-16 | National Semiconductor Corp. | BiCOMS digital-to-analog conversion |
Non-Patent Citations (1)
Title |
---|
ANONYMOUS: "Current Sources for a Phase Locked Loop. November 1973.", IBM TECHNICAL DISCLOSURE BULLETIN, vol. 16, no. 6, November 1973 (1973-11-01), New York, US, pages 2013, XP002100095 * |
Also Published As
Publication number | Publication date |
---|---|
KR20000017372A (ko) | 2000-03-25 |
JP2000200111A (ja) | 2000-07-18 |
US6150806A (en) | 2000-11-21 |
EP0981203B1 (fr) | 2004-01-21 |
DE69914266T2 (de) | 2004-11-18 |
DE69914266D1 (de) | 2004-02-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0838745B1 (fr) | Régulateur de tension à sélection automatique d'une tension d'alimentation la plus élevée | |
EP0905908B1 (fr) | Etage de sortie pour pompe de charge faible courant et démodulateur intégrant une telle pompe de charge | |
FR2623307A1 (fr) | Source de courant a deux bornes avec compensation de temperature | |
FR2715012A1 (fr) | Synthèse en fréquence par fractions N à correction d'erreur résiduelle et procédé associé. | |
FR2637703A1 (fr) | Circuit regulateur stabilise a faible tension de mise hors fonction | |
FR2532083A1 (fr) | Circuit de reference de precision a tension d'intervalle de bande | |
FR2896051A1 (fr) | Regulateur de tension serie a faible tension d'insertion | |
EP0562904A1 (fr) | Procédé et dispositif de réglage de retard à plusieurs gammes | |
FR2840470A1 (fr) | Circuit a boucle a phase asservie et dispositif semiconducteur a circuit integre | |
FR2546686A1 (fr) | Circuit oscillant a frequence variable se presentant sous forme d'un circuit integre | |
EP1925079B1 (fr) | Commutateur de courant a paire differentielle de transistors alimente par une faible tension vcc | |
EP0981203B1 (fr) | Source de courant contrôlée à commutation accélérée | |
FR2587567A1 (fr) | Circuit de conversion d'une entree differentielle en niveaux logiques cmos | |
EP0649079B1 (fr) | Circuit générateur de tension stabilisée du type bandgap | |
EP0278534A1 (fr) | Déphaseur large bande | |
EP4038476B1 (fr) | Dispositif de generation d'une tension d'alimentation / polarisation et d'un signal d'horloge pour un circuit numerique synchrone | |
EP0561456B1 (fr) | Miroir de courant à commutation accélérée | |
FR2857798A1 (fr) | Amplificateur de tension a faible consommation. | |
FR2815198A1 (fr) | Circuit a verrouillage de phase | |
CH644231A5 (fr) | Circuit a gain variable commande par une tension. | |
EP0998031A1 (fr) | Amplificateur de courant à faible impédance d'entrée | |
FR2813481A1 (fr) | Modulateur de frequence a faible bruit ayant une frequence porteuse variable | |
FR2798234A1 (fr) | Dispositif de transposition de frequence a faible fuite de signal d'oscillateur local et procede correspondant de reduction de fuite | |
FR2466137A1 (fr) | Convertisseur de signaux | |
FR2671245A1 (fr) | Dispositif de retard reglable. |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): DE FR GB |
|
AX | Request for extension of the european patent |
Free format text: AL;LT;LV;MK;RO;SI |
|
17P | Request for examination filed |
Effective date: 20000823 |
|
AKX | Designation fees paid |
Free format text: DE FR GB |
|
17Q | First examination report despatched |
Effective date: 20020916 |
|
GRAH | Despatch of communication of intention to grant a patent |
Free format text: ORIGINAL CODE: EPIDOS IGRA |
|
GRAS | Grant fee paid |
Free format text: ORIGINAL CODE: EPIDOSNIGR3 |
|
GRAA | (expected) grant |
Free format text: ORIGINAL CODE: 0009210 |
|
AK | Designated contracting states |
Kind code of ref document: B1 Designated state(s): DE FR GB |
|
REG | Reference to a national code |
Ref country code: GB Ref legal event code: FG4D Free format text: NOT ENGLISH |
|
REF | Corresponds to: |
Ref document number: 69914266 Country of ref document: DE Date of ref document: 20040226 Kind code of ref document: P |
|
GBT | Gb: translation of ep patent filed (gb section 77(6)(a)/1977) |
Effective date: 20040407 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: GB Payment date: 20040826 Year of fee payment: 6 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: FR Payment date: 20040830 Year of fee payment: 6 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: DE Payment date: 20041015 Year of fee payment: 6 |
|
PLBE | No opposition filed within time limit |
Free format text: ORIGINAL CODE: 0009261 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT |
|
26N | No opposition filed |
Effective date: 20041022 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: GB Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20050810 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: DE Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20060301 |
|
GBPC | Gb: european patent ceased through non-payment of renewal fee |
Effective date: 20050810 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: FR Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20060428 |
|
REG | Reference to a national code |
Ref country code: FR Ref legal event code: ST Effective date: 20060428 |