Classifications

• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
  • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
  • H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
  • H04L2209/12—Details relating to cryptographic hardware or logic circuitry

Definitions

• DES Data Encryption Standard
• [1] and [6] The so-called Data Encryption Standard
• the input signals are subjected to both permutations and substitutions.
• the method is carried out in several iterations with the aim of encrypting the text, i.e. to find the result of the application of the DES method to the input signals, which is so complex that it cannot be broken by a computer of today's computing power.
• differential crypto analysis method is suitable for increasing the chances of unauthorized decryption, i.e. to prevent unauthorized breaking of the encrypted text.
• the invention is based on the problem of specifying a method for the computer-assisted formation of a permutation and a method for encrypting digital signals and arrangements for carrying out the method with which the cryptographic security of permutations and thus also the cryptographic security of encryption methods in which permutations are used , is significantly increased.
• a predeterminable matrix is divided into several depending on a predefinable key
• Disassembled partial matrices Rows or columns of the partial matrices are subjected to a clear mapping, the result of the mapping representing partial permutations.
• the partial permutations are linked to the permutation.
• At least one permutation is used in the context of the encryption, which is formed according to the following regulation.
• a predeterminable matrix is broken down into several sub-matrices depending on a predefinable key. Rows or columns of the submatrices are subjected to a clear mapping, the results of which represent partial permutations.
• the partial permutations are linked to the permutation.
• the digital signals are encrypted at least using permutation.
• the arrangement according to claim 12 is designed such that the method steps are carried out according to claim 1 and claim 2. For this purpose, an arithmetic unit is provided for carrying out the individual method steps.
• a matrix as a starting point for the decomposition, which matrix has approximately the same number of elements with values of a first binary value and elements with values of a second binary value.
• the size of the matrix is also basically arbitrary.
• the arrangement can be both a common computer, i.e. be a conventional data processing system, which is designed by programming such that the above-described methods can be carried out.
• the arrangement can also be implemented by a digital electronic circuit.
• Figure 1 shows a Walsh matrix with an indicated decomposition of the Walsh matrix into 4 sub-matrices
• FIG. 2 is a sketch of two computer units with which the
• FIGS. 4a to 4e the inverse partial permutations Pj; " 1 to the partial permutations Pi and the inverse permutation P" 1 ;
• Figure 5 is a sketch of a realization of the arrangement with a digital electronic circuit.
• FIG. 2 shows a first computer unit C1 with a processor unit P and a second computer unit C2 also with a processor unit P.
• the two computer units are connected to one another via a transmission medium UM in such a way that data can be exchanged between the computer units C1, C2.
• digital data D to be encrypted is encrypted using at least one permutation, which is determined in a manner described below.
• the encrypted data VD are transmitted via the transmission medium UM to the second computer unit C2 and there decrypted the original data D using at least one of the permutations inverse to the permutation described below.
• the secret key is exchanged before the encrypted data is transmitted. Any method for exchanging cryptographic keys can be used for this.
• the encryption is carried out using at least one permutation, which is formed in the following way.
• the Walsh matrix WM of size 16x16 in dyadic order shown in FIG. 1 is used as the starting point for forming the permutation.
• the Walsh matrix WM only has elements that have either a first binary value "1" or a second binary value "0".
• a predefinable key S preferably the secret key, is used for encrypting the data in a symmetrical encryption method in the course of the further method.
• the key S has the following structure:
• the key S which is also referred to below as a boot decomposition, is used as a permutation key.
• the key S is used to define a breakdown of the specified matrix into four tracks Spl, Sp2, Sp3, Sp4 (TracesT.
• a track Spl, Sp2, Sp3, Sp4 is to be understood as a set of columns of the Walsh matrix WM, whereby the number of columns in a track Spl, Sp2, Sp3, Sp4 is determined by a value of the key S in each case.
• the use of the key S means that a first track Spl has the first three columns, a first column S1, a second column S2, and a third column S3 of the Walsh matrix WM .
• a second track Sp2 has four columns, a fourth column S4, a fifth column S5, a sixth column S6 and a seventh column S7 of the Walsh matrix WM.
• a third track Sp3 contains, according to the key S, seven columns, an eighth column S8, a ninth column S9, a tenth column S10, an eleventh column S11, a twelfth column S12, a 13th column S13 and a 14th column S14 of the Walsh - Matrix WM.
• a fourth column Sp4 contains two columns, a 15th column S15 and a 16th column S16 of the Walsh matrix WM.
• Each track Spl, Sp2, Sp3, Sp4 corresponds to a partial permutation Pi, a concatenation of the four partial permutations PI, P2, P3, P4 in this case results in the permutation P, which is clearly determined by the specified boot decomposition taking into account the key S.
• Each track Spj where j is an index to designate the respective track, the respective line number is always assigned a numerical value, whereby the most significant digit is assumed on the left.
• the numerical value is derived from ⁇ representing binary numbers of the respective elements of the corresponding row in the track Spj.
• 3a shows a two-line table with 16 columns, which represent the individual lines of the Walsh matrix WM or the resulting line specification for the respective track Spj.
• the top line of the table shows the individual line numbers of the Walsh matrix WM for the first partial permutation PI, which results from the first track Spl, successively from 1 to 16.
• the respective line number of the track SPj is given, which results from the re-sorting of the lines within the first track Spl according to falling numerical values.
• the FIFO principle is used to resolve the conflicts of the same numerical values for different line numbers, i.e. the line number that was previously a lower value than the one in conflict with its line
• a 1: 1 mapping results, which results from the dyadic order of the Walsh matrix WM and the FIFO strategy used, since the first three-digit binary values are in any case arranged in order of decreasing order.
• the first partial permutation PI thus results as an identical image of the first track SP1.
• the second partial permutation P2 is formed taking into account the second track Sp2 (cf. FIG. 3b).
• the second line of FIG. 3b again shows the new line numbers which result from the rearrangement within the second track Sp2, but this time using the LIFO principle.
• the LIFO principle means that the order of conflicting lines is simply reversed. This is already evident in lines 1 and 2, which are reversed by using the LIFO strategy.
• the first line 1 and the second line 2 of the second track SP2 of the Walsh Matrix WM both have the binary value “1111”.
• the LIFO strategy makes the order of the first line 1 and the second line 2 in the second partial permutation P2 vice versa, which is shown in Figure 3.
• the 13th line 13 and the 14th line 14 of the second track SP2 of the Walsh Matrix WM both have the binary value "1100". As a result, these lines are re-sorted to the new, permuted "position" 11 or 12.
• the third partial permutation P3 results, taking into account the third track Sp3, again in the manner described above (cf. FIG. 3c).
• the fourth partial permutation P4 again takes into account the ⁇ fourth track Sp4 in the manner described above (cf. FIG. 3d).
• the individual partial permutations are linked to form the permutation P.
• the permutation P is shown in Fig. 3e.
• concatenation means that the value of the new line number of the respective partial mutation PI, P2, P3 is selected as the initial value of the line number in the next partial permutation P2, P3, P4.
• Line number 9 is retained after the first partial permutation PI has been carried out.
• a new line number 12 results for the line number 9.
• the permuted line number 6 results in the third partial permutation P3.
• the value of the line number results in the fourth partial permutation P4 2.
• the overall result of the concatenation is shown in FIG. 3e, that is to say the tuple of the initial line number 9 and the associated permuted line number 2.
• FIG. 4d describes an inverse first partial permutation Pi "1 resulting from the first partial permutation PI.
• Fig. 4e the resulting inverse permutation P -1 is shown in a value table that summarizes a concatenation of the four inverse partial permutations.
• the value of the line number 2 results in the fourth inverse partial permutation P4 "1 for the value of the line number 2
• the value 4 resulting from the fourth inverse partial permutation P4 "1 results in the value 12 in the third inverse partial permutation P3" 1.
• the value 12 results in the value 12 in the second inverse partial permutation P2 -1 .
• the first inverse partial permutation Pi "1 which also represents a 1: 1 mapping when it is inverted, results in the value of the line number 9 for the line number 9.
• a mapping of an original permuted value 2 again results in the original Value of line number 9. This is indicated in Figure 4e in the pair of values (2,9).
• the method can be arranged, for example, by a computer unit, for example the first computer unit C1 and / or the second computer unit C2 can be implemented.
• a computer unit for example the first computer unit C1 and / or the second computer unit C2 can be implemented.
• Individual tracks Spj can be masked out by setting the binary counter accordingly in a start or stop position.
• the order of the binary numbers thus obtained, i.e. the numerical values assigned to the individual lines of the tracks Spj are provided by a specially designed switching mechanism SW which outputs the corresponding numerical value in binary form.
• a generator G for generating Walsh matrices WM is shown in FIG. 5.
• a number i to be permuted as well as the number of columns of the respective track Spj are fed to the generator G in each case.
• the generator G is connected to the switching mechanism SW, with which the permutation P of the number i is carried out.
• a permuted number P (i) is output from the arrangement.

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• Engineering & Computer Science (AREA)
• Computer Security & Cryptography (AREA)
• Computer Networks & Wireless Communication (AREA)
• Signal Processing (AREA)
• Storage Device Security (AREA)
• Mobile Radio Communication Systems (AREA)

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• 1998
  • 1998-02-23 WO PCT/DE1998/000537 patent/WO1998038767A1/de not_active Application Discontinuation
  • 1998-02-23 JP JP53716898A patent/JP2001513213A/ja active Pending
  • 1998-02-23 EP EP98914809A patent/EP0963634A1/de not_active Withdrawn

Non-Patent Citations (1)

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