EP0932199A2 - Elektronisches Gehäuse mit Diamantfilmwärmeleiter - Google Patents

Elektronisches Gehäuse mit Diamantfilmwärmeleiter Download PDF

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Publication number
EP0932199A2
EP0932199A2 EP99200169A EP99200169A EP0932199A2 EP 0932199 A2 EP0932199 A2 EP 0932199A2 EP 99200169 A EP99200169 A EP 99200169A EP 99200169 A EP99200169 A EP 99200169A EP 0932199 A2 EP0932199 A2 EP 0932199A2
Authority
EP
European Patent Office
Prior art keywords
package
accordance
base flange
diamond
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP99200169A
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English (en)
French (fr)
Other versions
EP0932199A3 (de
Inventor
Philip M. Fabis
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Saint Gobain Ceramics and Plastics Inc
Original Assignee
Saint Gobain Norton Industrial Ceramics Corp
Saint Gobain Industrial Ceramics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Saint Gobain Norton Industrial Ceramics Corp, Saint Gobain Industrial Ceramics Inc filed Critical Saint Gobain Norton Industrial Ceramics Corp
Publication of EP0932199A2 publication Critical patent/EP0932199A2/de
Publication of EP0932199A3 publication Critical patent/EP0932199A3/de
Withdrawn legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49562Geometry of the lead-frame for devices being provided for in H01L29/00
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3732Diamonds
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    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
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    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
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    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2924/01005Boron [B]
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    • H01L2924/01074Tungsten [W]
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    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
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    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
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    • H01L2924/3011Impedance

Definitions

  • the invention relates generally to packages for electronic circuits and in particular to such packages which make use of diamond film for conducting heat from the device to the outside of the package.
  • Electronic devices are typically housed in a "package".
  • the package is designed to provide the device protection from environmental factors, such as moisture. It is also designed for convenient electrical interconnection and for conduction of heat generated by the circuit to the outside of the package, where it may be removed by various means.
  • packages commercially available to the manufacturers of electronic circuits. To some extent the wide use of certain types has given them the reputation as a "standard" design geometry identified by a designation recognized in the industry through validation by trade organizations, such as the IEEE (Institute of Electronic and Electrical Engineers).
  • Heat removal from circuit devices in packages has become increasingly challenging as their power densities have increased.
  • large scale integrated circuits include ever larger numbers of active elements and operate at ever higher speeds, which requires more power.
  • Power amplifiers have been reduced in size, to that they have higher power densities.
  • More effective heat removal has been accomplished by the incorporation into the package design of materials which have a high heat conductivity, such as copper.
  • the copper is in the form of a substrate of the package, and the circuit device is mounted directly to it with a suitable bonding agent.
  • the circuit device cannot be mounted directly on an electrically conducting member because spurious noise in its signal would arise due to capacitive coupling to the substrate.
  • the conductive substrate must be covered with an electrically insulating layer before the circuit device is attached, or the substrate must itself be made of an electrically insulating, thermally conductive material.
  • Packages of this general type are described, for example, in U.S. Patents 5,065,281 and 5,109,268.
  • diamond film can be made by CVD (chemical vapor deposition) in wafer form suitable for use as a substrate material. It has a very high electrical resistivity and is about three to five times as effective in conducting heat as is even copper, the best of the metals in this regard.
  • diamond is incorporated in a package in such a manner that the circuit device may be thermally coupled directly to the surface of it inside the package, while heat may be removed directly from a surface of the diamond outside the package.
  • This structure provides a rapid thermal response because of the low heat capacity of the diamond, while eliminating all other interfaces between the circuit device and the outside diamond surface to maximize thermal conductivity.
  • the operating temperature of the circuit device can be stabilized at a sufficiently low temperature that CTE mismatch problems between the circuit device and the diamond are avoided.
  • a standard geometry circuit device package 10 as shown in Figs. 1-4 which is identified in the industry by the designation RF701 and manufactured, for example, by the Brush Wellman Engineered Materials Company of Newburyport, Massachusetts, is adapted to incorporate a CVD diamond film heat conducting element.
  • This package is especially suitable for housing RF (radio frequency) devices which have a relatively high power output.
  • the main supporting structure of the package 10 is a metal laminate base flange 12 which is adapted to be fastened to a heat sink member (not shown).
  • the base flange 12 is a laminate which includes a core 14 of molybdenum about 24 mils thick bonded by a heat diffusion process directly to a copper cladding 16 about 8 mils thick over both its top face 18 and its bottom face 20. Bonded to the copper of the top face 18 is an alumina frame 22 to which there are attached on opposite top sides two copper power leads 24 which pass from the outside to the inside of the package 10.
  • a cap 26 hermetically seals the package 10.
  • the base flange 12 is a modified version of what is normally CuW (copper-tungsten) base flange for this type of package. Normally, such a flange is entirely of CuW. It is designed to have its bottom face 20 firmly fastened to the flat surface of a heat sink member, such as a metal "slug", by means of screws which extend through two fastening holes 21.
  • the present, modified version of the base flange 12 is made as a laminate because the molybdenum core has a CTE which closely matches that of the silicon circuit device to be housed in the package.
  • the copper cladding is provided to permit assembly of the package components in the same manner as if the base flange 12 were copper-tungsten, thus eliminating the need for developing specialized machinery and procedures for this process.
  • Fig. 2 shows the package of Fig. 1 with the cap 26 removed to reveal a silicon circuit device 28 disposed in a chamber 29 formed by an opening 40 through the base flange 12.
  • the device 28 is electrically connected to the two copper power leads 24 by means of a plurality of bonding wires 28 and is attached by a thermally-conductive bonding agent to a heat conducting floor member, or substrate 32 made of diamond film about 350 micrometers thick.
  • the diamond substrate 32 to which the device 28 is attached is metallized over its entire surface with first a titanium layer about 1000 Angstroms thick, then a layer of platinum about 2000 Angstroms thick, and then a layer of gold about 3.75 microns thick.
  • the attachment is carried out by heating the package and pressing the device 28 against the metallizing 38 while vibrating it horizontally to form a gold-silicon eutectic interface and is a known process. Such an interface provides an intimate thermal and electrical contact.
  • the bottom of the device 28 has a base electrical lead which becomes connected to the base flange via the metallizing 38.
  • the Fig. 3 shows the package 10 in section, with the cap 26, device 28, and bonding wires 30 removed. It is seen that the diamond substrate 32 is inlaid into a shallow well 34 formed in the bottom surface of the base flange 12, so that it abuts a shoulder 36. As is shown in greater detail in Fig. 4, the substrate 32 is brazed to the shoulder 36 by means of a gold-indium braze 37 which is 81 weight % gold and 19 weight % indium and is sufficiently malleable to accommodate the small degree of CTE mismatch between the diamond substrate 32 and the molybdenum of the base flange 12.
  • the well 34 is made just deep enough so that the diamond substrate 32 fits into it to become flush with the bottom surface 20 of the base flange 12.
  • the diamond substrate 32 makes optimum intimate contact with the heat sink for maximizing heat transfer.
  • a thermal interface compound such as a thermal grease (e.g. a wax loaded with finely-divided thermal conductor, such as diamond or boron nitride)
  • the diamond substrate 32 makes optimum intimate contact with the heat sink for maximizing heat transfer.
  • the thickness of the diamond is chosen to suit the needs of the circuit in terms of how much heat spreading and how much total heat conduction rate is required.
  • the well 34 is then dimensioned to accommodate those dimensions of the diamond substrate 32. The calculations for such design parameters are known to those in the art.
  • the core of the base flange is molybdenum and the substrate is diamond
  • the invention is applicable to other choices of these materials and need not be a laminate at all.
  • the base flange could be entirely of CuW, entirely of tungsten, or entirely of aluminum silicon carbide.
  • base flange materials which present a greater CTE mismatch problem for the device being housed, it will be necessary to limit more severely the temperature excursions of the device.
  • the attachment of the substrate to the shoulder of the base flange can be by other bonding methods, depending upon their suitability otherwise for the particular structure involved.
  • the braze 37 used in the package 10 forms a particularly intimate thermal contact between the members and has excellent mechanical integrity. This leaves the substrate with not only a very high heat flux passing through its thickness to the outside, but also a very high heat flux passing to the base flange member from its edges where they are brazed. In some applications, the heat transfer from the edges may be less important. In that case other bonding agents, such as solders or epoxies, may be sufficient.
  • An alternative braze which could be used in place of the gold-indium combination would be one of 20 weight % copper and 80 weight % silver.
  • the metallizing would be replaced by one which has a first layer of titanium about 1000 Angstroms thick, then a layer of tungsten about 2000 Angstroms thick, then a layer of platinum about 2000 Angstroms thick, and finally a layer of nickel about 2 microns thick.
  • the means of attaching the substrate to the base flange is less important, and can be accomplished, for example, without any metallizing and by simply a suitable organic adhesive.
  • the heat removal from the device to the diamond substrate need not be maximized, there may be used other means of fastening the device to the substrate which do not require metallizing.
  • the device be directly thermally coupled to one side of the diamond substrate and that the diamond substrate be directly thermally coupled to a heat removal means.
  • directly thermally coupled is meant that the only intervening material, if any, between members so coupled is a thermal coupling agent which is viscously deformed by pressure between the members and has a resulting thickness less than 10 microns. It does not include a structure in which a solid polyimide or other film of about 25 microns or more in thickness is interposed between the members. It does include the use of a settable adhesive, solder, braze, or thermal grease.
  • the diamond substrate can have metallizing on its inside surface only where needed for brazing and for attaching the device. On its outside surface, it then needs to have metallizing only as required for providing a good thermal coupling to whatever means are used for removing the heat conducted to that outside surface.
  • the diamond substate could also be simply be attached to the bottom surface of the base flange, overlapping the edge of an opening in the flange for forming a housing chamber, so long as this suits the needs of the heat removal means for removing heat from the outside surface of the diamond.
  • the invention can be adapted to a wide variety of packages which feature a base flange which is designed to act as a heat removal member for the housed device.
  • the adaptation involves removing at least that portion of the base flange which would support the device and replacing it with diamond film substrate of a thickness which meets the demands of thermal management of the device.
  • the diamond film substrate should be located so that it properly couples the output heat of the package to heat removal means. If the package is to be mounted to a solid heat sink, it may be necessary to have the substrate flush with the lower surface of the base flange to be mounted. If the heat removal is by fluid flow or liquid spray, this may not be necessary.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Cooling Or The Like Of Electrical Apparatus (AREA)
  • Structure Of Printed Boards (AREA)
EP99200169A 1998-01-26 1999-01-20 Elektronisches Gehäuse mit Diamantfilmwärmeleiter Withdrawn EP0932199A3 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US7243198P 1998-01-26 1998-01-26
US72431P 1998-01-26

Publications (2)

Publication Number Publication Date
EP0932199A2 true EP0932199A2 (de) 1999-07-28
EP0932199A3 EP0932199A3 (de) 2000-08-23

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EP99200169A Withdrawn EP0932199A3 (de) 1998-01-26 1999-01-20 Elektronisches Gehäuse mit Diamantfilmwärmeleiter

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US (1) US6211463B1 (de)
EP (1) EP0932199A3 (de)
JP (1) JP3042776B2 (de)
CA (1) CA2258438A1 (de)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0991121A2 (de) * 1998-10-02 2000-04-05 Sumitomo Electric Industries, Ltd. Montagesockel mit verbesserter Wärmeabfuhr für Halbleiterverpackung
US6281574B1 (en) * 1999-09-27 2001-08-28 Raytheon Company High power microwave transistor amplifier
EP1130644A2 (de) * 2000-03-02 2001-09-05 Sumitomo Electric Industries, Ltd. Gehäuse und seine Herstellung
WO2002082148A2 (de) * 2001-04-05 2002-10-17 Unique-M.O.D.E. Ag Optisches oder optoelektronisches modul
EP1414064A1 (de) * 2002-10-22 2004-04-28 Sumitomo Electric Industries, Ltd. Halbleiterbauelement und Gehäuse für Halbleiterchip aus Metall-Diamant Verbundwerkstoff
EP1432029A2 (de) * 2002-12-18 2004-06-23 Sumitomo Electric Industries, Ltd. Halbleiterchipgehäuse mit einem Metall-diamant-verbundmaterial im Substrat, und dessen Herstellungsverfahren
WO2004107436A1 (en) 2003-05-21 2004-12-09 Kyocera America, Inc. Semiconductor package having filler metal of gold/silver/copper alloy
US7298046B2 (en) * 2003-01-10 2007-11-20 Kyocera America, Inc. Semiconductor package having non-ceramic based window frame
US9194189B2 (en) 2011-09-19 2015-11-24 Baker Hughes Incorporated Methods of forming a cutting element for an earth-boring tool, a related cutting element, and an earth-boring tool including such a cutting element

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW451535B (en) 1998-09-04 2001-08-21 Sony Corp Semiconductor device and package, and fabrication method thereof
WO2001031082A1 (en) * 1999-10-28 2001-05-03 P1 Diamond, Inc. Improved diamond thermal management components
US6783589B2 (en) * 2001-01-19 2004-08-31 Chevron U.S.A. Inc. Diamondoid-containing materials in microelectronics
US7306674B2 (en) * 2001-01-19 2007-12-11 Chevron U.S.A. Inc. Nucleation of diamond films using higher diamondoids
US7276222B2 (en) * 2001-01-19 2007-10-02 Chevron U.S.A. Inc. Diamondoid-containing thermally conductive materials
AT6666U1 (de) * 2002-09-23 2004-01-26 Plansee Ag Wärmesenke aus diamant-haltigem verbundwerkstoff mit mehrlagigem überzug
US6727117B1 (en) * 2002-11-07 2004-04-27 Kyocera America, Inc. Semiconductor substrate having copper/diamond composite material and method of making same
SG157957A1 (en) * 2003-01-29 2010-01-29 Interplex Qlp Inc Package for integrated circuit die
US7312562B2 (en) * 2004-02-04 2007-12-25 Chevron U.S.A. Inc. Heterodiamondoid-containing field emission devices
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CA2258438A1 (en) 1999-07-26
US6211463B1 (en) 2001-04-03
JP3042776B2 (ja) 2000-05-22
EP0932199A3 (de) 2000-08-23
JPH11274770A (ja) 1999-10-08

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