EP0872055A1 - Multiplexeur, unite de commutation de secours, reseau de telecommunications et procede de multiplexage - Google Patents

Multiplexeur, unite de commutation de secours, reseau de telecommunications et procede de multiplexage

Info

Publication number
EP0872055A1
EP0872055A1 EP96917756A EP96917756A EP0872055A1 EP 0872055 A1 EP0872055 A1 EP 0872055A1 EP 96917756 A EP96917756 A EP 96917756A EP 96917756 A EP96917756 A EP 96917756A EP 0872055 A1 EP0872055 A1 EP 0872055A1
Authority
EP
European Patent Office
Prior art keywords
input
signal
tline
multiplexer
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP96917756A
Other languages
German (de)
English (en)
Inventor
Mats Bladh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telefonaktiebolaget LM Ericsson AB
Original Assignee
Telefonaktiebolaget LM Ericsson AB
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget LM Ericsson AB filed Critical Telefonaktiebolaget LM Ericsson AB
Publication of EP0872055A1 publication Critical patent/EP0872055A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/14—Monitoring arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
    • H03K17/62—Switching arrangements with several input- output-terminals, e.g. multiplexers, distributors
    • H03K17/6257—Switching arrangements with several input- output-terminals, e.g. multiplexers, distributors with several inputs only combined with selecting means
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/04—Distributors combined with modulators or demodulators
    • H04J3/047—Distributors with transistors or integrated circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/10—Arrangements for reducing cross-talk between channels

Definitions

  • the present invention relates to a multiplexer, a protection switch unit which includes one such multiplexer, a telecommunications network which includes one such protec ⁇ tion switch unit, and a multiplexing related method. More specifically, the invention relates to the aforesaid devices and method in respect of single or differential multiplexing signals and preferably of the CMI type, at transmission speeds above about 100 Mbit/s and preferably in the range of about 140-155 Mb/s.
  • the network includes at least one protection switch unit which is connected between the signal lines and a reserve terminal access unit connected to the exchange.
  • the unit includes a multiplexer or selector whose inputs are connected to the signal lines and whose output is connected to the reserve terminal access unit.
  • the pulse shape of the output signal is often required to be the same as the pulse form of the input signal and the level of the output signal required to be the same as it would have been if the signal had not passed through the multiplexer. Problems with mismatching between components and conductors can easily occur in such multiplexers at such high transmission speeds, therewith greatly impairing signal quality.
  • ECL-type multiplexers are known to the art; see for instance WO93/17500.
  • ECL-multiplexers have a relatively high amplification (in the region of 15 - 30 Db) which must be attenuated in one or more additional circuits so that signal levels will remain unchanged. This attenuation creates a number of problems.
  • the pin positioning of these circuits also makes the placement of conductors much more difficult if constant impedance and delay is to be achieved.
  • US-A 5,146,113 describes an integrated circuit having several narrow, circuit-board mounted elongated resistance strips to provide a board-mounted circuit with a predetermined input and/or output impedance.
  • US-A 5,281,934 describes a microwave multiplexer which is entirely of microstrip construction.
  • One object of the present invention is to provide a method of selecting an output signal from a plurality of input signals when multiplexing, therewith to obtain good signal quality in a simple and inexpensive manner.
  • This object is achieved with a method in which at least two signals are received on inputs which correspond to said signals, and in which one signal is selectively conducted from one of the inputs to a transmission line from which an output signal is obtained.
  • Another object of the invention is to provide a method of selecting an output signal from a plurality of input signals when multiplexing wherein distortion in the output signal can be reduced in later stages in a simple manner.
  • each input signal includes two parts and in which each of said two input signal parts is conducted from one of the inputs to a respective transmission line.
  • a further object of the invention is to provide a multiplexing related method for selecting an output signal from a plurality of input signals which also offer an output signal that has essentially the same signal level as the input signals or is only slightly amplified in comparison therewith.
  • Still another object of the present invention is to provide a multiplexer, a protection switch unit including one such multiplexer, and a telecommunications network which includes one such protection switch unit, where good signal quality is obtained in a simple and inexpensive manner when selecting an output signal from a plurality of input signals.
  • the multiplexer includes two or more inputs and an output and has a first connection point in each input connected to a first transmission line via a respective first externally controllable signal forwarding device, said first transmission line being connected to a first connection point in the output.
  • Yet a further object of the invention is to provide a multiplexer, a protection switch unit which includes one such multiplexer, and a telecommunications network which includes one such protection switch unit wherein distortion in output signals from the multiplexer can be readily reduced in later stages.
  • This object is achieved with a multiplexer, a protection switch unit and a telecommunications network wherein a second connection point in each multiplexer input is also connected to a second transmission line via a respective second externally controllable signal forwarding device, said second transmission line being connected to a second connection point in said output.
  • Still yet a further object of the invention is to provide a multiplexer, a protection switch unit that includes one such multiplexer and a telecommunications network that includes one such protection switch unit wherein multiplexer output signals have essentially the same signal level as the input signals or only a slightly amplified variable signal level in comparison therewith.
  • This object is achieved with a multiplexer, a protection switch unit and a telecommunications network in which an amplifier is connected between the multiplexer input and said transmission line.
  • Fig. 1 is a block schematic of an inventive telecommunications system
  • Fig. 2 is a circuit diagram of an inventive multiplexer
  • Fig. 3 is a circuit diagram of an alternative embodiment of the multiplexer shown in Fig. 2.
  • Fig. 1 is a block schematic of a telecommunications system which operates with CMI- signals transmitted at transmission speeds in the range of about 140-155 Mb/s.
  • Each protection unit 2 is connected to the exchange 1 via a respective terminal access unit 3 (TAU), of which only eight are shown even though these units will actually be sixteen in number.
  • TAU terminal access unit 3
  • the main duty of the protection units 2 is to convert single signals incoming to the terminal access units 3 and to the protection switch unit 4 into differential signals, and to convert differential signals outgoing from the exchange 1 via the terminal access units 3 and the protection switch unit 4 to single signals.
  • the protection switch unit 4 includes a multiplexer or selector and a demultiplexer. The multiplexer functions to receive all of the signals incoming on the conductors and to selectively forward one of said signals, and the demultiplexer functions to receive a signal outgoing from the exchange 1 and to forward this signal to a selected signal conductor.
  • Fig. 2 illustrates an embodiment of an inventive multiplexer, wherein only two inputs are shown for the sake of simplicity, although it will be understood that the multiplexer will normally have sixteen inputs.
  • a first of the inputs has a first and a second connection point IN1+ and IN1-.
  • the first connection point IN1+ of the first input is connected to a first signal forwarding conductor device Q2 via a resistor R2, said device Q2 being an RF transistor in the illustrated case.
  • the resistor R2 is connected to the emitter of the transistor Q2 in the illustrated case.
  • the base of the transistor Q2 is connected via a resistor R9 to a voltage source VBB which has an internal impedance such that the base is earthed with respect to the signal delivered to the connection point IN1+.
  • the collector of the transistor Q2 is connected via a resistor R41 to a transmission line or conductor TLINE_1 provided in a multiplexer circuit board.
  • the transmission line TLINE_1 is terminated at both ends with a respective resistor R12 and R44, which in turn are connected to a voltage source VCC.
  • the voltage source VCC may have the same voltage as the voltage source VBB.
  • the second connection point IN1- of the first input is connected to a second transmission line TLINE_2 mounted on the multiplexer circuit board via a resistor R4, an RF-transistor Q3 and a further resistor R43, similar to the first connection point IN1-.
  • the base of the transistor Q3 is connected to the voltage source VBB via a resistor R11.
  • the other end of the TLINE_2 is terminated with a resistor R7 and a resistor 45, which are connected to the voltage source VCC.
  • Respective emitters of the first and second transistors Q2 and Q3 are connected to one end of a first externally controlled switch means S2 via a respective resistor R31 and R33. The other end of the switch S2 is connected to earth.
  • connection points IN2+ and IN2- of a second input are connected to the first and the second transmission lines TLINE_1 and TLINE_2 respectively in exactly the same way, via a resistor R1 , an RF-transistor Q1 and a resistor R40, and via a resistor R3, an RF-transistor Q4 and a resistor R42.
  • Respective bases of the transistors Q1 and Q2 are connected to the first and the second transmission lines TLINE_1 and TLINE_2 respectively in exactly the same way, via a resistor R1 , an RF-transistor Q1 and a resistor R40, and via a resistor R3, an RF-transistor Q4 and a resistor R42.
  • Q4 are connected to the voltage source VBB via a respective resistor R8 and R10.
  • Respective emitters of the transistors Q1 and Q4 are connected to a second externally controlled switch S1 via respective resistors R30 and R32 in exactly the same way as with the first input, said switch S1 also being connected to earth similar to the switch
  • the transistors 0.1, Q2, Q3 and Q4 and associated components are so placed along the transmission lines TLINE_1 and TLINE_2 that mismatches and reflections will be minimal. In reality, further inputs are correspondingly placed along said transmission lines TLINE_1 and, TLINE_2.
  • a differential amplifier D_AMP has one input and is connected to the first transmission line TLINE_1 at a first connection point +
  • the amplifier D_AMP has an output which has two connection points +0 and -0 which are each connected to a respective connection point OUT+ and OUT- in the output.
  • the amplifier D_AMP may also include the resistors R44 and R45.
  • each of the transmission lines TLINE_1 and TLINE_2 has the form of a microstrip included in the board circuitry and to which the transistors are connected.
  • These microstrips are preferably rectilinear, have identical lengths and are essentially of unitary width.
  • An important feature of this embodiment, however, is that the two transistors at each input have equally long paths to the connection points +1 and -I in the input of the amplifier D_AMP.
  • the transmission lines TLINE_1 and TLINE_2 may optionally be slightly narrower at those points where the transistors are connected, so as to match the impedance of a microstrip to the additional capacitance that is supplied by a passive transistor.
  • the impedances of respective transmission lines can be matched to the capacitances of the passive transistors by choosing the values of the terminating resistors R7, R12, R44 and R55 so as to correspond to the transmission lines having the additional distributed capacitances that the inputs supply.
  • transmission lines are parallel plane lines (stripline) disposed in intermediate layers of the circuit board.
  • This transmission line embodiment would require the transistors to be connected to said lines by means of bushings or throughlets, which would make the matching problem slightly more difficult to resolve than when the transistors are connected to a microstrip.
  • the inputs and outputs of the multiplexer are often arranged in the form of parallel plane lines that extend through the interior of the circuit board.
  • the multiplexer illustrated in Fig. 2 functions with differential signals, which results in less distortion in the signals leaving the multiplexer.
  • the multiplexer operates as follows: Two input signals are received on a respective input IN1+, IN1- and IN2+ IN2- (only two inputs are shown for the first circuit, although in reality sixteen input signals are normally received via sixteen inputs. Other numbers of signals may be received however, such as four or eight for instance.)
  • One of the inputs is activated by the first externally controlled switch S2, which activates the transistors Q2 and Q3 connected to the input when said input is closed.
  • the second input is passive, i.e. the second switch S1 is off.
  • the switches may comprise any one of a number of different designs known to the person skilled in this art, and may have the form of transistors for instance.
  • the switches S1 and S2 are controlled by a control circuit arranged in the protection switch unit and functioning to close a switch depending on which of the aforesaid terminal access units is inoperative. This switching function may also be accomplished directly from the aforesaid exchange.
  • the transistors Q2 and Q3 are biassed and the input signal is forwarded through the transistors Q2 and Q3 to the transmission lines TLINE_1 and TLINE_2.
  • the signal propagates in both directions on the transmission lines TLINE_1 and TLINE_2 and one half of the signal, which has essentially one half of the amplitude of the input signal, is received in the amplifier D_AMP.
  • this amplifier could equally as well be placed in the other end of the transmission lines TLINE_1 and TLINE_2. Because of the terminating resistors R7, R12, R44 and R55, mismatching at the active input connection points to the transmission lines TLINE_1 and TLINE_2 will not result in reflections.
  • the amplifier D_AMP then amplifies the signal such that the output signal will obtain the same signal level as the input signal. Amplification of the amplifier D_AMP can also be adapted to take into account losses in cables and electrical contacts.
  • the earthed base stages in the transistors Q2 and Q3 in the active input give a precise terminating impedance, since this is determined in the most part by the emitter series resistance when the biassing current is sufficiently high. This gives good termination of incoming signals and therewith prevents reflections.
  • the collector output impedance will be high in relation to the load to be driven, in other words the transmission line. Any variation that may occur in the collector impedance will have very little affect on signal quality and the level of the output signal.
  • each connection point in each input is connected to a respective base via a respective resistor and to the voltage source VBB via a respec ⁇ tive resistor.
  • the emitters of the transistors at respective inputs must be mutually connected by further resistors.
  • the transistors are replaced with PIN- diodes D2, D1, D4 and D3, each of which has its cathode connected to a respective connection point IN1+, IN2+, IN1- and IN2- in the input via a respective resistor R2, R1 , R4 and R3, while the anodes of said diodes are connected directly to a respective transmission line TLINE_1 and TLINE_2.
  • This circuit lacks the voltage source VBB and the resistors connected between said voltage source and respective transistor bases in the Fig. 2 embodiment.
  • resistors R31, R30, R33 and R32 connected between the switches S1 , S2 and the connection points are replaced with impedances Z31 , Z30, Z33 and Z32.
  • the terminating impedance is determined in an active input, for instance the first input of the series resistors R2 and R4, the impedances Z31, Z33 and the series resistance in the diodes D2 and D4 and all following transmission lines with terminations.
  • the impedances may be in the form of just a resistor or as a resistor in series with an inductor. Resistors in series with an inductor give a high impedance, which means that all current to the diodes D1, D2, D3 and D4 will also go out to the transmission lines TLINE_1 and TLINE_2.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Amplifiers (AREA)
  • Electronic Switches (AREA)

Abstract

L'invention concerne primo un multiplexeur qui sert, au cours d'un processus de multiplexage, à sélectionner un signal de sortie parmi plusieurs signaux d'entrée, secundo une unité de commutation de secours qui comporte ledit démultiplexeur et tertio un réseau de télécommunications comportant ladite unité de commutation de secours, ledit multiplexeur ayant une sortie (OUT+, OUT-) et au moins deux entrées (IN+, IN-, IN2+, IN2-) qui reçoivent chacun un signal d'entrée respectif. Un premier point de connexion (IN1+, IN2+) au niveau de chaque entrée est relié à une première ligne de transmissions (TLINE_1) par l'intermédiaire d'un premier dispositif manoeuvrable d'acheminement des signaux (Q1, Q2). Un organe de commutation à commande externe (S2, S1) est également relié à chaque sortie pour l'acheminement d'un signal ou au moins d'une partie de signal reçu au niveau de ladite entrée vers une première ligne de transmission (TLINE_1). Cette première ligne de transmission (TLINE_1) est reliée à un premier point de connexion (OUT+) de la sortie, où l'on obtient un signal de bonne qualité.
EP96917756A 1995-06-01 1996-05-22 Multiplexeur, unite de commutation de secours, reseau de telecommunications et procede de multiplexage Withdrawn EP0872055A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
SE9502011 1995-06-01
SE9502011A SE504521C2 (sv) 1995-06-01 1995-06-01 Multiplexor, skyddskopplingsenhet, telekommunikationsnät samt förfarande vid multiplexering
PCT/SE1996/000658 WO1996038939A1 (fr) 1995-06-01 1996-05-22 Multiplexeur, unite de commutation de secours, reseau de telecommunications et procede de multiplexage

Publications (1)

Publication Number Publication Date
EP0872055A1 true EP0872055A1 (fr) 1998-10-21

Family

ID=20398485

Family Applications (1)

Application Number Title Priority Date Filing Date
EP96917756A Withdrawn EP0872055A1 (fr) 1995-06-01 1996-05-22 Multiplexeur, unite de commutation de secours, reseau de telecommunications et procede de multiplexage

Country Status (8)

Country Link
EP (1) EP0872055A1 (fr)
JP (1) JPH11507479A (fr)
KR (1) KR19990022025A (fr)
CN (1) CN1185877A (fr)
AU (1) AU705474B2 (fr)
CA (1) CA2220966A1 (fr)
SE (1) SE504521C2 (fr)
WO (1) WO1996038939A1 (fr)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03259561A (ja) * 1990-03-09 1991-11-19 Fujitsu Ltd 半導体装置
JPH04286230A (ja) * 1991-03-14 1992-10-12 Fujitsu Ltd 現用／予備用回線切替方式
WO1993017500A1 (fr) * 1992-02-20 1993-09-02 Northern Telecom Limited Circuit differentiel a logique a couplage par l'emetteur
US5281934A (en) * 1992-04-09 1994-01-25 Trw Inc. Common input junction, multioctave printed microwave multiplexer
GB9405771D0 (en) * 1994-03-23 1994-05-11 Plessey Telecomm Telecommunications system protection scheme

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO9638939A1 *

Also Published As

Publication number Publication date
SE9502011L (sv) 1996-12-02
SE504521C2 (sv) 1997-02-24
CA2220966A1 (fr) 1996-12-05
AU6019496A (en) 1996-12-18
WO1996038939A1 (fr) 1996-12-05
CN1185877A (zh) 1998-06-24
AU705474B2 (en) 1999-05-20
KR19990022025A (ko) 1999-03-25
SE9502011D0 (sv) 1995-06-01
JPH11507479A (ja) 1999-06-29

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