EP0710161A1 - Post-traitement d'un substrat portant un revetement, avec un gaz contenant un halogene active pour enlever des residus - Google Patents

Post-traitement d'un substrat portant un revetement, avec un gaz contenant un halogene active pour enlever des residus

Info

Publication number
EP0710161A1
EP0710161A1 EP94922123A EP94922123A EP0710161A1 EP 0710161 A1 EP0710161 A1 EP 0710161A1 EP 94922123 A EP94922123 A EP 94922123A EP 94922123 A EP94922123 A EP 94922123A EP 0710161 A1 EP0710161 A1 EP 0710161A1
Authority
EP
European Patent Office
Prior art keywords
gas
substrate
space
photoresist
halogen
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP94922123A
Other languages
German (de)
English (en)
Other versions
EP0710161A4 (fr
Inventor
Eileen R. Sparks
James C. Mitchener
Stuart N. Rounds
John C. Matthews
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fusion Systems Corp
Original Assignee
Fusion Systems Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fusion Systems Corp filed Critical Fusion Systems Corp
Publication of EP0710161A1 publication Critical patent/EP0710161A1/fr
Publication of EP0710161A4 publication Critical patent/EP0710161A4/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H01L21/02046—Dry cleaning only
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C17/00—Surface treatment of glass, not in the form of fibres or filaments, by coating
    • C03C17/28—Surface treatment of glass, not in the form of fibres or filaments, by coating with organic material
    • C03C17/32—Surface treatment of glass, not in the form of fibres or filaments, by coating with organic material with synthetic or natural resins
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C23/00—Other surface treatment of glass not in the form of fibres or filaments
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/42—Stripping or agents therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H01L21/31133—Etching organic layers by chemical means
    • H01L21/31138—Etching organic layers by chemical means by dry-etching
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C2218/00—Methods for coating glass
    • C03C2218/30—Aspects of methods for coating glass not covered above
    • C03C2218/32—After-treatment
    • C03C2218/328—Partly or completely removing a coating

Definitions

  • the present invention is concerned with a post treatment method for the removal of material (i.e., material that has previously been subjected to a removal treatment) .
  • the removal process of the present invention involves using a gas containing halogen in an excited state and at pressures of greater than 50 torr.
  • the present invention is especially advantageous in removal of photoresist residues, and most especially, those difficult to remove residues created from ion implantation and from etching procedures.
  • integrated circuit components which correspond to the desired pattern are formed by processes, including plasma etching or ion implantation.
  • the photoresist After the integrated circuit components are formed, it is desired to strip the photoresist from the wafer, which at this point, has already served its useful purpose.
  • the relative ease or difficulty with which the photoresist may be stripped depends on the degree to which physical and chemical changes have been induced in the resist during the specific plasma etching, or ion implantation processes.
  • plasma etching and ion implantation induce physical and chemical changes in the photoresist, so that stripping is particularly difficult.
  • Ion implant residues are residues remaining after ashing a wafer that has been implanted with a dopant specie of interest, typically arsenic, boron, or phosphorus, in order to create the electronically active structure.
  • This residue may consist of fragments of the initial resist that may have combined with the implanted specie to create a complex organometallic material that is not readily amenable to removal.
  • the second example is that of sidewall polymer residue that may be created intentionally to aid in creating a desired etch geometry, or unintentionally as a consequence of processing, particularly in a fluorine containing plasma environment, such that the resultant polymer is not readily amenable to removal.
  • This residue may contain perfluorinated or chlorofluorinated organic materials.
  • wet oxidative developers such as sulfuric acid-hydrogen peroxide solution
  • plasma ashing the most common techniques which have been used for photoresist stripping.
  • wet oxidative developers such as sulfuric acid-hydrogen peroxide solution
  • plasma ashing the technique of plasma ashing.
  • a further technique for photoresist stripping comprises exposing the photoresist to an ozone-containing gaseous atmosphere.
  • ozone-containing gaseous atmosphere In Ury, et al., U.S. Patent No. 4,885,047, entire disclosure of which is incorporated hereby by reference, a photoresist stripping method using ozone which achieves high stripping rates was disclosed. The high stripping rates are achieved by passing the ozone over the photoresist through a narrow gap, while the resist is held at an elevated temperature.
  • an oxidizing gas such as a mixture of ozone and oxygen
  • the gas flows radially in a narrow gap defined by the wafer, and a quartz plate to the wafer edge. As the gas flows over the wafer, the photoresist is oxidized and thereby removed.
  • the treatment gas is used up, i.e., the concentration of atomic oxygen, oxygen, and ozone decreases, as the gas flows over the water surface. Since the gas is introduced at the center of the wafer, the photoresist at the edge which, as discussed above, requires the most reaction to remove, is subject to the least potent gas.
  • an apparatus wherein there is a space above the photoresist having both a peripheral area which encompasses the periphery of the space, and a central area is provided.
  • the oxidizing gas is introduced at the peripheral area of the space, near which the edge of the wafer is located. The gas is caused to flow from the edge to the center of the wafer, where it is exhausted.
  • An object of the present invention is to provide a process for removing material from the surface of a substrate, wherein the material is that which is remaining after prior removal treatment.
  • a further object of the present invention is to remove as much as possible of photoresist residue including ion implant residues and sidewall polymer residues.
  • Figure 2 is a cross-section of one portion of a photoresist removal apparatus suitable for use in the invention.
  • Figure 3 shows the other portion of a removal apparatus partly in cross section suitable for use in the invention.
  • Figure 4 shows the removal apparatus having both portions.
  • the process of the present invention employs a gaseous mixture that contains excited halogen.
  • suitable halogens employed are fluorine containing compounds such as CF * ,, C 2 F 6 , CHF 3 , CFH 3 , C 2 H 2 F 4 , C 2 H 4 F 2 , CH 2 F 2 , CH 3 CF 3 , SF 6 , NF 3 and the corresponding iodines, bromines and chlorines.
  • the preferred halogens are the fluorine containing materials, such as CF .
  • the excited halogen containing gas is created by passing the halogen through cell 1 (see Figure 1) , which may be of the silent or corona discharge type, which have been used for producing ozone.
  • cell 1 which may be of the silent or corona discharge type, which have been used for producing ozone.
  • the ozonizer available from Fusion Systems Corporation made pursuant to U.S. Patent No. 4,970,056 to Wooten is suitable.
  • the excitation is carried out at a pressure of greater than 50 torr, more usually at a pressure of at least 100 torr, preferably at a pressure of about 500 to about 800 torr, and most preferably about 600 to about 800 torr.
  • the flow rate of the halogen containing gas is typically about 0.001 to about 30 standard liters per minute (SLM) , to about and more typically about 0.06 - 5 SLM.
  • the treatment time i.e., the amount of time the gas and substrate are in contact
  • the gas containing excited halogen is conveyed via conduit 2 to process chamber 3 to thereby treat the substrate.
  • Suitable process chambers are disclosed in U.S. Patent Nos. 4,885,047 and 5,071,485.
  • the process chamber is typically at a pressure of greater than 50 torr, more usually at a pressure of at least 100 torr, preferably at a pressure of about 500 to about 800 torr, and most preferably about 600 to about 800 torr.
  • the temperature of the substrate on which the material to be removed is located is typically at least about 100°C, more typically about 200°C to about 350°, and most typically about 250°C to about 350°C.
  • Figures 2 to 4 show a process chamber suitable for carrying out the process of the present invention.
  • Figure 2 shows a portion of the chamber
  • Figure 3 shows a further portion
  • Figure 4 shows the two portions in working relationship.
  • Space 34 has a peripheral area which encompasses the periphery of the space (adjacent the wafer edge) , and a central area.
  • An annular orifice 32 is provided, and the gas is fed through the orifice to the peripheral area of space 34.
  • the space 34 is preferably a narrow gap of about 4 millimeters or less, more preferably less than 2 millimeters, and most preferably less than about 0.6 mm.
  • the annular orifice may be of such diameter and angular disposition that the gas is directed so that it impinges the heated platform ( Figure 3) just beyond the edge of the wafer, and is then directed to the edge of the wafer, and in turn towards the center of the wafer.
  • the annular orifice 32 is defined by an outer distribution plate 40 and an inner distribution plate 41.
  • the distribution plates 40, 41 may be exchanged for those of different sizes, so that different size wafers can be accommodated. Additionally, the angular orientation of the orifice may be changed in those instances where it is desirable to impinge the edge of the wafer directly without first impinging the heated platform.
  • Treatment gas enters the treatment chamber through a gas fitting 44. It flows around an annular distribution ring 46 and then through the annular orifice 32.
  • the chamber may have a plurality of local orifices which are disposed in an annular ring around the chamber.
  • the annular distribution ring 46 may be as shown, but instead of opening an annular orifice, may open into a plurality of discrete, local orifices.
  • a water jacket 50 is provided to allow control of the inlet gas temperature.
  • the treatment gas outlet conduit 54 In the central area of space 34 is the treatment gas outlet conduit 54. After the gas moves across the wafer, it flows into orifice 56 which is at the mouth of conduit 54. Plate 58 is secured to the bottom of the chamber portion shown in Figure 2, and along with the wafer defines a narrow gap over through which the treatment gases flow as they react with the material to be removed.
  • the wafer 30 is held on a wafer support platform 50, which is heated, for example, by a resistance heater.
  • the wafer support platform may be operated at temperatures up to above 350°C, high temperature being desirable to optimize the process.
  • the wafer support platform is supported on flexible support rods 52, and lift mechanism 54 is arranged to raise and lower the platform via support rods 52. Water is circulated in jacket 58 to effect temperature control.
  • Figure 4 depicts the two portions of the treatment chamber in operative relationship.
  • the bottom portion would be mounted on a chassis, while the top portion would be connected to a power mechanism for lifting
  • processing gas is fed to inlet 44. It flows to annular distribution ring 46, and out annular orifice 32 to the heated platform 50, and the edge of the water (not shown) , then across the wafer to centrally located outlet orifice 56.
  • the material to be removed by the present invention is material that has already been subjected to removal treatment technique, including wet stripping, plasma ashing and preferably a non-plasma ozone treatment, such as that disclosed in U.S. Patent Nos. 4,885,047 and 5,071,485.
  • the process of the present invention is a post treatment.
  • the same chamber can be used for both treatment steps of the process, if desired.
  • photoresists typically composed of novolak resin based compositions containing a photoactive compound, such as a naphthoquinone, are used. Typically, such are applied to the desired substrate at thicknesses of about 0.5 to 5 microns.
  • a photoactive compound such as a naphthoquinone
  • the underlying substrates on which the material to be removed is located include silicon wafers, polycrystalline silicon, silicon dioxide, silicon nitride, glass, Group IV- VI semiconductor substrates, such as gallium arsenide, and ceramics, such as aluminum oxide, aluminium suicide, aluminum nitride, and silicon carbide.
  • EXAMPLE 1 A six-inch silicon wafer was coated with a 1.5 micron layer of KTI 820 photoresist (positive novolak type resin) . The photoresist is patterned and then subjected to ultraviolet light and heat, in order to harden it as would be done in the course of regular manufacturing. The silicon wafer is then implanted with As + at 80 KeV and 5 E 15 dose.
  • KTI 820 photoresist positive novolak type resin
  • the resist coated wafer is then treated in a first step in an asher as shown in Figures 2-4 herein, and Figures 2-4 of U.S. Patent No. 5,071,485.
  • the flow of gases consisted of 24 slm ozone, oxygen mixture and 0.8 slm excited N 2 0 from a corona discharge ozone generator.
  • the process time is about 120 seconds, and the substrate is at a temperature of about 325°C.
  • the treated substrate is then post treated in a second step in the same asher used in the first step.
  • the flow of gases consisted of 1 slm excited CF* that was activated in a silent or corona discharge cell.
  • the treatment time is 60 seconds and the substrate is at a temperature of 325°C during the treatment.
  • Example 1 is repeated, except that the silicon wafer is implanted with As + at 80 KeV, 1 E 16 dose. The results obtained are similar to those obtained in Example 1.
  • Example 1 is repeated, except that the silicon wafer is ion implanted with BF 2 at 80 KeV 1 E 16 dose. The results obtained are at least as good as those obtained in Example 1.
  • Example 1 is repeated, except that the silicon wafer is ion implanted with P+ at 120 KeV, 1 E 16 dose. The results obtained are similar to those obtained in Example 1.
  • EXAMPLE 5 is repeated, except that the silicon wafer is ion implanted with P+ at 120 KeV, 1 E 16 dose. The results obtained are similar to those obtained in Example 1.
  • EXAMPLE 5 is repeated, except that the silicon wafer is ion implanted with P+ at 120 KeV, 1 E 16 dose. The results obtained are similar to those obtained in Example 1.
  • Example 1 is repeated, except that the silicon wafer also contains silicon dioxide layer therein, and is ion implanted with P+ at 120 KeV, 1 E 16 dose. The results obtained are similar to those obtained in Example 1.

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Geochemistry & Mineralogy (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

Les produits qui ont été soumis au préalable à un traitement d'élimination sont enlevés d'un substrat par contact avec un gaz contenant un halogène activé, à une pression supérieure à 50 torrs.
EP94922123A 1993-07-16 1994-07-12 Post-traitement d'un substrat portant un revetement, avec un gaz contenant un halogene active pour enlever des residus Withdrawn EP0710161A4 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US9241793A 1993-07-16 1993-07-16
US92417 1993-07-16
PCT/US1994/007751 WO1995002472A1 (fr) 1993-07-16 1994-07-12 Post-traitement d'un substrat portant un revetement, avec un gaz contenant un halogene active pour enlever des residus

Publications (2)

Publication Number Publication Date
EP0710161A1 true EP0710161A1 (fr) 1996-05-08
EP0710161A4 EP0710161A4 (fr) 1997-04-16

Family

ID=22233105

Family Applications (1)

Application Number Title Priority Date Filing Date
EP94922123A Withdrawn EP0710161A4 (fr) 1993-07-16 1994-07-12 Post-traitement d'un substrat portant un revetement, avec un gaz contenant un halogene active pour enlever des residus

Country Status (4)

Country Link
EP (1) EP0710161A4 (fr)
JP (1) JPH09502646A (fr)
DE (1) DE710161T1 (fr)
WO (1) WO1995002472A1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19630705A1 (de) 1995-08-30 1997-03-20 Deutsche Telekom Ag Verfahren zur Herstellung von 3-dimensional strukturierten Polymerschichten für die integrierte Optik
JP2001519040A (ja) * 1995-08-30 2001-10-16 ドイッチェ テレコム アーゲー 三次元表面の構造化におけるコントラストを向上させる方法

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0316835A1 (fr) * 1987-11-19 1989-05-24 Oki Electric Industry Company, Limited Méthode et dispositif pour nettoyer des substrats
US4885047A (en) * 1986-08-11 1989-12-05 Fusion Systems Corporation Apparatus for photoresist stripping
US5071485A (en) * 1990-09-11 1991-12-10 Fusion Systems Corporation Method for photoresist stripping using reverse flow
DE4040061A1 (de) * 1990-07-04 1992-01-23 Mitsubishi Electric Corp Verfahren zur herstellung einer strukturierten verbindungsschicht
US5174881A (en) * 1988-05-12 1992-12-29 Mitsubishi Denki Kabushiki Kaisha Apparatus for forming a thin film on surface of semiconductor substrate
US5178721A (en) * 1990-08-09 1993-01-12 Fujitsu Limited Process and apparatus for dry cleaning by photo-excited radicals
GB2272995A (en) * 1992-11-09 1994-06-01 Gold Star Co Method for making a semiconductor and apparatus for the same

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5221423A (en) * 1986-05-20 1993-06-22 Fujitsu Limited Process for cleaning surface of semiconductor substrate
US4797178A (en) * 1987-05-13 1989-01-10 International Business Machines Corporation Plasma etch enhancement with large mass inert gas
KR0145302B1 (ko) * 1988-04-28 1998-08-17 카자마 젠쥬 얇은 막의 형성방법
US4961820A (en) * 1988-06-09 1990-10-09 Fujitsu Limited Ashing method for removing an organic film on a substance of a semiconductor device under fabrication
US4970056A (en) * 1989-01-18 1990-11-13 Fusion Systems Corporation Ozone generator with improved dielectric and method of manufacture

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4885047A (en) * 1986-08-11 1989-12-05 Fusion Systems Corporation Apparatus for photoresist stripping
EP0316835A1 (fr) * 1987-11-19 1989-05-24 Oki Electric Industry Company, Limited Méthode et dispositif pour nettoyer des substrats
US5174881A (en) * 1988-05-12 1992-12-29 Mitsubishi Denki Kabushiki Kaisha Apparatus for forming a thin film on surface of semiconductor substrate
DE4040061A1 (de) * 1990-07-04 1992-01-23 Mitsubishi Electric Corp Verfahren zur herstellung einer strukturierten verbindungsschicht
US5178721A (en) * 1990-08-09 1993-01-12 Fujitsu Limited Process and apparatus for dry cleaning by photo-excited radicals
US5071485A (en) * 1990-09-11 1991-12-10 Fusion Systems Corporation Method for photoresist stripping using reverse flow
GB2272995A (en) * 1992-11-09 1994-06-01 Gold Star Co Method for making a semiconductor and apparatus for the same

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
APPLIED PHYSICS LETTERS, vol. 59, no. 20, 11 November 1991, NEW YORK US, pages 2576-2578, XP000350209 AOYAMA ET AL: "Removing native oxide from Si(100) surfaces using photoexcited fluorine gas" *
JOURNAL OF VACUUM SCIENCE AND TECHNOLOGY: PART A, vol. 3, no. 3, May 1985, NEW YORK US, pages 1027-1034, XP002025091 VIG: "UV/Ozone cleaning of surfaces" *
See also references of WO9502472A1 *
SOLID STATE TECHNOLOGY, vol. 35, no. 9, September 1992, WASHINGTON US, pages 43-48, XP000328430 FLAMM : "Dry plasma resist stripping Part II : Physical processes" *

Also Published As

Publication number Publication date
EP0710161A4 (fr) 1997-04-16
JPH09502646A (ja) 1997-03-18
DE710161T1 (de) 1997-01-30
WO1995002472A1 (fr) 1995-01-26

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