EP0664497B1 - Signal zum Übertragen von Informationen, insbesondere Zeitinformationen über eine Zweidrahtleitung bei einer Uhrenanlage - Google Patents
Signal zum Übertragen von Informationen, insbesondere Zeitinformationen über eine Zweidrahtleitung bei einer Uhrenanlage Download PDFInfo
- Publication number
- EP0664497B1 EP0664497B1 EP94810041A EP94810041A EP0664497B1 EP 0664497 B1 EP0664497 B1 EP 0664497B1 EP 94810041 A EP94810041 A EP 94810041A EP 94810041 A EP94810041 A EP 94810041A EP 0664497 B1 EP0664497 B1 EP 0664497B1
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- EP
- European Patent Office
- Prior art keywords
- frequency
- alternating voltage
- signal
- voltage
- modulated alternating
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- G—PHYSICS
- G04—HOROLOGY
- G04G—ELECTRONIC TIME-PIECES
- G04G9/00—Visual time or date indication means
- G04G9/0005—Transmission of control signals
- G04G9/0011—Transmission of control signals using coded signals
Definitions
- the present invention relates to a method for generating a Signal, which is the transmission of time information over a two-wire line is used in a clock system with at least one master clock, of which the Two-wire line goes out and with at least one connected to the two-wire line Terminal, for example a slave clock, the master clock one Means for generating and sending the signal and the terminal a device for receiving and decoding the signal is assigned.
- DE-25 25 631 discloses a clock system in which the the above disadvantage is eliminated by the fact that not only minute impulses transmitted via the two-wire line to which the slave clocks are connected but effective time information. There is in every slave clock a device for receiving and decoding this time information available. An electronic circuit is provided for this. As a result of that a 50 Hz AC voltage is connected to the two-wire line Contains time information in the form of phase jumps and the simultaneously is provided to supply the slave clocks with electrical energy Installation and straightening of such systems is relatively simple and takes little time.
- the time information is by a certain sequence of positive and encoded negative phase jumps.
- the phase jumps are either by switching the AC voltage to its inverted at zero crossing Voltage or generated by suppression of a half wave.
- the AC voltage present on the two-wire line is obtained by the aforementioned Phase jumps a DC component. This is the bigger the more phase jumps with the same polarity follow.
- the non-negligible capacitive and / or inductive Components may occur during the transfer of the above Phase jumps difficulties. For example, it's impossible Install isolating transformers in the two-wire line, as is well known DC components are not transmitted and thus the phase jumps be distorted. This can be caused by incorrect reception of the time information in the slave clocks. To prevent this from happening the evaluation circuit in the slave clocks correspondingly complex.
- FR-A-2 477 572 discloses a clock system in which both periodic impulses as well as time information simultaneously via a common one Two-wire line can be transmitted. This allows slave clocks from both types can be mixed in the same system.
- the rectangular ones used digital signals can also contain a DC voltage component and consequently only with difficulty in a system with isolating transformers be used.
- EP-A-0 335 797 for the transmission of time information between a master clock and a variety of slave clocks rectangular Signals used.
- the frequency-modulated AC voltage is such that the duration a half-wave of the frequency-modulated AC voltage with the first Frequency is greater than half the duration of an unmodulated period AC voltage and that the duration of a half-wave of frequency-modulated AC voltage with the second frequency is less than half the duration a period of the unmodulated AC voltage.
- the voltage time area of a half-wave of the frequency-modulated AC voltage is the same as the first frequency the voltage time area of a half wave of the frequency-modulated AC voltage the advantage of the second frequency is that the signal has no DC component.
- the signal can go through without any distortion, over two-wire lines with large capacitive and / or inductive components are transmitted. Isolation transformers can be installed in the line, especially in the arrangement of power amplifiers in the two-wire line is of great importance. In this way it is possible to have a two-wire network with many stub lines to build up, bridging distances of up to a few 10 km per branch line can be.
- the signal according to the invention is coded so that a half wave the frequency-modulated AC voltage with the first frequency followed of a half-wave of the frequency-modulated AC voltage with the second Frequency represents one of two binary logic states and that a half-wave of the frequency-modulated AC voltage with the second Frequency followed by a half wave of the frequency modulated AC voltage with the first frequency the other of the two binary logic states represents.
- the advantage is that with every half wave there is a logical one State "L” or "H”, or "0” or "1", and that, no matter what the consequence of the logic states, no distortion of the signal.
- the detection of a change in the logical state is, as described later, extremely simple.
- the frequency swing of the frequency-modulated AC voltage is expediently chosen to be relatively small. It is at least 0.2% and at most 10%. A frequency deviation of 2% has preferably been selected.
- the greater the frequency swing the greater the harmonic content of the signal, which increases the interference on other systems.
- At a very small frequency swing is the effort to evaluate the Time information contained in the signal is correspondingly large.
- the frequency of the AC voltage signal is preferably 50 Hz and the AC voltage signal is also used to supply who uses slave clocks with electrical energy.
- an AC signal is not a problem for the transmission of large powers up to several 100 watts. Thanks to the advantage that it has no DC component the signal according to the invention temporarily to a higher voltage transformed and transformed down again at the beginning of a branch line will. In this way, line losses can be reduced.
- the signal according to the invention can be the master clock are generated by amplitude values of a period of the signal for the one logic state and amplitude values of a period of the signal for the other logical state each in a table Memory of a computing device are specified in digital form.
- the means of calculation determines, depending on whether a logical state "H” or "L” the corresponding table to be read out to generate the period of the AC voltage to be sent. It are then the digitized amplitude values of one or the other table output to a digital / analog converter.
- the two tables mentioned can be in one non-volatile Storage means are permanently stored.
- the computing means comprises a software program which, when the Master clock first the individual digital values that are in the memory cells for the must be registered in both tables.
- a device for Receiving and decoding of the signal according to the invention present.
- the decoding of the frequency-modulated signal can be carried out in an extremely simple manner with a small amount of circuitry, if with a Comparator the zero crossings of the received AC signal be determined.
- a microprocessor it is a simple one, the times of two consecutive zero crossings to measure and compare.
- An amendment to the logical state of the frequency-modulated with the Encoded binary signal transmitted AC signal is always given when two consecutive zero crossings with one same time interval can be determined. This is always the case when either two half-periods follow at the first frequency or if two half-periods follow at the second frequency.
- Each end device can contain its own supply voltage source or it can be with the received frequency modulated AC signal be supplied with electrical energy.
- the Two-wire line in addition to the comparator mentioned, a rectifier circuit and a voltage regulator switched.
- Time information or other commands for slave clocks can be encrypted and / or other end devices may be included.
- a binary diagram which is essentially the above number Bits include, not just the effective time in hours, minutes, seconds and fractions of seconds, but also, for example, the date Day of the week and / or information, whether summer time or winter time prevails, etc., to transmit.
- control commands in binary Diagram that are used to set up the clock system, by adding each slave clock after receiving a corresponding control code is set to a predefined time, for example zero o'clock.
- the microprocessor after receiving the Control Codes calculates the number of control pulses based on the current displayed time (is saved) for setting the aforementioned Time to be given to the stepper motor of the slave clock in rapid succession have to.
- slave clocks not only slave clocks, but also other terminals, for example switching devices, may also be arranged.
- the microprocessor it contains a specific command, that was contained in the binary diagram, evaluated any Trigger switching process. For example, this can be an acoustic signal or be some other process.
- Fig. 1 is a clock system on which the inventive Signal can be used, shown in principle. They are with the reference numbers 1 shows a two-wire line which is connected to a device 5 for generating and transmission of the signal according to the invention of a master clock 2 is. Along the two-wire line 1 are a terminal 3 and several slave clocks 4 connected in parallel on the two-wire line. The terminal 3 and each the slave clocks comprises a device 6 for receiving and decoding of the signal according to the invention. The device 6 is only in Fig. 1 Terminal 3 visible. The device 6 comprises a microprocessor which in the Terminal 3 controls a control relay 39.
- This control relay 39 can for example are then switched on when in the signal according to the invention Command code is included, for example the code with a selector switch 35 has been selected corresponds. With the contact or contacts of the Control relays 39 can trigger or control any operation.
- the microprocessor controls accordingly by outputting pulses the stepper motors in the slave clocks 4.
- slave clocks with analog display without Second hand shown.
- the slave clocks 37 have an analog display with second hand.
- the reference numeral 38 indicates a slave clock Digital display.
- the reference numeral 7 indicates the signal according to the invention for Transmission of information, in particular time information, about the Two-wire line 1 pointed out. This signal is based on the following Fig. 2 described in more detail.
- FIG. 2 shows the signal 7 according to the invention as a voltage-time diagram recorded.
- the ordinate of the diagram corresponds to the Voltage of the signal and the abscissa represent a time base.
- Dashed with 13 an unmodulated sinusoidal AC voltage is entered, which has a period 10 of time T.
- the positive half wave of this unmodulated AC voltage has a voltage peak value U. and lasts T / 2 of period 10.
- the negative half wave has a peak voltage from -U to and also takes T / 2 of period 10.
- the frequency-modulated signal 7 likewise comprises periods 10 of duration T. Each period has a first half-wave 8, which is positive in the case shown, and a second half-wave 9, which is negative in the case shown.
- the signal 7 is frequency-modulated such that either the duration T 1 of the first half-wave 8 is greater than half the duration T / 2 of the period 10 and then the second half-wave 9 has a duration T 2 that is correspondingly shorter than the duration T / 2 of the period 10, or that the first half-wave 8 has a duration T 2 which is less than the duration T / 2 of the period 10 and the second half-wave 9 comprises a duration T 1 which is greater than the duration T / 2 of Period 10.
- T 1 and T 2 of the two half-waves always result in the total duration T of period 10.
- this half-wave is accompanied by an AC voltage signal a first frequency 11 is formed.
- this half-wave is formed by an AC signal with a second frequency 12.
- Each period of the signal according to the invention has a half-wave which is formed with the first 11 or second frequency 12, and then has a half-wave which is formed with the second 12 or first frequency 11.
- Each period 10 of the signal 7 according to the invention contains a logic state “H” or “L” of a digital signal.
- the first half-wave 8 has the time T 1 and the second half-wave 9 has the time T 2 , this corresponds, for example, to an encrypted binary signal with the logic state "H”. If the first half-wave 8 has the time T 2 and the second half-wave 9 the time T 1 , this corresponds to the binary signal with the other logic state "L" according to the selected example.
- the sequences of the individual periods thus contain a sequence of logic states "H", "L".
- the peak values of the frequency-modulated AC voltage were all of the same size, for example correspond to the voltage peak values U or - U of the unmodulated AC voltage 13, a DC voltage component would be present in each period 10 of the frequency-modulated AC voltage, which could then always have a negative effect on the transmission of the signal if the signal were not delivered to purely ohmic loads. Since the two-wire line in watch systems is rarely purely ohmic, it has been ensured by adapting the peak values of the individual half-waves that the DC voltage component of each period 10 of the frequency-modulated AC voltage signal 7 is zero.
- the half wave with the duration T 1 accordingly has a peak voltage U1 or - U1 which is smaller than the peak value U or - U of a half wave of the unmodulated AC voltage 13 and the half wave with the duration T 2 has a peak voltage U2 or - U2, which is greater than the peak value of a half-wave of the unmodulated AC voltage 13.
- a first voltage time area 33 which is formed over the half-wave with the time T 1 , corresponds to a second voltage time area 34, which is formed over a half-wave with the duration T 2 is. Since no period 10 of the frequency-modulated AC voltage signal according to the invention contains a DC voltage component, the wave train of the signal according to the invention also has no DC voltage component.
- T 1 + T 2nd 1 f
- FIG. 3 shows the device 5 for generating and transmitting the device according to the invention Signals shown in block diagram form.
- a storage means is identified in which a first Function table 15 and a second function table 16 are included.
- Each The function tables include a number of memory locations, each containing a digital one Word is stored, which has an amplitude value of a corresponds to the voltage train to be formed.
- the first function table approximately 50 to 100 memory locations store amplitude values with which a period of the signal according to the invention according to FIG. 2 can be formed, in which the first half-wave 8 has the duration T 1 and the second half-wave 9 the duration T 2 . In the figure, such a period corresponds to a logic state "H".
- the table is therefore also referred to as an "H" table.
- amplitude values are stored in an equal number of memory locations, with which a period of the signal according to the invention can be formed, the first half-wave 8 of which has the time T 2 and the second half-wave 9 of which has the time T 1 .
- such a half-wave corresponds to a logic state "L”.
- This function table is therefore referred to as an "L" table.
- the device 5 further comprises a reading means 17, 18 from a computing means 17 and an address counter 18.
- the digital data. which are pending at a data input 40 activates the computing means an address line 44 indicating the "H” table, or one Address line 45, which indicates the "L” table.
- the address counter With the address counter, the switched by a clock generating means 41 via a clock line 42 the individual are via an address bus 43 in the storage means 14 Memory cells with the digitized amplitude values for the one to be generated Signal period driven sequentially.
- the function table values either the "H” table 15 or the "L” table 16, are on a bus 46 output in serial order and fed to a digital / analog converter 19. At its output, this produces a low-pass filter and amplifier 47 is supplied, an analog output signal.
- the filtered and amplified Signal is frequency modulated as the inventive AC voltage signal 7 via an output 48 to that of the device 5 outgoing two-wire line, not shown in this FIG.
- the computing means 17 and the address counter 18 are preferably
- a device 6 for receiving and decoding of the signal according to the invention is a device 6 for receiving and decoding of the signal according to the invention. Such a device is in each terminal 3 and 4 in each slave clock.
- the two wires 24, 25 of the two-wire line 1 are tapped with a first line 21 and with a second line 22 and fed to a comparator means 20.
- the two lines 21, 22 each pass through a series resistor R2, R1 to an input of an operational amplifier OP1.
- Its output 23 changes its logic state whenever there is a zero crossing at which the AC voltage signal tapped on the two-wire line 1 takes place, that is to say when the two inputs of the operational amplifier OP1 exchange their polarity.
- An RC element (R 3 , C 1 ), which is connected in parallel to the inputs, keeps interference voltages away from the operational amplifier OP1.
- the output 23 of the comparator means 20 has a signal input 53 of a timing device 26 connected.
- the timing device is shown in the Example, a microprocessor 31 that is controlled by a crystal Q1 Clock oscillator 52 has.
- the microprocessor is used for decoding the times from the information from the received AC voltage signal between two zero crossings or between two logical state changes of the comparator means measured. Based on the logical status sequence of the received binary diagram is an output signal 27, for example Minute pulses, a slave clock 32 fed.
- the microprocessor points a reset input 54 and a watchdog output 55, which input or output are connected to a watchdog circuit 51.
- the watchdog circuit is used to monitor the functioning of the microprocessor 31 and that in it restart the running program if necessary.
- T n is the duration of the half period n
- T n - 1 is the duration of the n preceding half period.
- the device 6 is supplied with electrical energy in the shown example with a power supply 50, which is in a voltage supply module 49 is arranged, and on the output side to supply the Device provides the necessary DC voltage, and that on the input side is connected to a local power supply.
- a power supply 50 which is in a voltage supply module 49 is arranged, and on the output side to supply the Device provides the necessary DC voltage, and that on the input side is connected to a local power supply.
- the device 6 shown in FIG. 5 differs from that 4 only in that instead of the power supply module 49 means 29, 30 for generating a DC voltage from the received according to the invention via the two-wire line 1 frequency-modulated AC voltage are present.
- the means 29 include essentially a bridge rectifier D3, D4, D5, D6 in gritting circuit and a filter capacitor C6.
- the one smoothed by the filter capacitor C6 DC voltage is used to close the comparator means 20 feed before the DC voltage means 30, a voltage regulator REG1 and a subsequent further filter capacitor C7 is supplied.
- the DC voltage stabilized at the output of the voltage regulator REG1 is used to make up the remaining part of the circuit of the device 6 Food.
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Arrangements For Transmission Of Measured Signals (AREA)
- Electric Clocks (AREA)
- Selective Calling Equipment (AREA)
- Alarm Systems (AREA)
Description
Claims (14)
- Verfahren zur Erzeugung eines Signals, welches der Übertragung von Zeitinformationen über eine Zweidrahtleitung (1) bei einer Uhrenanlage mit mindestens einer Hauptuhr (2) dient, von der die Zweidrahtleitung abgeht und mit wenigstens einem an die Zweidrahtleitung angeschalteten Endgerät (3, 4), zum Beispiel einer Nebenuhr (4), wobei die Hauptuhr eine Einrichtung (5) zum Erzeugen und Senden des Signals umfasst und dem Endgerät (3, 4) eine Vorrichtung (6) zum Empfangen und Dekodieren des Signals zugeordnet ist, dadurch gekennzeichnet, dass man als das genannte Signal eine frequenzmodulierte Wechselspannung (7) erzeugt, und dass die erste Halbwelle (8) einer Periode (10) der frequenzmodulierten Wechselspannung (7) eine erste (11) oder eine zweite Frequenz (12) aufweist und je die zweite Halbwelle (9) der Periode (10) der frequenzmodulierten Wechselspannung (7) die andere der beiden Frequenzen (12, 11) umfasst.
- Verfahren nach Anspruch 1, dadurch gekennzeichnet, dass die Periodendauer (T) einer unmodulierten Wechselspannung (13) und jede Periodendauer (T) der frequenzmodulierten Wechselspannung (7) gleich sind.
- Verfahren nach Anspruch 1 oder 2, dadurch gekennzeichnet, dass die Dauer (T1) einer Halbwelle (8) der frequenzmodulierten Wechselspannung (7) mit der ersten Frequenz (11) grösser ist als die halbe Dauer (T/2) einer Periode (10) der unmodulierten Wechselspannung (13), und dass die Dauer (T2) einer Halbwelle (9) der frequenzmodulierten Wechselspannung (7) mit der zweiten Frequenz (12) kleiner ist als die halbe Dauer (T/2) einer Periode (10) der unmodulierten Wechselspannung.
- Verfahren nach einem der Ansprüche 1 bis 3, dadurch gekennzeichnet, dass die Spannungs-Zeitfläche (33) einer Halbwelle (8) der frequenzmodulierten Wechselspannung (7) mit der ersten Frequenz (11) gleich der Spannungs-Zeitfläche (34) einer Halbwelle (9) der frequenzmodulierten Wechselspannung (7) mit der zweiten Frequenz (12) ist.
- Verfahren nach einem der Ansprüche 1 bis 4, dadurch gekennzeichnet, dass eine Halbwelle (8) der frequenzmodulierten Wechselspannung (7) mit der ersten Frequenz (11), gefolgt von einer Halbwelle (9) der frequenzmodulierten Wechselspannung (7) mit der zweiten Frequenz (12) einen (H) von zwei binären logischen Zuständen (H, L) darstellt und dass eine Halbwelle (9) der frequenzmodulierten Wechselspannung (7) mit der zweiten Frequenz (12), gefolgt von einer Halbwelle (8) der frequenzmodulierten Wechselspannung (7) mit der ersten Frequenz (11) den anderen (L) der beiden binären logischen Zustände (H, L) darstellt.
- Verfahren nach einem der Ansprüche 1 bis 5, dadurch gekennzeichnet, dass der Frequenzhub der frequenzmodulierten Wechselspannung (7) mindestens 0,2 % und höchstens 10 %, vorzugsweise 2 %, beträgt.
- Verfahren nach Anspruch 6, dadurch gekennzeichnet, dass die Frequenz (1/T) der frequenzmodulierten Wechselspannung (7) 50 Hz beträgt, und dass die frequenzmodulierte Wechselspannung zum Liefern von elektrischer Energie an das mindestens eine Endgerät (3, 4) bestimmt ist.
- Einrichtung zum Durchführen des Verfahrens nach Anspruch 1 sowie zum Senden des nach dem Verfahren von Anspruch 1 erzeugten Signals, dadurch gekennzeichnet, dass ein digitales Speichermittel (14) mit einer ersten (15) und einer zweiten Funktionstabelle (16) je mit einer Anzahl darin gespeicherter digitaler Worte vorhanden ist, dass die Worte in der ersten Funktionstabelle (15) Amplitudenwerte der frequenzmodulierten Wechselspannung (7) mit der ersten Frequenz (11) für die erste Halbwelle (8) und der zweiten Frequenz (12) für die zweite Halbwelle (9) darstellen, und dass die Worte in der zweiten Funktionstabelle (16) Amplitudenwerte der frequenzmodulierten Wechselspannung (7) mit der zweiten Frequenz (12) für die erste Halbwelle (9) und der ersten Frequenz (11) für die zweite Halbwelle (8) darstellen.
- Einrichtung nach Anspruch 8, dadurch gekennzeichnet dass Mittel (17, 18) zum Auslesen der Worte aus dem Speichermittel (14) und ein Digital- / Analogwandler (19) vorhanden sind, wobei zum Bilden der frequenzmodulierten Wechselspannung (7) in ununterbrochener Folge ein Wort nach dem anderen aus der ersten oder der zweiten Funktionstabelle (15, 16) auslesbar und an den Digital- / Analogwandler (19) anlegbar ist.
- Einrichtung nach Anspruch 8 oder 9. dadurch gekennzeichnet, dass zum Steuern der Einrichtung (5) ein Rechenmittel (17) und ein Steuerprogramm vorhanden sind, wobei das Steuerprogramm derart festgelegt ist, dass nach jedem Einschalten der Einrichtung die Worte für die beiden Funktionstabellen (16, 17) berechnet und im Speichermittel (14) abgespeichert werden.
- Einrichtung zum Durchführen des Verfahrens nach Anspruch 1 sowie zum Empfangen und Dekodieren des nach dem Verfahren von Anspruch 1 erzeugten Signals, dadurch gekennzeichnet, dass ein Komparatormittel (20) mit Eingängen (21, 22) und einem Ausgang (23) vorhanden ist, dass je ein Eingang (21, 22) im wesentlichen mit je einem Draht (24, 25) der Zweidrahtleitung (1) verbunden ist und der Ausgang (23) immer dann seinen Zustand ändert, wenn die frequenzmodulierte Wechselspannung (7) einen Nulldurchgang aufweist, und dass ein Mittel (26) zum Messen der Zeiten zwischen je zwei Nulldurchgängen vorhanden ist.
- Einrichtung nach Anspruch 11, dadurch gekennzeichnet, dass das Mittel zum Messen ein Teil einer Steuerschaltung ist, wobei die Steuerschaltung ein digitales Ausgangssignal (27) zum Steuern des Endgerätes (3, 4) erzeugt, welches Ausgangssignal seinen logischen Zustand immer dann ändert wenn das Zeitmessmittel zwei aufeinanderfolgende Nulldurchgänge mit einem gleichen Zeitintervall (T1, T2) feststellt.
- Einrichtung nach Anspruch 12, dadurch gekennzeichnet, dass die Steuerschaltung ein Mikroprozessor (26) ist.
- Einrichtung nach einem der Ansprüche 11 bis 13, dadurch gekennzeichnet durch Mittel (29, 30) zum Erzeugen von mindestens einer Gleichspannung für die Versorgung des Endgerätes (3, 4) mit elektrischer Energie.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE59406084T DE59406084D1 (de) | 1994-01-24 | 1994-01-24 | Signal zum Übertragen von Informationen, insbesondere Zeitinformationen über eine Zweidrahtleitung bei einer Uhrenanlage |
AT94810041T ATE166732T1 (de) | 1994-01-24 | 1994-01-24 | Signal zum übertragen von informationen, insbesondere zeitinformationen über eine zweidrahtleitung bei einer uhrenanlage |
EP94810041A EP0664497B1 (de) | 1994-01-24 | 1994-01-24 | Signal zum Übertragen von Informationen, insbesondere Zeitinformationen über eine Zweidrahtleitung bei einer Uhrenanlage |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP94810041A EP0664497B1 (de) | 1994-01-24 | 1994-01-24 | Signal zum Übertragen von Informationen, insbesondere Zeitinformationen über eine Zweidrahtleitung bei einer Uhrenanlage |
Publications (2)
Publication Number | Publication Date |
---|---|
EP0664497A1 EP0664497A1 (de) | 1995-07-26 |
EP0664497B1 true EP0664497B1 (de) | 1998-05-27 |
Family
ID=8218198
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP94810041A Expired - Lifetime EP0664497B1 (de) | 1994-01-24 | 1994-01-24 | Signal zum Übertragen von Informationen, insbesondere Zeitinformationen über eine Zweidrahtleitung bei einer Uhrenanlage |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP0664497B1 (de) |
AT (1) | ATE166732T1 (de) |
DE (1) | DE59406084D1 (de) |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2447572A1 (fr) * | 1979-01-23 | 1980-08-22 | Flonic Sa | Systeme de distribution de l'heure a des horloges receptrices |
FR2629608B1 (fr) * | 1988-03-31 | 1992-01-10 | Peugeot | Procede et dispositif de synchronisation en reception d'une horloge locale d'une station d'un reseau de communication, notamment d'un vehicule automobile |
-
1994
- 1994-01-24 DE DE59406084T patent/DE59406084D1/de not_active Expired - Fee Related
- 1994-01-24 AT AT94810041T patent/ATE166732T1/de not_active IP Right Cessation
- 1994-01-24 EP EP94810041A patent/EP0664497B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0664497A1 (de) | 1995-07-26 |
ATE166732T1 (de) | 1998-06-15 |
DE59406084D1 (de) | 1998-07-02 |
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