EP0662650B1 - Dispositif pour le mesure d'intervalles courtes - Google Patents

Dispositif pour le mesure d'intervalles courtes Download PDF

Info

Publication number
EP0662650B1
EP0662650B1 EP94117713A EP94117713A EP0662650B1 EP 0662650 B1 EP0662650 B1 EP 0662650B1 EP 94117713 A EP94117713 A EP 94117713A EP 94117713 A EP94117713 A EP 94117713A EP 0662650 B1 EP0662650 B1 EP 0662650B1
Authority
EP
European Patent Office
Prior art keywords
pulses
mess
input
time
recording
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP94117713A
Other languages
German (de)
English (en)
Other versions
EP0662650A2 (fr
EP0662650A3 (fr
Inventor
Roland Eusemann
Patrick Zisch
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Landis and Gyr Technology Innovation AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Landis and Gyr Technology Innovation AG filed Critical Landis and Gyr Technology Innovation AG
Publication of EP0662650A2 publication Critical patent/EP0662650A2/fr
Publication of EP0662650A3 publication Critical patent/EP0662650A3/fr
Application granted granted Critical
Publication of EP0662650B1 publication Critical patent/EP0662650B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G04—HOROLOGY
    • G04F—TIME-INTERVAL MEASURING
    • G04F10/00—Apparatus for measuring unknown time intervals by electric means

Definitions

  • the invention relates to a device and a method for measuring small time intervals according to the preamble of claim 1 and 8 and on use of the same in a flow volume meter.
  • the measurement duration and energy consumption increase with increasing length of the time interval, so that the ratio of the maximum to the minimal time intervals, i.e. the dynamics that must be limited to reasonable Get measurement times and low energy consumption.
  • the dynamics of this process is therefore limited to values below 1000.
  • these have analog Measurement method a poor long-term stability.
  • An example of such an application provides the measurement of a volume flow in a measuring tube by means of ultrasound after the Runtime difference method, which is known for example from CH-PS 604 133.
  • the flow is based on the transit time difference between two ultrasonic wave packets determined that during the transmission phase of a measurement cycle simultaneously from two in one a small distance in front of the front of the measuring tube arranged transducers for Ultrasound are emitted and the measuring tube in the opposite direction rush through, the flow of a medium in the measuring tube one Ultrasonic wave packet slows down and the other accelerates.
  • the two Ultrasound wave packets therefore hit each time with a time shift opposite and on the meanwhile for the receiving phase of the measuring cycle a transducer switched over to reception, which converts the sound waves into reception signals converts.
  • the two received signals thus have one of the flow dependent phase shift ⁇ , which can be determined by a phase detector.
  • the phase detector generates the from the two received signals for each period Ultrasonic waves a pulse, the duration or width of the phase shift ⁇ is proportional between the two received signals. With these procedures the relative errors with decreasing width of the input pulses.
  • the invention has for its object an inexpensive device for measurement of small time intervals with which the width of pulses within a Pulse packages with high resolution and high dynamics with low Energy expenditure is measurable.
  • FIG. 1 a shows the voltage U P of output pulses during the reception phase at the output of a phase detector 99 in FIG. 1 b of a flow volume counter 98 described in the above-mentioned CH-PS 604 133 as a function of time t.
  • the phase detector 99 of the flow volume counter is set up to compare the transit time of the ultrasonic waves delayed or accelerated on the way through a measuring tube 97 by the flow velocity of a medium.
  • a pulse packet delivered at the output of the phase detector 99 during a measurement phase is composed of N individual pulses, N being advantageously chosen to be 50 or more. All N individual pulses within the same pulse packet ideally have the same width from the time interval ⁇ t, since the flow speed changes only imperceptibly during a measurement phase.
  • phase detector 99 is connected via an input line 114 to a measuring circuit 100, which is also suitable, among other things, for measuring the flow velocity of the medium in a flow volume counter 98.
  • the block diagram of the measuring circuit comprises an input switch 1, a measuring oscillator 2, a start logic 3, a first gate circuit 4, a second Gate circuit 5, a summing element 6, a stop logic 7, an input pulse counter 8, a sampling pulse counter 9, a time stretcher 10 and a microprocessor 11.
  • Das Summing element 6 and the input pulse counter 8 are registration means for the Input pulses, while the measuring oscillator 2, the sampling pulse counter 9 and that Time expansion element 10 as a measuring means for the registered input pulses work together.
  • the microprocessor 11 is used to control the measurement process and Evaluation of the measurement results and is set up via control lines 101 to 104 the input switch 1, the start logic 3, the input pulse counter 8 and the Sampling pulse counter 9 connected.
  • the measuring oscillator 2 transmits calibration pulses predetermined width over a connection 105 to the input switch 1 and over a Line 106 to the second gate circuit 5.
  • the start logic 3 controls via gate control lines 107 and 108 the first gate circuit 4 and the second gate circuit 5.
  • the stop logic 7 is via a start line 109 with the start logic 3 and via a stop line 110 with the first gate circuit 4 connected, there is also an enable connection 111 to Time expansion element 10, while the stop logic 7 via a stop signal line 112 from Summing element receives 6 control commands.
  • the time expansion element 10 has a connection by means of an end signal line 113 to the second gate circuit 5.
  • the input pulses whose width ⁇ t (FIG. 1a) is to be measured, reach the Switch 1 of the measuring circuit on the input line 114.
  • the calibration pulses generated by the measuring oscillator 2 on the Connection 105 or the input pulses on input line 114 at the output of the switch 1 passed on a signal line 115.
  • the signal line 115 branches to start logic 3, to first gate circuit 4 and to stop logic 7.
  • the output of the first Gate 4 is connected to the pulse inputs of the pulse line 116 Summing element 6 and the input pulse counter 8 connected.
  • a Sum pulse line 117 provides the connection between the output of the Summing element 6 and the signal input of the timing element 10 ago.
  • the exit of the second gate circuit 5 is connected with a scanning pulse line 118 to the pulse input of the Sampling pulse counter 9 connected.
  • Inputs of the microprocessor 11 are over Counter lines 119 and 120 with the input pulse counter 8 and Scanning pulse counter 9 connected to read out the corresponding counter reading.
  • the microprocessor 11 puts the circuit in before each measurement or calibration cycle a defined initial state via reset lines, not shown here, which the Microprocessor 11 with start logic 3, first and second gate circuits 4 and 5, the summator 6, the stop logic 7, the input pulse counter 8 and the Connect the sampling pulse counter 9. After each end of a measurement cycle, the reads Microprocessor 11, the input pulse counter 8 and the sampling pulse counter 9 from and uses the counter readings to calculate the width ⁇ t of the input pulses. Within a The measuring cycle is made exclusively by the start logic 3 and the stop logic 7 controlled, which in particular handle all time-critical processes. This indicates the Advantage that the higher-level control by the microprocessor 11 is not must be time-critical.
  • the measuring circuit has two operating modes, the measuring and the calibration operation. Switching between the two operating modes takes place in electronic input switch 1 by the microprocessor 11 via the first Control line 101 is controlled. Depending on the signal level on the first control line 101 are either the input pulses in measuring mode at the output of switch 1 or the calibration pulses from the measuring oscillator 2 in the calibration mode, which are transmitted via the Signal line 115 to start logic 3, first gate circuit 4 and stop logic 7 be directed.
  • the measuring circuit deals with the input and calibration pulses completely equivalent. The following is therefore instead of the input and Calibration pulses only spoken of the input pulses on the signal line 115.
  • the start logic 3 After release by the microprocessor 11 via the second control line 102, the start logic 3 opens the first gate circuit 4 by means of a signal on the first gate control line 107 with the following rising edge of the input pulses arriving at the start logic 3 via the signal line 115, so that the input pulses also pass through pass through the first gate circuit 4 via the pulse line 116 to the input of the summing element 6 and to the input of the input pulse counter 8.
  • the summing element 6 adds up the widths ⁇ t i of the successive input pulses. As soon as the sum ⁇ t S of the widths ⁇ t i exceeds a predetermined limit, the registration interval R, the stop logic 7 is activated via the stop signal line 112.
  • the stop logic 7 waits until the input pulse currently present has ended and then closes the first gate circuit 4 with a signal on the stop line 110 and at the same time resets the start logic 3 with a signal on the start line 109 into the ready state. There are therefore no further input pulses to the summing element 6 and to the input pulse counter 8.
  • the number k mess of the summed input pulses is stored in the input pulse counter 8 and is transmitted via the first counter line 119 to the microprocessor 11 for evaluation and stored there.
  • the start logic 3 initiates the opening of the second gate circuit 5 via the second gate control line 108, and at the same time the stop logic 7 enables the time expansion element 10 via the enable line 111, the time expansion element 10 releasing the sum pulse on the sum pulse line 117 the width ⁇ t S is extended in time by the expansion factor z and sends a positive output pulse with the width z ⁇ ⁇ t S via the end signal line 113 to the second gate circuit 5.
  • the calibration pulses generated by the measuring oscillator 2 pass through the line 106 as a scanning pulse to the scanning pulse counter 9 via the scanning pulse line 118 and are summed up there until the second gate circuit 5 through the falling edge of the timing signal via the end signal line 113 10 sent output pulse is closed.
  • the number N mess stored in the scanning pulse counter 9 is read out and stored by the microprocessor 11 via the second counter line 120.
  • the pulses arriving on the pulse line 116 are first summed up in the summing element 6 and the sum pulse is then stretched in the time expansion element 10.
  • a signal for opening the second gate circuit 5 is sent to the start logic 3 via the start line 109 in synchronism with the closing of the first gate circuit 4 by the stop logic 7.
  • the stop logic 7 releases the time expansion element 10 via the enable line 111, the time expansion element 10 extending the sum pulse on the pulse line 116 of the width ⁇ t S by the expansion factor z and a positive output pulse with the width z ⁇ ⁇ t S via the End signal line 113 sends to the second gate circuit 5.
  • the calibration pulses on line 106 then pass through the second gate circuit 5 through the scanning pulse line 118 to the scanning pulse counter 9, the count of which after closing the second gate circuit 5 is the number N mess .
  • the advantage of the time expansion circuit 10 is due to the fact that it extends the width ⁇ t i of the input pulses present on the signal line 115 by an expansion factor z. Since in reality the widths ⁇ t i of the N individual input pulses of the same measurement cycle only scatter by a very small amount as a result of the "jitter" in the switching elements and this random error is averaged out by the method described, for a measurement cycle with the same widths ⁇ t is the N to calculate individual input pulses.
  • T osz is the period of the measuring oscillator 2.
  • the stop logic 7 ensures that the width ⁇ t S of the sum pulse is almost constant. This has the effect that the number N mess of the sampling pulses is almost independent of the width ⁇ t of the input pulses.
  • the Measuring time and energy consumption are not only small, but also large pulse widths ⁇ t low. This facility thus ensures a inexpensive and significant increase in dynamics compared to the known analog time measurement method and solves the problem according to the invention.
  • the minimum required number N of the input pulses in the pulse packet and the number k mess of the summed input pulses in the input pulse counter 8 are not independent of one another, since the number N determines the shortest, measurable time interval ⁇ t and its digitization error f because the number k mess is not greater than N can be.
  • the long-term constancy of the expansion factor z depends both on the temperature and changes over time due to the aging of the components. To the result resulting poor long-term stability and the temperature drift of the measuring circuit too is controlled by the microprocessor 11, a calibration as the first measurement of the measuring circuit carried out after a predetermined number of measuring cycles the input pulses on input line 114 is repeated.
  • the calibration pulses from the measuring oscillator 2 are applied to the signal line 115 via the input switch 1.
  • the microprocessor 11 calculates the expansion factor z according to equation (3) .
  • z (N cal ⁇ T osz ) / (k cal ⁇ ⁇ t osz )
  • the microprocessor 11 stores the expansion factor z or N cal and k cal for the evaluation of the subsequent measurement cycles.
  • the temperature response and the stability of the measuring circuit are only determined by the properties of the measuring oscillator 2.
  • the use of a quartz-controlled measuring oscillator 2 has the advantage that the measuring circuit is characterized by a low temperature drift and high long-term stability, as are also known from inexpensive quartz crystals.
  • the measuring circuit therefore has the particular advantage that it does not require fast counting circuits and can therefore be manufactured inexpensively.
  • FIG. 3 shows an advantageous embodiment of the invention.
  • the summing element 6 (FIG. 2) and the time expansion element 10 (FIG. 2) comprise a capacitor 12, two constant current sources, the charging source 13 and the current sink 14, two controllable switches 15 and 16 and two comparators 17 and 18 with associated reference voltage sources 19 and 20.
  • the first reference voltage source 19 has a first reference voltage U R1 and the second reference voltage source 20 has a second reference voltage U R2 .
  • To control the first controllable switch 15, its control input is connected to the output of the first comparator 17 via a switching line 121.
  • the constant current source 13 or 14 can be connected to the one pole 21 of the capacitor 12 with the voltage U via the controllable switch 15 or 16.
  • One input of the comparator 17 or 18 is connected to the pole 21, while the other input of the comparator 17 or 18 is connected to the reference voltage source 19 or 20.
  • the start logic 3 (FIG. 2) and the stop logic 7 (FIG. 2) are combined as control logic 22.
  • the microprocessor 11 is connected to the components of the measuring circuit, via the first control line 101 to the input switch 1, via the second control line 102 to the control logic 22, via the third control line 103 to the input pulse counter 8, via the fourth control line 104 with the scanning pulse counter 9.
  • the microprocessor 11 reads out the count of the input pulse counter 8 or the scanning pulse counter 9 via the first or second counter line 119 or 120.
  • the summation of the widths ⁇ t (FIG. 1a) of the input or calibration pulses on the signal line 115 and the time expansion by the expansion factor z are carried out by charging and discharging the capacitor 12 with the aid of the two constant current sources, a charging current source 13 and a current sink 14 Voltage U across the capacitor 12 is monitored by the two comparators 17 and 18. Between the measurements, the comparator 17 in conjunction with the charging current source 13 and the switch 15 ensures that the voltage U at the pole 21 is approximately equal to the first reference voltage U R1 of the reference voltage source 19. As soon as the voltage U falls below the reference voltage U R1 , the output of the comparator 17 and thus the level on the switching line 121 go to logic "high".
  • the registration interval R is defined as the difference between the two reference voltages U R1 and U R2 .
  • the circuit can also be designed such that the input pulses charge the capacitor 12 via the second controllable switch 16 and the capacitor 12 is discharged via the first controllable switch 15.
  • the control logic 22 blocks by outputting a "low” level on the first gate control line 107, the AND gate used as the first gate circuit 4.
  • the control logic 22 waits until the next positive edge of the input pulses on signal line 115 until set by them the level of the first gate control line 107 to logic "high” the measuring operation enables.
  • the input pulses on the input line 114, or in the calibration mode The calibration pulses of the measuring oscillator 2 (FIG. 2) arrive via the connection 105 via the input switch 1 through the first gate circuit 4 as pulses the pulse line 116 to the input pulse counter 8 and to the control input of the second controllable switch 16.
  • the switchover between measurement and calibration is carried out by the microprocessor 11, which sends a control signal to the control input of the input switch 1 via the first control line 101.
  • the pulses passed by the first gate circuit 4 control the switch 16. Whenever a pulse is present on the pulse line 116 ("high" level), the switch 16 is closed, so that the capacitor 12 via the current sink 14 with a predetermined current I E is being discharged. The switch 16 is open between the successive pulses, so that the capacitor 12 is not discharged during the pulse pauses.
  • the charging current I L is three orders of magnitude smaller than the discharging current I E.
  • FIG. 4 shows the course of the voltage U P of the input pulses on the signal line 115 (FIG. 3) at the top and the course of the voltage U at the pole 21 (FIG. 3) as a function of the time t below.
  • the output of the second comparator 18 goes to logic "low” and sets the control logic 22 connected to the output of the second comparator 18 via a line 122 Standby.
  • the control logic 22 advantageously waits until the falling edge of the input pulse currently present appears, and then blocks the AND gate of the first gate circuit 4 by outputting a "low” level on the first gate control line 107.
  • the control logic 22 thus ensures that this last input pulse with the entire width ⁇ t (FIG. 1a) is also measured. No further pulses now reach the switching input of the second controllable switch 16 via the pulse line 116.
  • the number k mess or k cal of the summed input pulses is stored in the input pulse counter 8 and is read out and further processed by the microprocessor 11 after the end of the measurement.
  • the capacitor 12 After blocking the first gate circuit 4, the capacitor 12 is charged by the charging current source 13 with the charging current I L. As soon as the voltage U at the pole 21 again exceeds the first reference voltage U R1 , the output of the first comparator 17 goes to logic "low". As a result, the second gate control 5 is blocked via the second gate control line 108 for the calibration pulses of the measuring oscillator 2 (FIG. 2) arriving on the line 106 and the summation of the sampling pulses in the sampling pulse counter 9 ends.
  • Equation (7) is thus identical to equation (1) given above.
  • the microprocessor 11 uses the calibration results, the expansion factor z or N cal and k cal , the microprocessor 11 then calculates the width ⁇ t of the input pulses according to equation (4).
  • the measuring circuit When dimensioning the measuring circuit, it is advantageously taken into account that the charging of the capacitor 12 during the pauses of the length ⁇ T S - ⁇ t ⁇ (FIG. 1a) between the input pulses is very much smaller than the discharge during the time ⁇ t. In this case, the time ⁇ t mess is almost independent of the width ⁇ t and the period T S of the input pulses. In particular, the lengths (T - ⁇ t) of the pauses can therefore vary from pulse to pulse and do not have to be constant as shown in FIGS. 1 and 4. In this case too, the measuring circuit always determines the correct width ⁇ t of the input pulses. If the widths ⁇ t differ from pulse to pulse, the measuring circuit determines the correct mean value from the N widths ⁇ t.
  • the first controllable switch 15 remains closed for the entire measurement period .DELTA.t mess , so that disturbances in the measurement process by switching the charging current source 13 on and off are avoided.
  • FIG. 3 there are several electronic components, such as, for example, the Gate circuits 4 and 5, counters 8 and 9, comparators 17 and 18, the Control logic 22, etc., to clarify the description outside the Microprocessor 11 and connected to it via lines have been drawn. With At least some of the functions of these components from the microprocessor 11 are advantageous noticeable, which noticeably reduces the cost of the measuring circuit.
  • the pulse packet (FIG. 1a) contains information coded in the time interval ⁇ t, the width of the pulses, for example the flow velocity of the medium in the flow volume counter of CH-PS 604 133.
  • the measuring circuit also processes pulses with the widths ⁇ t i from a constant pulse stream, since the first gate circuit 4 (FIG. 2) determines the number N mess .

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measurement Of Unknown Time Intervals (AREA)

Claims (7)

  1. Procédé de mesure d'un intervalle de temps Δt dans lequel
    un paquet d'impulsions composé d'un certain nombre (N) d'impulsions individuelles successives de largeur respective Δti est extrait à des fins de mesure au cours d'un cycle de mesure;
    un nombre minimal (kmes) d'impulsions individuelles, dont les largeurs Δti sommées pour former une somme enregistrée (ΔtS) sont immédiatement supérieures à un intervalle d'enregistrement prédéfini (R), est déterminé;
    la somme enregistrée (ΔtS) est multipliée par un facteur de temporisation (z) pour former un temps de balayage (Δtmes),
    le temps de balayage (Δtmes) est mesuré au moyen d'impulsions de balayage (Tosc), et la largeur moyenne Δt des impulsions individuelles est déterminée comme l'intervalle de temps à mesurer Δt à partir du rapport entre le temps de balayage (Δtmes) et le produit du nombre minimal des impulsions d'entrée (kmes) par le facteur de temporisation (z).
  2. Procédé selon la revendication 1, caractérisé en ce qu'un cycle de calibrage, dans lequel des impulsions de calibrage d'une largeur connue Δtosc sont amenées au lieu des impulsions individuelles de largeur inconnue Δti, est introduit après un nombre prédéterminé de cycles de mesure pour étalonner le facteur de temporisation (z).
  3. Procédé selon la revendication 1 ou 2, caractérisé en ce que l'intervalle d'enregistrement (R) est déterminé, en partant d'une tension de référence définie (UR1), comme la différence de deux tensions (UR1; UR2), en ce que la somme enregistrée (ΔtS) est ajoutée comme tension (U) au moyen d'un condensateur (12) pour amener une courant constant (IE) pendant la largeur (Δt) des impulsions individuelles, et en ce que, lorsque l'intervalle d'enregistrement (R) a été dépassé, la tension (U) qui représente la somme enregistrée (ΔtS) est abaissée à la tension de référence (UR1) au moyen d'une source de courant constant d'une deuxième intensité de courant (IL) et le temps nécessaire à cet effet est simultanément mesuré comme temps de balayage (Δtmes) par comptage des impulsions de balayage d'une durée de période (Tosc), le rapport entre la première intensité de courant (IE) et la deuxième intensité de courant (IL) étant constant et égal au facteur de temporisation (z).
  4. Procédé selon l'une quelconque des revendications 1 à 3, caractérisé en ce que les impulsions individuelles sont les impulsions de sortie d'un détecteur de phase (99), dont la largeur Δti dépend de la vitesse d'écoulement d'un milieu.
  5. Dispositif de mise en oeuvre du procédé de mesure selon l'une quelconque des revendications 1 à 4, qui inclut un microprocesseur (11) comme moyen d'évaluation pour évaluer des résultats de mesure et un dispositif de commande pour commander des cycles de mesure et dans lequel
    des moyens d'enregistrement sont prévus pour déterminer les impulsions et des moyens de mesure sont prévus pour les impulsions individuelles enregistrées dans les moyens d'enregistrement,
    les moyens d'enregistrement consistent en un additionneur (6) et un compteur (8) d'impulsions d'entrée qui compte les impulsions d'entrée, afin de déterminer le nombre minimal (kmes) des impulsions individuelles dont les largeurs (Δti) sommées pour former une somme enregistrée (ΔtS) sont immédiatement supérieures à un intervalle d'enregistrement prédéfini (R); et
    les moyens de mesure incluent au moins un oscillateur de mesure (2) pour engendrer des impulsions détectées de la durée de la période (Tosc), un compteur (9) d'impulsions détectées et un temporisateur (10), afin de multiplier la somme enregistrée (ΔtS) par le facteur de temporisation (z) pour former le temps de balayage (Δtmes), de mesurer le temps de balayage (Δtmes) et afin de déterminer la largeur moyenne Δt des impulsions individuelles à partir du rapport entre le temps de balayage (Δtmes) et le produit du nombre minimal des impulsions d'entrée (kmes) par le facteur de temporisation (z).
  6. Dispositif selon la revendication 5, caractérisé en ce qu'un commutateur d'entrée (1) peut être commuté de façon commandée d'une manière telle que les impulsions individuelles sont amenées à l'additionneur (6) dans la première position du commutateur d'entrée (1) et que les impulsions de calibrage lui sont amenées à dans la deuxième position du commutateur d'entrée (1).
  7. Dispositif selon la revendication 5 ou 6, caractérisé en ce que l'additionneur (6) et le temporisateur (10) comportent un condensateur commun (12), et en ce que deux sources (13; 14) de courant constant, qui fournissent les courants (IE ou IL) de charge et de décharge du condensateur, sont prévues.
EP94117713A 1994-01-10 1994-11-10 Dispositif pour le mesure d'intervalles courtes Expired - Lifetime EP0662650B1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
CH5894 1994-01-10
CH5894 1994-01-10
CH58/94 1994-01-10

Publications (3)

Publication Number Publication Date
EP0662650A2 EP0662650A2 (fr) 1995-07-12
EP0662650A3 EP0662650A3 (fr) 1997-04-02
EP0662650B1 true EP0662650B1 (fr) 2000-09-13

Family

ID=4178360

Family Applications (1)

Application Number Title Priority Date Filing Date
EP94117713A Expired - Lifetime EP0662650B1 (fr) 1994-01-10 1994-11-10 Dispositif pour le mesure d'intervalles courtes

Country Status (5)

Country Link
EP (1) EP0662650B1 (fr)
CZ (1) CZ287073B6 (fr)
DE (1) DE59409519D1 (fr)
DK (1) DK0662650T3 (fr)
PL (1) PL175439B1 (fr)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8659360B2 (en) 2011-12-28 2014-02-25 St-Ericsson Sa Charge-to-digital timer
US8618965B2 (en) 2011-12-28 2013-12-31 St-Ericsson Sa Calibration of a charge-to-digital timer
US9379729B2 (en) 2011-12-28 2016-06-28 St-Ericsson Sa Resistive/residue charge-to-digital timer
RU2620191C1 (ru) * 2016-08-22 2017-05-23 Александр Абрамович Часовской Устройство измерения малого временного интервала
CN110412545A (zh) * 2019-07-26 2019-11-05 桂林理工大学 脉冲激光雷达时间间隔的模-数测量电路
CZ308685B6 (cs) * 2019-12-08 2021-02-17 Pavel Ing. Trojánek Zařízení pro přesné měření časových intervalů

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4245192A (en) * 1978-10-19 1981-01-13 Lockheed Corporation Periodicity verification circuit
DE3219788C2 (de) * 1982-05-25 1985-02-28 Siemens AG, 1000 Berlin und 8000 München Durchflußmengenmeßeinrichtung für Fluide und Durchflußmengenmengenmeßeinrichtung zur Verwendung als Wärmemengenzähler
JPS62257067A (ja) * 1986-05-01 1987-11-09 Kenwood Corp 時間幅測定方法

Also Published As

Publication number Publication date
DE59409519D1 (de) 2000-10-19
EP0662650A2 (fr) 1995-07-12
CZ287073B6 (en) 2000-08-16
EP0662650A3 (fr) 1997-04-02
DK0662650T3 (da) 2001-06-11
PL306708A1 (en) 1995-07-24
CZ3995A3 (en) 1995-07-12
PL175439B1 (pl) 1998-12-31

Similar Documents

Publication Publication Date Title
EP0099500B1 (fr) Dispositif à mesure de la période d'impulsions
DE2625162C3 (de) Ultraschall-Impulsechoverfahren zur Bestimmung der Abmessungen, insbesondere der Wanddicke, von Prüfstücken und Schaltvorrichtung zur Ausführung des Verfahrens
EP0452531A1 (fr) Dispositif électrique pour mesurer le temps de propagation d'un signal électrique
EP0262461B1 (fr) Appareil de mesure de vitesse de débit à ultrasons utilisant le procédé à phase-différence
EP0173833A2 (fr) Montage et procédé pour la mesure et la digitalisation d'une résistance
DE10328662B4 (de) Verfahren zur Durchflußmessung mittels eines Ultraschall-Durchflußmessers
EP0662650B1 (fr) Dispositif pour le mesure d'intervalles courtes
DE2824503A1 (de) Vorrichtung zur messung der schallgeschwindigkeit in werkstuecken
DE60004490T2 (de) Verfahren und vorrichtung zur messung der laufzeit eines signals, insbesondere eines ultraschallsignals
EP0829734B1 (fr) Méthode et dispositf de mesure de la différence du temps de parcours d'un signal électrique, électromagnétique ou acoustique
DE3519797C1 (de) Ultraschallpruefvorrichtung zur zerstoerungsfreien Werkstoffpruefung
EP0785443B1 (fr) Procédé et système pour la mesure du temps de propagation de signaux électriques, électromagnétiques, ou acoustiques
DE2503538C2 (de) Gerät zum Erzeugen eines Zeitbezugssignals aus einem Impuls von elektrischen Signalschwingungen
DE3713956C2 (fr)
WO1994010533A1 (fr) Procede et dispositif permettant de determiner sans contact la masse par unite de surface de materiaux minces
EP1563261B1 (fr) Dispositif permettant de determiner et/ou de surveiller le debit volumique et/ou massique d'un milieu
EP1769289B1 (fr) Procede et dispositif de mesure numerique de haute precision d'un signal analogique
DE19703633C2 (de) Verfahren zur Bestimmung eines Zeitintervalls zwischen zwei Ereignissen
DE2641772A1 (de) Durchfluss- oder stroemungsmesseinrichtung
EP1393084B1 (fr) Dispositif de mesure de frequence
EP1014580B1 (fr) Procédé de mesure du retard entre deux signaux d'impulsions périodiques de même fréquence
EP0407676B1 (fr) Procédé de mesure de différence de temps d'un ensemble d'ondes ultrasonores et dispositif de mesure pour sa mise en oeuvre
DE2547746B2 (de) Vorrichtung zur Bildung des arithmetischen Mittelwertes einer Meßgröße
DE2209083C3 (de) Schaltungsanordnung zum Messen der Geschwindigkeit eines sich entlang einer vorgegebenen Spur bewegenden Objektes
DE4302368C1 (de) Verfahren und Vorrichtung zur Ultraschall-Messung der Strömungsgeschwindigkeit von Fluiden

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): CH DE DK FR LI SE

PUAL Search report despatched

Free format text: ORIGINAL CODE: 0009013

AK Designated contracting states

Kind code of ref document: A3

Designated state(s): CH DE DK FR LI SE

17P Request for examination filed

Effective date: 19970227

17Q First examination report despatched

Effective date: 19981002

GRAG Despatch of communication of intention to grant

Free format text: ORIGINAL CODE: EPIDOS AGRA

GRAG Despatch of communication of intention to grant

Free format text: ORIGINAL CODE: EPIDOS AGRA

GRAH Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOS IGRA

GRAH Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOS IGRA

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): CH DE DK FR LI SE

REG Reference to a national code

Ref country code: CH

Ref legal event code: EP

REF Corresponds to:

Ref document number: 59409519

Country of ref document: DE

Date of ref document: 20001019

ET Fr: translation filed
REG Reference to a national code

Ref country code: CH

Ref legal event code: PUE

Owner name: LANDIS & GYR TECHNOLOGY INNOVATION AG (LANDIS & GY

Ref country code: CH

Ref legal event code: NV

Representative=s name: SIEMENS SCHWEIZ AG

RAP2 Party data changed (patent owner data changed or rights of a patent transferred)

Owner name: SIEMENS AKTIENGESELLSCHAFT

REG Reference to a national code

Ref country code: DK

Ref legal event code: T3

REG Reference to a national code

Ref country code: FR

Ref legal event code: TP

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed
PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 20021029

Year of fee payment: 9

REG Reference to a national code

Ref country code: CH

Ref legal event code: PUE

Owner name: LANDIS+GYR GMBH

Free format text: SIEMENS AKTIENGESELLSCHAFT#WITTELSBACHERPLATZ 2#80333 MUENCHEN (DE) -TRANSFER TO- LANDIS+GYR GMBH#HUMBOLDTSTRASSE 64#90459 NUERNBERG (DE)

Ref country code: CH

Ref legal event code: NV

Representative=s name: OK PAT AG PATENTE MARKEN LIZENZEN

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20040730

REG Reference to a national code

Ref country code: FR

Ref legal event code: ST

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20041028

Year of fee payment: 11

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: CH

Payment date: 20041125

Year of fee payment: 11

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: SE

Payment date: 20041126

Year of fee payment: 11

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DK

Payment date: 20041130

Year of fee payment: 11

REG Reference to a national code

Ref country code: CH

Ref legal event code: NV

Representative=s name: RENTSCH & PARTNER

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20051111

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LI

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20051130

Ref country code: DK

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20051130

Ref country code: CH

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20051130

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20060601

REG Reference to a national code

Ref country code: DK

Ref legal event code: EBP

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL

EUG Se: european patent has lapsed