EP0650112B1 - Source de courant constante - Google Patents
Source de courant constante Download PDFInfo
- Publication number
- EP0650112B1 EP0650112B1 EP94115731A EP94115731A EP0650112B1 EP 0650112 B1 EP0650112 B1 EP 0650112B1 EP 94115731 A EP94115731 A EP 94115731A EP 94115731 A EP94115731 A EP 94115731A EP 0650112 B1 EP0650112 B1 EP 0650112B1
- Authority
- EP
- European Patent Office
- Prior art keywords
- constant current
- field effect
- source
- effect transistors
- current source
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/24—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
Definitions
- the invention is based on a constant current source the preamble of claim 1.
- Constant current source For many circuit arrangements, especially in electronics, a constant current source is required. This owns a very high internal resistance, theoretically should be infinite. A realization of one Constant current source is with the help of semiconductor devices possible, e.g. as a so-called current mirror circuit, e.g. from Meinke, Gundlach: Taschenbuch der Hochfrequenztechnik, 4th edition (1986), pp. M22-M23.
- the invention has for its object a generic Specify constant current source using at least a field effect transistor in integrated technology can be produced.
- a first advantage of the invention is that in technically simple and inexpensive way a predeterminable Constant current is adjustable.
- a second advantage is that the set Constant current is almost independent of the manufacturing process of the field effect transistors and hence their electrical properties.
- a third advantage is that the set one Constant current is almost independent of temperature-dependent electrical properties of the field effect transistors.
- a fourth advantage is that only one Type of field effect transistor is necessary.
- a fifth advantage is that in addition to the two field effect transistors only ohmic resistors are needed, which are integrated in a cost-effective manner Technology can be produced.
- a sixth advantage is that the following described circuit arrangement in a reliable and inexpensive Way in GaAs technology integrated circuits e.g. High-frequency circuits, can be integrated is.
- the figure shows two n-channel JFETs A1, A2, which are produced on a semiconductor substrate in the same manufacturing process. Both JFETs A1, A2 have essentially the same pinch-off voltage U p and essentially the same saturation current I DSS .
- the latter is chosen to be substantially larger than the constant current I const to be set , for example I DSS > 5 ⁇ I const .
- the voltage source for example a 7 volt voltage source, one pole (+) is connected to the (circuit) ground M, so that a negative voltage source arises.
- the second JFET A2 is connected as a current source.
- its drain D2 is connected to ground M
- gate G2 and source S2 are connected to one another and connected to a connection of the resistor network R4 to R6, the other connection of which is connected to the minus pole (-) of the voltage source Sp.
- the ohmic resistor network R4 to R6 consists of a series connection of the ohmic resistors R4, R5, which are bridged by the ohmic resistor R6. If the drain current I D2 now flows through this resistance network, a control voltage U GS is generated at the resistor R5 which is dependent on the latter and the drain current I D2 and by means of which the constant current I const flowing through the first JFET A1 can be set.
- the gate G1 of the first JFET A1 is connected to the minus pole (-), to which there is also a connection of the resistor R5.
- Source S1 is at the other terminal of resistor R5.
- Drain D1 is connected to a terminal P1 to which a circuit arrangement through which the constant current I const is to flow can be connected.
- a circuit arrangement through which the constant current I const is to flow can be connected.
- a related source S1 negative voltage U GS at the gate G1 which optimally controls JFET A1.
- the second JFET A2 therefore always measures the current saturation current I DSS , which depends in particular on the production process and the current temperature, and in particular is converted by the resistor R5 into a voltage U GS controlling the first JFET A1. It can be seen that the desired constant current I const is adjustable by changing the resistance R5 in particular.
- the constant current I const remains essentially unchanged with unchanged resistance values of the resistors R4 to R6, even if the pinch-off voltage U p and the saturation current I DSS change within a wide range, for example -1.4 V ⁇ U p ⁇ -1 V; 6m A ⁇ I DSS ⁇ 8.5 mA.
- resistor network R4 to R6 can therefore be calculated as a function of the desired constant current I const .
- the resistors R4 to R6 can therefore be manufactured, for example, in an integrated form without subsequent adjustment.
- Such large tolerance ranges occur in particular of GaAs technology, especially for high and / or High frequency circuits, e.g. so-called millimeter wave circuits.
- the circuit arrangement described is can be produced in MESFET technology for GaAs technology, so that advantageously an integration in monolithic and / or built-in hybrid integrated high-frequency components is possible. With the arrangement described is for example a level converter circuit producible in the submitted on the same day German patent application P .. .. ... (internal file number: UL 93 / 39b) is described in more detail.
- the invention is not limited to the exemplary embodiment described, but can be applied analogously to others.
- the resistors R4, R5 can be designed as a potentiometer, the center tap of which is connected to the source S1 of the first JFET A1. In this way, the constant current I const can be set continuously within predefinable limits.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Control Of Electrical Variables (AREA)
- Amplifiers (AREA)
- Junction Field-Effect Transistors (AREA)
Claims (7)
- Source à courant constant à courant constant réglable, qui est généré à l'aide d'au moins un composant semiconducteur, caractériséeen ce qu'un diviseur de tension est prévu, se composant d'un montage série d'un second transistor à effet de champ (A2) monté en tant que source de courant, avec les bornes source (S2), drain (D2) ainsi que grille (G2), le drain (D2) étant relié à un pôle (M) d'une source de tension (Sp), la source (S2) et la grille (G2) étant réunies, et au moins d'une résistance ohmique réglable (R4 à R6), dont une borne est reliée à la source (S2) et dont l'autre borne est reliée à l'autre pôle (-) de la source de tension (Sp),en ce qu'un premier transistor à effet de champ (A1) est prévu, dont la grille (G1) est reliée à l'autre pôle (-) de la source de tension (Sp), dont la source (S1) est reliée à la résistance (R4 à R6) de telle sorte qu'entre la grille (G1) et la source (S2) existe une résistance (R5) qui est choisie en fonction du courant constant (Iconst) à régler, qui circule à travers le drain (D1), dont le drain (D1) peut être relié à un composant qui est déterminé pour le courant constant (Iconst),en ce que, dans le cas des deux transistors à effet de champ à couche d'arrêt (A1, A2), le courant à saturation (IDSS) se comporte proportionnellement à la tension de coupure (Up) eten ce que les deux transistors à effet de champ (A1, A2) présentent un comportement électrique identique.
- Source à courant constant selon la revendication 1, caractérisée en ce que la résistance réglable (R4 à R6) se compose d'un montage en série de deux résistances (R4, R5), sur lequel est montée en parallèle la résistance (R6).
- Source à courant constant selon la revendication 1 ou la revendication 2, caractérisée en ce que les deux transistors à effet de champ (A1, A2) possèdent un courant à saturation (IDSS), qui est sensiblement supérieur au courant constant maximal à régler (Iconst).
- Source à courant constant selon l'une quelconque des revendications précédentes, caractérisée en ce que les transistors à effet de champ (A1, A2) sont réalisés en tant que transistors intégrés.
- Source à courant constant selon l'une quelconque des revendications précédentes, caractérisé en ce que les transistors à effet de champ sont réalisés en tant que transistors à effet de champ à couche d'arrêt.
- Source à courant constant selon l'une quelconque des revendications précédentes, caractérisée en ce qu'au moins les transistors à effet de champ à couche d'arrêt (A1, A2) sont réalisés selon la technologie GaAs.
- Source à courant constant selon l'une quelconque des revendications précédentes, caractérisée en ce qu'au moins les transistors à effet de champ à couche d'arrêt (A1, A2) sont réalisés selon la technologie MESFET.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE4335683A DE4335683A1 (de) | 1993-10-20 | 1993-10-20 | Konstantstromquelle |
DE4335683 | 1993-10-20 |
Publications (3)
Publication Number | Publication Date |
---|---|
EP0650112A2 EP0650112A2 (fr) | 1995-04-26 |
EP0650112A3 EP0650112A3 (fr) | 1995-08-30 |
EP0650112B1 true EP0650112B1 (fr) | 1998-08-05 |
Family
ID=6500532
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP94115731A Expired - Lifetime EP0650112B1 (fr) | 1993-10-20 | 1994-10-06 | Source de courant constante |
Country Status (4)
Country | Link |
---|---|
US (1) | US5488328A (fr) |
EP (1) | EP0650112B1 (fr) |
DE (2) | DE4335683A1 (fr) |
ES (1) | ES2121595T3 (fr) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4335684A1 (de) * | 1993-10-20 | 1995-04-27 | Deutsche Aerospace | Treiberschaltung zur Erzeugung einer Schaltspannung |
EP0748047A1 (fr) * | 1995-04-05 | 1996-12-11 | Siemens Aktiengesellschaft | Circuit tampon intégré |
US5903177A (en) * | 1996-09-05 | 1999-05-11 | The Whitaker Corporation | Compensation network for pinch off voltage sensitive circuits |
US5864230A (en) * | 1997-06-30 | 1999-01-26 | Lsi Logic Corporation | Variation-compensated bias current generator |
US5977813A (en) * | 1997-10-03 | 1999-11-02 | International Business Machines Corporation | Temperature monitor/compensation circuit for integrated circuits |
JP3629939B2 (ja) | 1998-03-18 | 2005-03-16 | セイコーエプソン株式会社 | トランジスタ回路、表示パネル及び電子機器 |
DE19830356C1 (de) * | 1998-07-07 | 1999-11-11 | Siemens Ag | Verfahren zum Abgleichen eines Widerstands in einer integrierten Schaltung und Vorrichtung zur Durchführung dieses Verfahrens |
US6046579A (en) * | 1999-01-11 | 2000-04-04 | National Semiconductor Corporation | Current processing circuit having reduced charge and discharge time constant errors caused by variations in operating temperature and voltage while conveying charge and discharge currents to and from a capacitor |
DE19940382A1 (de) | 1999-08-25 | 2001-03-08 | Infineon Technologies Ag | Stromquelle für niedrige Betriebsspannungen mit hohem Ausgangswiderstand |
US7333156B2 (en) * | 1999-08-26 | 2008-02-19 | Canadian Space Agency | Sequential colour visual telepresence system |
GB0811483D0 (en) * | 2008-06-23 | 2008-07-30 | Xipower Ltd | Improvements in and relating to self oscillating flyback circuits |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
SU1061124A1 (ru) * | 1982-01-25 | 1983-12-15 | Osipov Yurij V | Стабилизатор посто нного тока |
JPH0640290B2 (ja) * | 1985-03-04 | 1994-05-25 | 株式会社日立製作所 | 安定化電流源回路 |
US4716356A (en) * | 1986-12-19 | 1987-12-29 | Motorola, Inc. | JFET pinch off voltage proportional reference current generating circuit |
US4760284A (en) * | 1987-01-12 | 1988-07-26 | Triquint Semiconductor, Inc. | Pinchoff voltage generator |
US4868416A (en) * | 1987-12-15 | 1989-09-19 | Gazelle Microcircuits, Inc. | FET constant reference voltage generator |
GB2211322A (en) * | 1987-12-15 | 1989-06-28 | Gazelle Microcircuits Inc | Circuit for generating reference voltage and reference current |
JP2753266B2 (ja) * | 1988-06-20 | 1998-05-18 | 株式会社日立製作所 | 半導体回路 |
US4820968A (en) * | 1988-07-27 | 1989-04-11 | Harris Corporation | Compensated current sensing circuit |
US5065043A (en) * | 1990-03-09 | 1991-11-12 | Texas Instruments Incorporated | Biasing circuits for field effect transistors using GaAs FETS |
-
1993
- 1993-10-20 DE DE4335683A patent/DE4335683A1/de not_active Withdrawn
-
1994
- 1994-10-06 ES ES94115731T patent/ES2121595T3/es not_active Expired - Lifetime
- 1994-10-06 EP EP94115731A patent/EP0650112B1/fr not_active Expired - Lifetime
- 1994-10-06 DE DE59406607T patent/DE59406607D1/de not_active Expired - Fee Related
- 1994-10-20 US US08/326,497 patent/US5488328A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0650112A3 (fr) | 1995-08-30 |
US5488328A (en) | 1996-01-30 |
DE4335683A1 (de) | 1995-04-27 |
EP0650112A2 (fr) | 1995-04-26 |
DE59406607D1 (de) | 1998-09-10 |
ES2121595T3 (es) | 1998-12-01 |
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