EP0641028B1 - A thin film device and a method for fabricating the same - Google Patents
A thin film device and a method for fabricating the same Download PDFInfo
- Publication number
- EP0641028B1 EP0641028B1 EP94113361A EP94113361A EP0641028B1 EP 0641028 B1 EP0641028 B1 EP 0641028B1 EP 94113361 A EP94113361 A EP 94113361A EP 94113361 A EP94113361 A EP 94113361A EP 0641028 B1 EP0641028 B1 EP 0641028B1
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- European Patent Office
- Prior art keywords
- film
- metal film
- metallic material
- thin film
- conductive oxide
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- 238000000034 method Methods 0.000 title claims description 55
- 239000010409 thin film Substances 0.000 title claims description 32
- 239000010408 film Substances 0.000 claims description 114
- 229910052751 metal Inorganic materials 0.000 claims description 69
- 239000002184 metal Substances 0.000 claims description 69
- 230000008569 process Effects 0.000 claims description 38
- 229920002120 photoresistant polymer Polymers 0.000 claims description 31
- 239000000758 substrate Substances 0.000 claims description 31
- 229910052782 aluminium Inorganic materials 0.000 claims description 25
- 238000000206 photolithography Methods 0.000 claims description 25
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 22
- 238000005260 corrosion Methods 0.000 claims description 21
- 230000007797 corrosion Effects 0.000 claims description 20
- 239000007769 metal material Substances 0.000 claims description 19
- 238000000151 deposition Methods 0.000 claims description 17
- 230000004888 barrier function Effects 0.000 claims description 13
- 229910052721 tungsten Inorganic materials 0.000 claims description 12
- 238000009792 diffusion process Methods 0.000 claims description 11
- 239000000463 material Substances 0.000 claims description 7
- 238000000059 patterning Methods 0.000 claims description 7
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 7
- 239000010937 tungsten Substances 0.000 claims description 7
- 229910003437 indium oxide Inorganic materials 0.000 claims description 6
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 claims description 6
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims description 6
- 229910052763 palladium Inorganic materials 0.000 claims description 6
- 230000009467 reduction Effects 0.000 claims description 6
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 claims description 6
- 229910001887 tin oxide Inorganic materials 0.000 claims description 6
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 4
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 4
- 229910052738 indium Inorganic materials 0.000 claims description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 2
- 229910052759 nickel Inorganic materials 0.000 claims description 2
- 229910052697 platinum Inorganic materials 0.000 claims description 2
- 229910052720 vanadium Inorganic materials 0.000 claims description 2
- LEONUFNNVUYDNQ-UHFFFAOYSA-N vanadium atom Chemical compound [V] LEONUFNNVUYDNQ-UHFFFAOYSA-N 0.000 claims description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims 2
- 239000010410 layer Substances 0.000 description 39
- 229910000838 Al alloy Inorganic materials 0.000 description 32
- 239000000243 solution Substances 0.000 description 24
- 229910021417 amorphous silicon Inorganic materials 0.000 description 19
- 239000012212 insulator Substances 0.000 description 13
- 239000004065 semiconductor Substances 0.000 description 12
- 239000004973 liquid crystal related substance Substances 0.000 description 10
- 239000011651 chromium Substances 0.000 description 9
- 150000002739 metals Chemical class 0.000 description 8
- 238000006243 chemical reaction Methods 0.000 description 7
- 239000011159 matrix material Substances 0.000 description 6
- 238000007254 oxidation reaction Methods 0.000 description 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 6
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 5
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 229910052804 chromium Inorganic materials 0.000 description 4
- -1 for example Substances 0.000 description 4
- 230000010287 polarization Effects 0.000 description 4
- 238000006722 reduction reaction Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 229910052750 molybdenum Inorganic materials 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 239000010936 titanium Substances 0.000 description 3
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
- 229910004205 SiNX Inorganic materials 0.000 description 2
- 229910052681 coesite Inorganic materials 0.000 description 2
- 229910052906 cristobalite Inorganic materials 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005401 electroluminescence Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 239000011733 molybdenum Substances 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 230000036647 reaction Effects 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 229910052682 stishovite Inorganic materials 0.000 description 2
- 229910052905 tridymite Inorganic materials 0.000 description 2
- 229910001111 Fine metal Inorganic materials 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000006479 redox reaction Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 description 1
- 238000000427 thin-film deposition Methods 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
- H01L29/458—Ohmic electrodes on silicon for thin film silicon, e.g. source or drain electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
- G02F1/13629—Multilayer wirings
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/12—All metal or with adjacent metals
- Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
- Y10T428/12528—Semiconductor component
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
- Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/31504—Composite [nonstructural laminate]
- Y10T428/31678—Of metal
Definitions
- Thin film devices which employ conductive oxide films as transparent electrodes include liquid crystal display devices, electro-luminescence display devices and photoelectric transducer devices.
- a technology which uses a transparent electrode made of a conductive oxide will be described below, taking an example of an active matrix type liquid crystal display device.
- An active matrix type liquid crystal display device generally has an active matrix substrate, an opposing substrate and a liquid crystal film interposed between the two substrates.
- the active matrix substrate has a plurality of gate bus lines, a plurality of source bus lines arranged at right angles to the gate bus lines, and a plurality of pixel electrodes arranged within regions enclosed by these bus lines, being formed thereon.
- Each of the pixel electrodes receives a data signal from the source bus line via a thin film transistor (hereinafter referred to as TFT) which switches on or off in response to a scanning signal transmitted on the corresponding gate bus line.
- TFT thin film transistor
- the opposing substrate has a transparent opposing electrode.
- a Cr film is deposited on the glass substrate 1 and the gate electrode 2 is formed from the Cr film in the photolithography process.
- the gate insulating film 3 made of silicon nitride (SiN x ), the a-Si film 4 , and the n + -type a-Si film 5 doped with phosphorous to form ohmic contact between the source/drain electrodes 8a and 8b and the semiconductor film are successively deposited in the plasma CVD process, followed by the removal of the a-Si film 4 and the n + -type a-Si film 5 , from portions other than those where the TFTs are to be formed, by etching during the photolithography process.
- the thin film device of this invention comprises: a substrate; a transparent conductive oxide film formed on the substrate; and a metal film formed over the substrate and in contact with at least a part of the conductive oxide film, wherein the metal film includes aluminum and a metallic material having a standard electrode potential higher than the standard electrode potential of the aluminum so that the standard electrode potential of the metal film is higher than the reduction potential of the conductive oxide film and wherein the aluminum and the metallic material are homogeneously mixed in the metal film.
- a diffusion barrier metal film is further provided between the metal film and the substrate.
- the method for fabricating a thin film device of this invention comprises the steps of: depositing a transparent conductive oxide film on a substrate; patterning the transparent conductive oxide film by a photolithography process; depositing a metal film which includes aluminum and a metallic material, the metallic material having a standard electrode potential higher than the standard electrode potential of the aluminum and has a standard electrode potential higher than the reduction potential of the conductive oxide film; and patterning the metal film by means of photolithography process using a positive photoresist, said photolithography process using the positive photoresist including a development process using a developer solution which dissolves the aluminum; said process being characterized in that Al and the metallic material are homogeneously mixed in the resulting metal film.
- the conductive oxide film is made of a material selected from a group of indium oxide, tin oxide and indium-tin oxide.
- FIGS. 1A through 1G are sectional views of the TFT in different stages of a process for fabricating the thin film device of the invention.
- a metal film for example, Cr film
- the metal film is patterned in a specified configuration during the photolithography process using a positive photoresist, thereby forming a gate electrode 12 .
- a gate bus line (not shown) is formed together with the gate electrode 12 from the metal film.
- a diffusion barrier metal layer (for example, SO nm to 100 nm thick) 18 such as Ti and an Al alloy layer (for example, 300 nm to 500 nm thick) with 3 at % of tungsten (W) added thereto are successively deposited over the transparent insulator substrate 11 .
- the Al alloy layer with 3 at % of tungsten (W) added thereto may be formed by various thin film depositing technologies such as DC sputtering using an Al alloy target. Although the method and conditions of the deposition are not limited, it is necessary that the W and Al are not separated in the resultant Al alloy layer.
- an Al gate 40 is formed as shown in Figure 2E , by means of the P-CVD method or the like.
- the member electrically connected to the Al alloy layer is the pixel electrode which is made from ITO. Corrosion is also prevented in this case as in the case of the first embodiment.
- the metal film electrically connected to the conductive oxide film is a source electrode (source bus line) or a drain electrode in the above examples
- gate electrodes may also be electrically connected to the conductive oxide film.
- a wiring pattern made of ITO which are arranged around a display section so as to be connected to the gate electrode wiring. In such cases, corrosion by a developer solution for positive resist can be prevented by applying the constitution of the invention to the gate electrode.
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
- Liquid Crystal (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Description
- The present invention relates to a thin film device and a method for fabricating the same. More particularly, the invention relates to a thin film device having a transparent electrode made of conductive oxide film, for example, thin film devices such as liquid crystal display devices, electro-luminescence display devices and photoelectric transducer devices, and a method for fabricating the same.
- Thin film devices which employ conductive oxide films as transparent electrodes include liquid crystal display devices, electro-luminescence display devices and photoelectric transducer devices. A technology which uses a transparent electrode made of a conductive oxide will be described below, taking an example of an active matrix type liquid crystal display device.
- An active matrix type liquid crystal display device generally has an active matrix substrate, an opposing substrate and a liquid crystal film interposed between the two substrates. The active matrix substrate has a plurality of gate bus lines, a plurality of source bus lines arranged at right angles to the gate bus lines, and a plurality of pixel electrodes arranged within regions enclosed by these bus lines, being formed thereon. Each of the pixel electrodes receives a data signal from the source bus line via a thin film transistor (hereinafter referred to as TFT) which switches on or off in response to a scanning signal transmitted on the corresponding gate bus line. The opposing substrate has a transparent opposing electrode.
- With reference to Figure 6, a TFT of prior art will be described below.
- As shown in Figure 6, the TFT has a
gate electrode 2 formed on asubstrate 1, a gateinsulating film 3 formed over thegate electrode 2, an amorphous silicon (a-Si) film 4 formed on thegate insulating film 3, phosphorous-doped a-Sicontact films 5 formed on the a-Si film 4,barrier metal layers 7, and source/drain electrodes 8a and 8b made of aluminum (Al). Thegate electrode 2, thegate insulating film 3 and the a-Si film 4 may be arranged in a reversed order. Thedrain electrode 8b is connected to apixel electrode 6 made from a transparent conductive film. As the material for the transparent conductive film, indium-tin oxide (ITO) is commonly used (cf. for example Patent Abstracts of Japan, vol. 13, 116 and JP-A-63 289 533). - A process of fabricating the TFT will be described below. First, a Cr film is deposited on the
glass substrate 1 and thegate electrode 2 is formed from the Cr film in the photolithography process. Then thegate insulating film 3 made of silicon nitride (SiNx), the a-Si film 4, and the n+-type a-Sifilm 5 doped with phosphorous to form ohmic contact between the source/drain electrodes 8a and 8b and the semiconductor film are successively deposited in the plasma CVD process, followed by the removal of the a-Si film 4 and the n+-type a-Sifilm 5, from portions other than those where the TFTs are to be formed, by etching during the photolithography process. Indium-tin oxide (ITO) is deposited so as to form thetransparent pixel electrode 6 in the photolithography process. Then a titanium (Ti) film and an aluminum (Al) film are deposited in this order, and then thebarrier metal layers 7 and the source/drain electrodes 8a and 8b are formed during the photolithography process, followed by the removal of the n+-type a-Sifilm 5 from above the TFT channel, thereby completing the TFT. - Within the above purses it is already known to include an addition metal layer, e.g. made from chromium in the device. For example discloses patent abstract of Japan Vol. 17, 98 and JP-A-4293021 an alluminium layer sandwiched between another high melting point metal (Cr) as the second metal layer. Similarly, EP-A-0 211 402 discloses an aluminium layer covered by molybdenum which is deposited on the Al film. A comparable structure of Al and Mo films is used according to US-A-5,150,233 for preparation of thin film devices.
- In the method of fabricating the TFT described above, there has been such a problem that the use of a positive photoresist in the photolithography process to form the source and
drain electrodes 8a and 8b leads to the corrosion of the ITO and aluminum during the development process. - The corrosion occurs because ITO and aluminum are immersed in the developer solution while being electrically connected to each other. Specifically, because the developer solution used for the positive photoresist is an alkaline aqueous solution which dissolves aluminum, cell reaction takes place between ITO and aluminum in the developer solution, resulting in the corrosion of ITO and aluminum.
- When a negative photoresist is used in the photolithography process, the corrosion does not occur. Thus solutions to the problem of avoiding corrosion have been proposed, such as the use of a negative photoresist and the use of a special solution for the developer. However, since positive photoresist is pre-ferred to form finer patterns because the positive photoresist allows higher patterning accuracy and is easier to peel off, it complicates the fabricating process and increases the cost to use a negative photoresist for the purpose of only patterning aluminum or to use a developer solution comprising a special solution.
- Corrosion may not occur in the case of wiring strips formed by using a metal other than aluminum, for example, molybdenum (Mo) or tantalum (Ta). However, these metals have higher specific resistances (i.e., higher resistivities) than aluminum, and therefore the wiring strips made of such metals must be made wider. Such wider wiring strips are not suited to the high-density integration of a thin film device.
- The thin film device of this invention, comprises: a substrate; a transparent conductive oxide film formed on the substrate; and a metal film formed over the substrate and in contact with at least a part of the conductive oxide film, wherein the metal film includes aluminum and a metallic material having a standard electrode potential higher than the standard electrode potential of the aluminum so that the standard electrode potential of the metal film is higher than the reduction potential of the conductive oxide film and wherein the aluminum and the metallic material are homogeneously mixed in the metal film.
- In one embodiment, at least part of the metallic material forms a corrosion stop layer on the surface of the metal film.
- In one embodiment, the metallic material is tungsten.
- In one embodiment, concentration of the metallic material included in the metal film is in a range from 0.5 at % to 6 at %.
- In one embodiment, the conductive oxide film is made of a material selected from a group of indium oxide, tin oxide and indium-tin oxide.
- In one embodiment, a diffusion barrier metal film is further provided between the metal film and the substrate.
- The method for fabricating a thin film device of this invention, comprises the steps of: depositing a transparent conductive oxide film on a substrate; patterning the transparent conductive oxide film by a photolithography process; depositing a metal film which includes aluminum and a metallic material, the metallic material having a standard electrode potential higher than the standard electrode potential of the aluminum and has a standard electrode potential higher than the reduction potential of the conductive oxide film; and patterning the metal film by means of photolithography process using a positive photoresist, said photolithography process using the positive photoresist including a development process using a developer solution which dissolves the aluminum; said process being characterized in that Al and the metallic material are homogeneously mixed in the resulting metal film.
- In one embodiment, the conductive oxide film is made of a material selected from a group of indium oxide, tin oxide and indium-tin oxide.
- In one embodiment, the metallic material is tungsten.
- In one embodiment, a diffusion barrier metal film is deposited prior to the step of depositing the metal film.
- Thus, the invention described herein makes possible the advantages of (1) providing a thin film device which is free from corrosion of a conductive oxide film and a metal wiring, and (2) providing a method for fabricating a thin film device in which a positive photoresist is employed to make a fine metal wiring pattern without corrosion forming on the conductive oxide film and metal wiring.
- These and other advantages of the present invention will become apparent to those skilled in the art upon reading and understanding the following detailed description with reference to the accompanying figures.
- Figures 1A through 1G are sectional views of the TFT in different stages of a process for fabricating the thin film device of the invention.
- Figures 2A through 2E are cross sectional views of the TFT in different stages of a process for fabricating another thin film device of the invention.
- Figure 3 is a cross sectional view of another thin film device of the invention.
- Figure 4 is a graph illustrative of an ITO cathode polarization curve of ITO and anode polarization curves of various metals in the developer solution for positive photoresist.
- Figure 5 is a diagram illustrative of the changes in the specific resistance of Al with various metals added thereto and in the amount of shift of the equilibrium potential with the concentrations of the added metals.
- Figure 6 is a cross sectional view illustrative of a thin film device of the prior art.
- Preferred embodiments of the thin film device and the method for fabricating the same according to the invention will be described below with reference to the accompanying drawings.
- The first example of the thin film device of the invention will be described below. The thin film device is an active matrix type liquid crystal display device having TFTs as switching elements. Figures 1A through 1G schematically illustrate a cross-section of the TFT in various stages of the fabricating process for the thin film device.
- Referring to Figure 1A, after depositing a metal film, for example, Cr film, on a
transparent insulator substrate 11, the metal film is patterned in a specified configuration during the photolithography process using a positive photoresist, thereby forming agate electrode 12. A gate bus line (not shown) is formed together with thegate electrode 12 from the metal film. - In the photolithography process using the positive photoresist, an alkaline developer solution is used in the development process. As the developer solution, one made by Tokyo Ohka Co., Ltd. under the product name of NMD-3, for example, may be used. In the photolithography process using a positive photoresist described below, a similar developer solution is used. The term photolithography referred to in this specification includes the processes of exposure of the photoresist to radiation, development and etching of the undercoat.
- Then a
gate insulating film 13, an amorphoussilicon semiconductor film 14 and a channelprotection insulator film 15 are laminated in this order on thetransparent insulator substrate 11 as shown in Figure 1B, by means of a thin film deposition technology such as the plasma-enhanced chemical vapor deposition (P-CVD). This is followed by a photolithagraphy process using a positive photoresist to form the channelprotection insulator film 15 into a specified pattern as shown in Figure 1C, and thereafter the formation of a phosphorous-doped n+-typeamorphous silicon film 16 over thetransparent insulator substrate 11 as shown in Figure 1D. - Next the n+-type
amorphous silicon film 16 and the amorphoussilicon semiconductor film 14 are patterned in a photolithography process using a positive photoresist as shown in Figure 1E, so that thefilm 16 completely covers the channelprotection insulator film 15 in areas where the TFTs are to be formed. - Then after depositing an ITO film, which is a conductive oxide film, over the
transparent insulator substrate 11, the ITO film is patterned in a positive photolithography process to form atransparent pixel electrode 17, as shown in Figure 1F. - Next, a diffusion barrier metal layer (for example, SO nm to 100 nm thick) 18 such as Ti and an Al alloy layer (for example, 300 nm to 500 nm thick) with 3 at % of tungsten (W) added thereto are successively deposited over the
transparent insulator substrate 11. The Al alloy layer with 3 at % of tungsten (W) added thereto may be formed by various thin film depositing technologies such as DC sputtering using an Al alloy target. Although the method and conditions of the deposition are not limited, it is necessary that the W and Al are not separated in the resultant Al alloy layer. - The Al alloy layer is electrically connected to the
transparent pixel electrode 17 via the diffusionbarrier metal layer 18. The diffusionbarrier metal layer 18 prevents interdiffusiton between the Al alloy layer and the n+-typeamorphous silicon film 16 from diffusing into each other. - Then the Al alloy layer and the diffusion
barrier metal layer 18 are patterned in a photolithography process using a positive photoresist, thereby forming the source/drain electrodes 19. The shape and position of thedrain electrode 19 is so defined so as to connect thetransparent pixel electrode 17 and the n+-typeamorphous silicon film 16. In this embodiment, theAl alloy layer 19 and thetransparent pixel electrode 17 are not corroded during the development process of the photolithography using the positive photoresist, for the reason to be described later. Then after depositing apassivation film 20 such as SiNx, part of thepassivation film 20 is removed in order to expose thetransparent pixel electrode 17. - The active matrix substrate is fabricated in the process described above. After laminating this substrate and the substrate having the opposing electrode by a known method, liquid crystal is sealed between the substrates so as to complete the liquid crystal display device.
- In this embodiment, the Al alloy layer is patterned in a photolithography process using a positive photoresist, after depositing the Al alloy layer with W added thereto so as to cover the ITO. Because the Al alloy layer with W added thereto does not have an oxidation-reduction reaction with the ITO, even in a developer solution for positive photoresist, the corrosion of the ITO can be prevented. Now the mechanism wherein the use of the Al alloy layer with W added thereto prevents corrosion will be described below.
- Figure 4 shows a cathode polarization curve of ITO and anode polarization curves of various metals in a developer solution for positive photoresist. As will be seen from Figure 4, the equilibrium potential (oxidation potential) of the anode reaction of pure Al is lower than the equilibrium potential (reduction potential) of the cathode reaction of the ITO. As a result, when pure Al and ITO are brought into contact with each other and immersed in a developer solution for positive photoresist, the pure Al and the ITO exchange electrons therebetween while galvanic corrosion (cell reaction) proceeds in the interfaces between the pure Al, the developer solution and the ITO. It is supposed that the developer solution and the ITO make contact with each other through pin holes or the like formed in the pure Al. This corrosion can take place, besides ITO film, in a conductive oxide film such as indium oxide film or tin oxide film.
- In contrast, the equilibrium potential (oxidation potential) of the anode reaction in an Al alloy layer with a specified amount of W or paradium (Pd) added thereto is higher than the equilibrium potential (reduction potential) of the cathode reaction of the ITO. Because the standard electrode potentials of W and Pd are higher than the standard electrode potential of Al, the addition of W or Pd increases the standard electrode potential of the Al alloy. The amount of W or Pd to be added is determined so that the standard electrode potential of the Al alloy is higher than the standard electrode potential of the ITO. As a result, when the Al alloy and the ITO are brought into contact with each other and immersed in a developer solution for a positive photoresist, the Al alloy and the ITO do not exchange electrons therebetween and galvanic corrosion reaction does not proceed in the interfaces between the pure Al, the developer solution and the ITO. Therefore, even when pin holes or the like are formed in Al, Al and ITO will not be corroded.
- Although not shown in Figure 4, it was confirmed that similar effects are obtained by using vanadium, platinum, indium or nickel, as well as W and Pd, as the additive metal to Al.
- Figure 5 shows the changes in the specific resistance (resistivity) of Al with various metals added thereto and in the amount of shift of the equilibrium potential of oxidation reaction with different concentrations of added metals. As will be seen from Figure 5, the specific resistance increases and, moreover, the amount of shift in the oxidation potential increases as the concentration of added metal increases. The concentration of metal to be added is determined so that the standard electrode potential of the Al alloy becomes higher than the standard electrode potential of ITO. Because the amount of shift in the equilibrium potential of the oxidation reaction varies depending on the kind of metal added, the concentration of the added metal is adjusted according to the kind of metal. In the case of W and Pd, adding in a very low concentration (about 0.5 at %) is sufficient to obtain the proper amount of shift of the equilibrium potential of the oxidation reaction.
- Because adding such a metal as described above increases the specific resistance of the Al alloy, the upper limit of the concentration of the added metal is determined by taking the specific resistance of the Al alloy into consideration. Chromium is known as a metal which has a relatively low specific resistance and is not corroded by a developer solution. Specific resistance of chromium is 50 µΩ·cm, and therefore concentration of the metal added in the Al alloy should be set so that the specific resistance of the Al alloy does not exceed 50 µΩ·cm. In the case of W, concentration thereof to be added is preferably 6 at % or less in order to maintain the specific resistance below that of chromium.
- The prevention of corrosion does not require the added metal such as W to be uniformly distributed over the entire Al alloy layer. The surf of the Al alloy layer functions as a corrosion stop layer and thereby demonstrates sufficient anti-corrosion effect, provided that the added metal (such as W) be uniformly distributed in the Al alloy layer.
- The second example of the thin film device according to the invention will be described below with reference to Figures 2A through 2E.
- Referring to Figure 2A, after depositing a metal film (for example, Cr film) on a
transparent insulator substrate 31, the metal film is patterned in a specified configuration during the photolithography process using a positive photoresist, thereby forming a light blockingmetal film 32. - Then after forming an
interlayer insulation film 33 and an ITO film, which is an oxide conductor, in this order over thetransparent insulator substrate 31 by means of the P-CVD method or the like, the ITO film is patterned in a photolithography process using a positive photoresist, thereby forming asource electrode 35 and apixel electrode 34, as shown in Figure 2B. - Then after forming an amorphous silicon semiconductor film by means of the P-CVD method or the like, the amorphous silicon semiconductor layer is patterned thereby forming an island-shaped amorphous
silicon semiconductor layer 36 as shown in Figure 2C. This is followed by the successive deposition of a diffusionbarrier metal layer 37 made of Mo and anAl alloy layer 38 with 3 at % of tungsten (W) added thereto over thetransparent insulator substrate 31 as shown in Figure 2D. TheAl alloy layer 38 is electrically connected to thesource electrode 35 via the diffusionbarrier metal layer 37. Then theAl alloy layer 38 and the diffusionbarrier metal layer 37 are patterned in a photolithography process using a positive photoresist, thereby forming a source bus line. - Next, after depositing the
gate insulating film 39, anAl gate 40 is formed as shown in Figure 2E, by means of the P-CVD method or the like. - In this embodiment, the member electrically connected to the
Al alloy layer 38 is thesource electrode 35 which is made from ITO. Corrosion is also prevented in this case as in the case of the first embodiment. - The third example of the thin film device according to the invention will be described below with reference to Figure 3.
- The thin film device shown in Figure 3 is fabricated as described below. First, a
polycrystalline silicon semiconductor 42 is deposited on thetransparent insulator substrate 41, and thepolycrystalline silicon semiconductor 42 is patterned into an island shape. Then after depositing agate insulating film 43 made of SiO2 on thetransparent substrate 41 by the LPCVD method, agate electrode 44 is formed above thepolycrystalline silicon semiconductor 42. After depositing theinterlayer insulator film 45 made of SiO2, openings are made in thegate insulating film 43 in order to form asource region 46 and adrain region 47 in thepolycrystalline silicon semiconductor 42. Phosphorous ions are implanted into thepolycrystalline silicon semiconductor 42 through the openings, to form thesource region 46 and thedrain region 47. Then after forming atransparent pixel electrode 48 made of ITO, an Al alloy layer with W added thereto is deposited so as to cover thetransparent pixel electrode 48. This is followed by patterning the Al alloy layer with W added thereto in a photolithography process using a positive photoresist, so as to form source/drain electrodes 49. The position and shape of thedrain electrode 49 is so determined as to connect thedrain region 47 of thepolycrystalline silicon semiconductor 42 and thetransparent pixel electrode 48. - In this embodiment, the member electrically connected to the Al alloy layer is the pixel electrode which is made from ITO. Corrosion is also prevented in this case as in the case of the first embodiment.
- Although the invention has been described taking liquid crystal display devices as examples, the invention is not limited to this and may be applied to any thin film device which is fabricated by immersing a conductive oxide film and a metal film, which are electrically connected to each other, in a developer solution for positive resist. The developer solution for positive photoresist may be any solution, provided that it dissolves Al.
- Although the metal film electrically connected to the conductive oxide film is a source electrode (source bus line) or a drain electrode in the above examples, gate electrodes may also be electrically connected to the conductive oxide film. In a liquid crystal display device, for example, there are such cases as a wiring pattern made of ITO which are arranged around a display section so as to be connected to the gate electrode wiring. In such cases, corrosion by a developer solution for positive resist can be prevented by applying the constitution of the invention to the gate electrode.
- For the conductive oxide film, metal oxides having electrical conductivity such as indium oxide film or tin oxide film may be used, as well as ITO film.
Claims (11)
- A thin film device comprising:a substrate (11);a transparent conductive oxide film (17) formed over the substrate (11); anda metal film (19) formed over the substrate (11) and in contact with at least a part of the conductive oxide film (17), whereinthe metal film (19) includes aluminum and a metallic material, the metallic material having a standard electrode potential higher than the standard electrode potential of the aluminum so that the standard electrode potential of the metal film (19) is higher than the reduction potential of the conductive oxide film (17), characterized in that the metallic material and Al are homogeneously mixed in the resultant metal film (19).
- A thin film device according to claim 1, wherein a corrosion stop layer made of the same material as the metallic material is formed over the surface of the metal film.
- A thin film device according to claim 1, wherein the metallic material is tungsten.
- A thin film device according to claim 1, wherein the concentration of the metallic material included in the metal film is in a range from 0.5 at % to 6 at %.
- A thin film device according to claim 1, wherein the conductive oxide film (17) is made of a material selected from a group of indium oxide, tin oxide and indium-tin oxide.
- A thin film device according to claim 1, wherein a diffusion barrier metal film is further provided between the metal film (19) and the substrate (11).
- A method for fabricating a thin film device, comprising the steps of:depositing a transparent conductive oxide film (17) over a substrate;patterning the transparent conductive oxide film (17) by a photo lithography process;depositing a metal film (19) which includes aluminum and a metallic material, the material having a standard electrode potential higher than the standard electrode potential of the aluminum and has a standard electrode potential higher than the reduction potential of the conductive oxide film, andpatterning the metal film (19) by means of a photolithography process using a positive photoresist,said photolithography process using the positive photoresist including a development process using a developer solution which dissolves the aluminum; characterized in that the metallic material and Al are homogeneously mixed in the resultant metal film (19).
- A method according to claim 7, wherein the conductive oxide film is made of a material selected from a group of indium oxide, tin oxide and indium-tin oxide.
- A method according to claim 7, wherein the metallic material is tungsten.
- A method according to claim 7, wherein a diffusion barrier metal film is deposited prior to the step of depositing the metal film.
- A method according to claim 7, wherein the metallic material is selected from a group consiting of palladium, vanadium, platinum, indium or nickel.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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JP211238/93 | 1993-08-26 | ||
JP21123893A JP3106786B2 (en) | 1993-08-26 | 1993-08-26 | Semiconductor device and manufacturing method thereof |
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EP0641028A2 EP0641028A2 (en) | 1995-03-01 |
EP0641028A3 EP0641028A3 (en) | 1995-09-27 |
EP0641028B1 true EP0641028B1 (en) | 1999-05-12 |
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EP94113361A Expired - Lifetime EP0641028B1 (en) | 1993-08-26 | 1994-08-26 | A thin film device and a method for fabricating the same |
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US (1) | US5660971A (en) |
EP (1) | EP0641028B1 (en) |
JP (1) | JP3106786B2 (en) |
KR (1) | KR0171648B1 (en) |
DE (1) | DE69418399T2 (en) |
TW (1) | TW399741U (en) |
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US6939625B2 (en) * | 1996-06-25 | 2005-09-06 | Nôrthwestern University | Organic light-emitting diodes and methods for assembly and enhanced charge injection |
US5834100A (en) * | 1996-06-25 | 1998-11-10 | Northwestern University | Organic light-emitting dioddes and methods for assembly and emission control |
US6586763B2 (en) * | 1996-06-25 | 2003-07-01 | Northwestern University | Organic light-emitting diodes and methods for assembly and emission control |
US6579749B2 (en) * | 1998-11-17 | 2003-06-17 | Nec Corporation | Fabrication method and fabrication apparatus for thin film transistor |
KR100375870B1 (en) * | 2000-05-22 | 2003-03-15 | 상산소재 주식회사 | Method for press molding sheet made of artificial marble and washstand integrated bowl manufactured by the method |
KR100684928B1 (en) * | 2000-07-07 | 2007-02-20 | 학교법인연세대학교 | Compound semiconductor device including diffusion blocking layer of network structure and Method of manufacturing the same |
CN1267780C (en) * | 2002-11-11 | 2006-08-02 | Lg.飞利浦Lcd有限公司 | Array substrate for LCD device and its mfg. method |
JP2006171344A (en) * | 2004-12-15 | 2006-06-29 | Nippon Sheet Glass Co Ltd | Optical film |
JP2006210477A (en) * | 2005-01-26 | 2006-08-10 | Idemitsu Kosan Co Ltd | Thin film transistor, its manufacturing method, thin film transistor substrate, its manufacturing method, liquid crystal display device using thin film transistor, organic el display device and transparent conductive laminated substrate |
WO2008057068A2 (en) * | 2005-08-29 | 2008-05-15 | University Of South Florida | Micro-aluminum galvanic cells and methods for constructing the same |
JP5089139B2 (en) * | 2005-11-15 | 2012-12-05 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
CN101577281B (en) | 2005-11-15 | 2012-01-11 | 株式会社半导体能源研究所 | Active matrix display and TV comprising the display |
CN109212854B (en) * | 2018-08-29 | 2021-06-01 | 武汉华星光电技术有限公司 | Manufacturing method of LTPS array substrate |
Citations (1)
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EP0211402A2 (en) * | 1985-08-02 | 1987-02-25 | General Electric Company | Process and structure for thin film transistor matrix addressed liquid crystal displays |
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US4420504A (en) * | 1980-12-22 | 1983-12-13 | Raytheon Company | Programmable read only memory |
DE3107943A1 (en) * | 1981-03-02 | 1982-09-16 | Siemens AG, 1000 Berlin und 8000 München | METHOD FOR THE PRODUCTION OF SOLDERABLE AND TEMPERATURE-ENDED METAL-FREE THICK-LAYER CONDUCTORS |
JPS59198774A (en) * | 1983-04-26 | 1984-11-10 | Fuji Electric Co Ltd | Amorphous silicon solar battery |
JPS63289533A (en) * | 1987-05-22 | 1988-11-28 | Oki Electric Ind Co Ltd | Liquid crystal display device |
JP2673460B2 (en) * | 1990-02-26 | 1997-11-05 | キヤノン株式会社 | Liquid crystal display device |
JPH04326723A (en) * | 1991-04-26 | 1992-11-16 | Matsushita Electric Ind Co Ltd | Method and apparatus for manufacture of semiconductor device |
JP3392440B2 (en) * | 1991-12-09 | 2003-03-31 | 株式会社東芝 | Multilayer conductor layer structure device |
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1993
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1994
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EP0211402A2 (en) * | 1985-08-02 | 1987-02-25 | General Electric Company | Process and structure for thin film transistor matrix addressed liquid crystal displays |
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Patent Abstracts of Japan, vol. 17, 98 and JP-A-4 293 021 * |
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Publication number | Publication date |
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KR0171648B1 (en) | 1999-02-01 |
US5660971A (en) | 1997-08-26 |
DE69418399T2 (en) | 1999-09-30 |
EP0641028A2 (en) | 1995-03-01 |
TW399741U (en) | 2000-07-21 |
JP3106786B2 (en) | 2000-11-06 |
KR950007157A (en) | 1995-03-21 |
EP0641028A3 (en) | 1995-09-27 |
JPH0766417A (en) | 1995-03-10 |
DE69418399D1 (en) | 1999-06-17 |
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