EP0477099B1 - Circuit de protection pour circuit de commande, notamment d'écran d'affichage à cristal liquide - Google Patents

Circuit de protection pour circuit de commande, notamment d'écran d'affichage à cristal liquide Download PDF

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Publication number
EP0477099B1
EP0477099B1 EP91402494A EP91402494A EP0477099B1 EP 0477099 B1 EP0477099 B1 EP 0477099B1 EP 91402494 A EP91402494 A EP 91402494A EP 91402494 A EP91402494 A EP 91402494A EP 0477099 B1 EP0477099 B1 EP 0477099B1
Authority
EP
European Patent Office
Prior art keywords
circuit
control circuit
output pin
liquid crystal
crystal display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP91402494A
Other languages
German (de)
English (en)
French (fr)
Other versions
EP0477099A1 (fr
Inventor
Patrice Senn
Alan Lelah
Gilbert Martel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Orange SA
Original Assignee
France Telecom SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by France Telecom SA filed Critical France Telecom SA
Publication of EP0477099A1 publication Critical patent/EP0477099A1/fr
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Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3685Details of drivers for data electrodes
    • G09G3/3688Details of drivers for data electrodes suitable for active matrices only
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243Details of the generation of driving signals
    • G09G2310/0248Precharge or discharge of column electrodes before or after applying exact column voltages
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2011Display of intermediate tones by amplitude modulation

Definitions

  • the present invention relates to a protection circuit for a control circuit. It finds a privileged application in the control of liquid crystal display screens.
  • a liquid crystal display screen generally takes the form illustrated in FIG. 1.
  • the screen proper ECR consists of rows L and addressing columns C, of a matrix of pixels P, each connected to a TFT transistor whose state is controlled by the line L and the associated column C.
  • Such a screen is controlled by a line control circuit CCL, which sequentially applies an addressing voltage to the lines (for example a few volts) and by a column control circuit CCC, which applies, to all the columns, voltages reflecting the light intensity of the points to be displayed on the addressed line.
  • the global image is thus displayed line by line.
  • the column control circuit CCC receives a video signal SV delivered by a video circuit CV.
  • This signal generally consists of three components corresponding to the three primary components of a color image.
  • the circuit CCC includes 162 elementary column control circuits, arranged in parallel, and 162 outputs connected to the different columns.
  • Each elementary column control circuit (also called “column driver” in the technical literature) comprises a sampler-blocker circuit whose function is to sample the video signal at a determined time corresponding to the column to be controlled and to maintain this sample on the column throughout the addressing time of a line ("sample-and-" function hold "in Anglo-Saxon terminology).
  • the present invention relates to such a sample-and-hold circuit.
  • circuits delivering only 6V peak to peak but by providing devices on the screen, such as the use of a counter-electrode.
  • a voltage excursion ranging respectively from 0 to 6V and from -6V to 0, which is well equivalent to having 12V peak to peak (from -6V to + 6V).
  • the object of the present invention is to remedy these drawbacks. To this end, it offers a protection circuit comprising a set of transistors serving as switches. Appropriate switching of these transistors ensure the reset of an intermediate point and limits the risks of overvoltage.
  • This circuit can be applied to the realization of a double control circuit making it possible to have, on a single output pad, an output voltage ranging from -V and + V (i.e. an excursion of 12V) without the transistors component of this circuit have to fear seeing at their terminals a voltage exceeding V.
  • Such a circuit comprises two control circuits conforming to the circuit which has just been defined, these circuits working alternately and receiving video input signals of opposite polarities , the respective electronic switches of the two protection circuits being controlled by complementary signals, the two protection circuits being connected to a single output pad.
  • the column control circuit CCC shown in FIG. 2 comprises means 10 capable of delivering a voltage pulse.
  • the control circuit CC is a blocker sampler receiving a video voltage V and sampling it at a time defined by a sampling pulse ECH .
  • An example of such a circuit will be illustrated in FIG. 4.
  • the control circuit CC further comprises a protection circuit CP composed of three electronic switches, in practice transistors, respectively T1, T2 and T3.
  • the transistors T1 and T2 are mounted in series between the output s and the pad S.
  • the third, T3, is mounted between the midpoint m and a point M brought to ground. These three transistors are controlled by signals S1, S2, S3 delivered by a circuit 20.
  • FIG. 4 shows a double column control circuit CCC for a display screen, comprising a circuit CC+ working with a video signal V+ and a circuit CC ⁇ working with a video signal V ⁇ .
  • These two circuits work alternately, as is the case in the control circuits of liquid crystal display screens in which the voltage applied to the liquid crystal sees its sign alternate from one line scan to the next.
  • the two video signals V+ and V ⁇ are delivered by a video circuit CV which supplies two video buses, one positive BV+, the other negative BV ⁇ .
  • the circuit CC+ comprises a sampling capacitor Ce+ connected to a sampling transistor Te+ controlled by a sampling signal ECH+, an amplifier A+ with, in parallel, a storage capacitor Cs+, all Te+, Ce+, A+, Cs+ constituting a blocking sampler.
  • the circuit CC+ is completed by a protection circuit CP+ with three transistors T1+, T2+, T3+.
  • the CC ⁇ circuit is identical to the CC+ circuit and includes the same elements designated by the same references assigned a sign - instead of a + sign.
  • the two circuits CC+ and CC ⁇ have their outputs connected to the same pad S, which is connected to a column C of the display screen.
  • the CC+ control logic is between 0 and VDD while the CC ⁇ control logic is between VSS and 0.
  • the operation of the double circuit of FIG. 4 is illustrated by the timing diagram of FIG. 5.
  • On the first line is represented the video signal V.
  • On the following two lines are represented the two sampling pulses ECH+ and ECH ⁇ .
  • the fourth line shows the pulse S+ which defines the state of the switch T1+ as well as, by addition, the state of T3+, the state of T1 ⁇ and the state of T3 ⁇ .
  • the fifth line shows the pulse S2+ which defines the state of the switch T2+, as well as, by addition, the state of T2 ⁇ .
  • the last line shows the sampled and maintained output signal, alternately positive S+ and negative S ⁇ .
  • the circuit which has just been described is not limited to the control of display screens but can be applied to other electronics techniques.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal (AREA)
EP91402494A 1990-09-21 1991-09-19 Circuit de protection pour circuit de commande, notamment d'écran d'affichage à cristal liquide Expired - Lifetime EP0477099B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9011681 1990-09-21
FR9011681A FR2667187A1 (fr) 1990-09-21 1990-09-21 Circuit de commande, notamment pour ecran d'affichage a cristal liquide, a sortie protegee.

Publications (2)

Publication Number Publication Date
EP0477099A1 EP0477099A1 (fr) 1992-03-25
EP0477099B1 true EP0477099B1 (fr) 1994-11-30

Family

ID=9400530

Family Applications (1)

Application Number Title Priority Date Filing Date
EP91402494A Expired - Lifetime EP0477099B1 (fr) 1990-09-21 1991-09-19 Circuit de protection pour circuit de commande, notamment d'écran d'affichage à cristal liquide

Country Status (5)

Country Link
US (1) US5289332A (enrdf_load_stackoverflow)
EP (1) EP0477099B1 (enrdf_load_stackoverflow)
JP (1) JPH05150216A (enrdf_load_stackoverflow)
DE (1) DE69105431T2 (enrdf_load_stackoverflow)
FR (1) FR2667187A1 (enrdf_load_stackoverflow)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5801673A (en) * 1993-08-30 1998-09-01 Sharp Kabushiki Kaisha Liquid crystal display device and method for driving the same
US5798747A (en) * 1995-11-17 1998-08-25 National Semiconductor Corporation Methods and apparatuses for high-speed video sample and hold amplification for analog flat panel display
US5910780A (en) * 1996-11-13 1999-06-08 Analog Devices, Inc. Switched-transconductance multiplexer circuit with integrated T-switches
US6040732A (en) * 1997-04-09 2000-03-21 Analog Devices, Inc. Switched-transconductance circuit within integrated T-switches
JP2006178356A (ja) * 2004-12-24 2006-07-06 Nec Electronics Corp 表示装置の駆動回路
KR101192790B1 (ko) * 2006-04-13 2012-10-18 엘지디스플레이 주식회사 표시장치의 구동회로
TWI347578B (en) * 2006-09-18 2011-08-21 Chimei Innolux Corp System for displaying image and method for driving an ac signal generating circuit
US7699129B2 (en) * 2007-10-31 2010-04-20 Ford Global Technologies, Llc Method and system for alerting a driver that a motive power system is about to be activated
CN111380739A (zh) * 2018-12-27 2020-07-07 深圳市帝迈生物技术有限公司 一种防干扰装置、样本分析方法及样本分析仪
US10917090B1 (en) * 2019-12-02 2021-02-09 Texas Instruments Incorporated Multi-channel multiplexer

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2458117A1 (fr) * 1979-05-28 1980-12-26 Suwa Seikosha Kk Systeme d'affichage a cristaux liquides et circuit d'attaque en courant alternatif pour ce systeme
US4438354A (en) * 1981-08-14 1984-03-20 American Microsystems, Incorporated Monolithic programmable gain-integrator stage
JPS6059389A (ja) * 1983-09-12 1985-04-05 シャープ株式会社 液晶表示装置の駆動回路
JPS60257683A (ja) * 1984-06-01 1985-12-19 Sharp Corp 液晶表示装置の駆動回路
DE3641556A1 (de) * 1985-12-09 1987-06-11 Sharp Kk Steuerschaltung fuer eine fluessigkristallanzeige
US4781437A (en) * 1987-12-21 1988-11-01 Hughes Aircraft Company Display line driver with automatic uniformity compensation
US5111195A (en) * 1989-01-31 1992-05-05 Sharp Kabushiki Kaisha Driving circuit for a matrix type display device

Also Published As

Publication number Publication date
FR2667187B1 (enrdf_load_stackoverflow) 1995-05-12
JPH05150216A (ja) 1993-06-18
EP0477099A1 (fr) 1992-03-25
DE69105431D1 (de) 1995-01-12
DE69105431T2 (de) 1995-06-14
US5289332A (en) 1994-02-22
FR2667187A1 (fr) 1992-03-27

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