EP0473731B1 - Verfahren und anordnung zum vergleich zweier veraenderlicher analogsignale - Google Patents

Verfahren und anordnung zum vergleich zweier veraenderlicher analogsignale Download PDF

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Publication number
EP0473731B1
EP0473731B1 EP91900037A EP91900037A EP0473731B1 EP 0473731 B1 EP0473731 B1 EP 0473731B1 EP 91900037 A EP91900037 A EP 91900037A EP 91900037 A EP91900037 A EP 91900037A EP 0473731 B1 EP0473731 B1 EP 0473731B1
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EP
European Patent Office
Prior art keywords
signals
signal
circuit
correlation
analogue signals
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EP91900037A
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English (en)
French (fr)
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EP0473731A1 (de
Inventor
Michel Ayraud
Mario D'amico
Gérard Pelous
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Bertin Technologies SAS
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Bertin et Cie SA
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Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R23/00—Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
    • G01R23/005—Circuits for comparing several input signals and for indicating the result of this comparison, e.g. equal, different, greater, smaller (comparing phase or frequency of 2 mutually independent oscillations in demodulators)

Definitions

  • the invention relates to a method and a device. comparison of two variable analog signals, for example over time, such as audio signals or video, which are either different from each other, or identical but shifted in time.
  • correlation function which lead to use steep slope band filters, analog-to-digital converters, a system of information processing allowing calculation in time correlation function, and an algorithm for complex treatment capable of taking into account and compensate for any offset between the signals.
  • the cost systems allowing this calculation is generally quite Student.
  • phase comparator which includes two channels analog signal processing, these two channels each comprising in series transformation circuits from analog signals to binary logic signals, a logic circuit of the exclusive OR type and an establishment circuit of a signal by summation.
  • phase comparator which uses an integrated correlation circuit.
  • This comparator comprises two parallel signal processing channels, one of which includes means for shifting one of the signals over time with respect to the other, the offset being equal to ⁇ 2 . Furthermore, said comparator uses a circuit for adding the absolute values of the two correlation signals.
  • the object of the invention is in particular to simplify the aforementioned methods and systems of numerical computation and therefore greatly lower their cost while retaining the desired speed and accuracy of establishing the correlation.
  • Transformation of analog signals into binary logic signals allows working on a single bit and then use a logical operator to perform the correlation between the signals. This results in a simplification important of the correlation process compared to classical numerical calculation methods.
  • the third correlation signal obtained is substantially independent of the time lag between signals to compare, without the need to measure this shift.
  • this process also consists in transforming each analog signal into binary logic signal by detection of zero crossings of this analog signal, and assigning a first logical value to the signal when positive, and a second logical value when it is negative.
  • Detection of zero crossing signals analog provides simple excellent dynamic (of the order of 60 to 80dB) which would correspond at least 12 bit resolution within known methods of numerical calculation.
  • the method also consists in connecting the logic circuit output to a low pass filter to achieve the aforementioned sum function.
  • the invention also provides a device for comparison of two variable analog signals, including means for establishing a correlation signal between these two analog signals and means of comparison of this signal with a predetermined value to check whether there is identity or not between the signals analog, characterized in that, these analog signals being either identical and time-shifted, either different, and covering a predetermined frequency band, this device includes two parallel tracks analog signal processing, one of which includes means for shifting one of the signals over time relative to each other, the offset being equal to 1/4 of period at the center frequency of the frequency band above, these two channels each comprising in series of circuits for transforming analog signals into binary logic signals, a logic circuit of the type multiplier or exclusive OR, an establishment circuit by summing a correlation signal S1, S2, and a circuit for adding the absolute values of the two signals correlation S1, S2, producing an output signal correlation S substantially independent of an offset in the time between the above analog signals.
  • a low-pass filter at the output of each circuit logic provides the value of the correlation signal S1, S2 corresponding to a given offset between analog signals.
  • the output of the addition circuit is connected to the input of a low-pass filter, realizing smoothing the correlation signal.
  • the device according to the invention also includes leveling circuits as input analog signals, such as for example automatic gain control circuits, and filters band pass.
  • leveling circuits as input analog signals, such as for example automatic gain control circuits, and filters band pass.
  • the circuits for transforming analog signals into binary logic signals are advantageously circuits for comparing analog signals to a determined value, in particular the value zero, allowing the detection of passages of analog signals by zero and the attribution to these signals of two binary values depending on whether they are positive or negative .
  • the cost of a device according to the invention is far inferior to that of the devices classics of numerical computation of a function of correlation, and its performance is excellent.
  • Figure 1 represents an example of application of the method and the device according to the invention.
  • Reference 10 designates a radio receiver or television, connected to an antenna 12 and associated with a apparatus 14 for detecting the frequency on which is tuned the receiver 10.
  • This device 14 includes a reference receiver 16, also connected to the antenna 12, a device correlation 18 according to the invention, a microprocessor 20 information processing, memory 22 data logging, an interface circuit 24 electronics to control receiver 16 under microprocessor control 20, and a dating clock 25.
  • receivers 10 and 16 are connected at the inputs of the correlation device 18, the output is connected to an input of the microprocessor 20.
  • This by means of the interface 24, performs a scanning systematic of the frequencies received by the receiver 16 of reference, whose output signals are compared to those of the receiver 10 by the device 18.
  • the correlation between these signals establishes that receivers 10 and 16 are set to the same frequency. Correlation dates and the corresponding frequencies are saved in memory 22 from which they can then be extracted and used.
  • Figure 2 shows schematically the constitution of a correlation device 18 according to the invention.
  • audio or video signals produced by receptors 10 and 16 are applied to input circuits including circuits 26 of upgrade, such as automatic control circuits gain, generating analog signals with determined maximum voltage levels, and filters bandpass 28, reducing the frequency range signals at a predetermined band.
  • circuits 26 of upgrade such as automatic control circuits gain, generating analog signals with determined maximum voltage levels, and filters bandpass 28, reducing the frequency range signals at a predetermined band.
  • the bandwidth of the filters 28 is by example of an octave or more (e.g. 500-1000 Hz) for audio signals.
  • each filter 28 is applied to the input of an analog signal transformation circuit 30 in binary logic signal compared to a predetermined value, which is preferably the value zero.
  • the circuits 30 can therefore be simple comparators, whose positive inputs receive signals filters 28 and whose negative inputs are connected to ground.
  • the outputs of the two comparators 30 are connected to the two inputs of a logic circuit 32 of the OR type exclusive, whose output signal is a logic signal binary, high level (e.g. 1) when both input signals are identical, and low level (0 or -1), when the two input signals are different.
  • the function of circuit 32 is therefore equivalent to a multiplication logic.
  • the output of circuit 32 is connected to a filter low pass 34 which performs a summation of the output of logic circuit 32, and which produces a signal correlation between the signals to be compared.
  • x (i) and y (i) are the signals to compare, ⁇ is the offset between the signals.
  • Circuit 34 provides this function of creation for a zero value of the offset between the signals. One thus obtains at the output of circuit 34 a signal S1 which is equal to the correlation signal S0 between the signals to compare when their offset is zero and which is less than this signal when there is an offset between the signals to be compared.
  • this ratio is equal to 1 when the phase shift is zero or multiple of 2 ⁇ , that it is equal to 0 for phase shifts of 90 degrees, 270 degrees etc ... and that it is equal to -1 for phase shifts of ⁇ , 3 ⁇ , etc. (the variation of this ratio between the values 1 and -1 assumes that the binary values of the output signal from the logic circuit 32 are 1 and -1).
  • the graph in Figure 3 shows that we have makes a total loss of correlation at the output of the circuit 34 when the phase difference between the signals to be compared is close to ⁇ / 2, 3 ⁇ / 2, etc.
  • the invention provides ( Figure 2) that the outputs circuits 28 are connected to the inputs of a circuit 36 adding a quarter shift T / 4 to the frequency central filter bandwidth 28 to one of the analog signals, relative to the other signal analog.
  • the outputs of circuit 36 are connected to the positive inputs of comparators 30 whose outputs are connected to the inputs of a logic circuit 32 identical to circuit 32 previously described.
  • the exit of this logic circuit is connected to the input of a filter low pass 34 with comparable S2 output signal to the aforementioned output signal S1, but is offset by compared to this one.
  • the graph in Figure 4 represents the variation of the S2 / S0 ratio as a function of a phase shift between the signals to be compared.
  • the outputs of the filters 34 are therefore connected to the inputs of circuits 38 absolute value (e.g. rectification circuits double alternation) whose outputs are connected to the inputs of an adder circuit 40.
  • the output signal S of circuit 40 is a correlation signal which is substantially independent of the offset between the signals to be compared, and whose variation in the ratio to the correlation signal S0 is shown in Figure 5.
  • This signal S can be applied to the input of a smoothing circuit 42 such as a low-pass filter, the output is connected to the positive input of a comparator 44.
  • the negative input of this comparator receives a voltage of predetermined value to which the output signal from circuit 42.
  • the output signal from comparator 44 is applicable to an input of the microprocessor 20 of the apparatus 14 of FIG. 1.
  • the audio or video signals produced by the receivers 10 and 16 are applied to the leveling circuits 26, then processed by the bandpass filters 28 and transformed into binary logic signals by the comparators 30. They are then compared with each other by the logic circuit 32, a first time directly, a second time after one of these signals has undergone a shift of a quarter of a period at the center frequency of the pass band of the filters 28, correlation signals are established by the low-pass filters 34, and the absolute values of these signals are added to obtain a correlation signal little dependent on the offset between the initial analog signals. This correlation signal is smoothed and compared to a predetermined value. If it is greater than this value, the analog signals will be considered to be identical, while they will be considered to be different from each other if the correlation signal is less than the predetermined value.
  • the correlation device whose components essentials have been represented in figure 2, is therefore relatively simple and has the important advantage of work on a single bit, unlike systems comparable numerical computations used in the art anterior, which generally work on 8 or 16 bits of digital resolution.
  • each exclusive 32 OR driver circuit an up-down circuit 46, which counts by increase when the output signal of circuit 32 is level +1, and by decrease when this output signal is at level -1.
  • a timer circuit 48 associated with a clock 50 periodically resets the circuits 46. After a time T, the sum of the absolute values contents of the two circuits 46 is calculated by a adder circuit 52 and compared by a circuit 54 to a double threshold (symmetrical thresholds with respect to zero).
  • the output of comparator 54 provides a decision signal of correlation or non-correlation between the signals initial analogs.
  • the adder circuit 52 performs either the sum of signals S1 and S2 of circuits 46 when they are of the same sign, that is to say their subtraction when they are of opposite sign. It is controlled for this by bits of sign s1 and s2 of signals S1 and S2.
  • the invention is of course applicable to other analog signals than audio and video signals, and it also applies to analog signals which vary according to another parameter than the weather.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Radar Systems Or Details Thereof (AREA)
  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
  • Television Receiver Circuits (AREA)
  • Complex Calculations (AREA)
  • Circuits Of Receivers In General (AREA)

Claims (14)

  1. Verfahren zum Vergleichen zweier veränderlicher Analogsignale, wobei ein Korrelationssignal dieser Analogsignale erstellt wird und ausgehend von den Werten dieses Signals festgestellt wird, ob die Analogsignale identisch sind oder nicht, dadurch gekennzeichnet, daß die zu vergleichenden Signale entweder identisch, jedoch zeitlich versetzt sind oder unterschiedlich sind und innerhalb eines vorbestimmten Frequenzbandes liegen, wobei das Verfahren folgendes aufweist:
    Umwandeln der Analogsignale in logische Binärsignale und Zufuhren der letzteren an die Eingänge einer logischen Schaltung (32) von der Art einer Exklusiv-ODER Verknüpfung oder eines Multiplizierers, wonach auf das Ausgangssignal dieser logischen Schaltung eine Summenfunktion angewendet wird, um ein erstes Korrelationssignal S1 zu erhalten,
    in gleicher Weise Ausführen dieser Schritte an den Analogsignalen, nachdem sie gegeneinander um eine 1/4-Periode der mittleren Frequenz des oben genannten Frequenzbandes versetzt wurden, um ein zweites Korrelationssignal S2 zu erhalten,
    Bilden der Summe der Absolutwerte der ersten und zweiten Korrelationssignale, um ein drittes Korrelationssignal S zu erhalten, welches im wesentlichen unabhangig von einer zeitlichen Versetzung der Analogsignale ist.
  2. Verfahren nach Anspruch 1, dadurch gekennzeichnet, daß eine Glättung des dritten Korrelationssignals S durchgeführt wird, bevor es mit einem vorbestimmten Wert verglichen wird, um festzustellen, ob die Analogsignale identisch sind oder nicht.
  3. Verfahren nach Anspruch 1 oder 2, dadurch gekennzeichnet, daß das Frequenzband in einem Frequenzbereich gewählt wird, in welchem die Analogsignale liegen, wobei angenommen wird, daß die Anderungen dieser Signale innerhalb dieses Frequenzbandes liegen.
  4. Verfahren nach einem der vorigen Ansprüche, dadurch gekennzeichnet, daß jedes Analogsignal durch Feststellen der Nulldurchgänge dieses Analogsignals und durch Zuteilen eines ersten logischen Wertes, wenn das Signal positiv ist, und eines zweiten logischen Wertes, wenn das Signal negativ ist, in ein logisches Binarsignal umgewandelt wird.
  5. Verfahren nach einem der vorigen Ansprüche, dadurch gekennzeichnet, daß der Ausgang der logischen Schaltung (32) einem Tiefpaßfilter (34) zugeordnet ist, um die Summenfunktion herzustellen.
  6. Verfahren nach einem der Ansprüche 1 bis 4, dadurch gekennzeichnet, daß der Ausgang der logischen Schaltung (32) mit einem Auf- und Abwärtszähler (46) zur Herstellung der Summenfunktion verbunden ist.
  7. Verfahren nach einem der vorigen Ansprüche, dadurch gekennzeichnet, daß die zu vergleichenden Analogsignale beispielsweise durch Radioempfanger erzeugte Audiosignale oder durch Fernsehempfanger erzeugte Videosignale sind.
  8. Vorrichtung zum Vergleichen zweier veränderlicher Analogsignale, welche Mittel zum Herstellen eines Korrelationssignals dieser beiden Analogsignale und Mittel (44) zum Vergleichen dieses Signals mit einem vorbestimmten Wert aufweist, um festzustellen, ob die Analogsignale identisch sind oder nicht, dadurch gekennzeichnet, daß die Analogsignale entweder identisch und zeitlich versetzt oder unterschiedlich sind und innerhalb eines vorbestimmten Frequenzbandes liegen, wobei diese Vorrichtung zwei parallele Pfade zur Verarbeitung der Analogsignale aufweist, von denen einer Mittel (36) zum zeitlichen Versetzen des einen Signals bezüglich des anderen besitzt und die Versetzung gleich einer 1/4-Periode der mittleren Frequenz des Frequenzbandes ist, wobei jeder dieser zwei Pfade nacheinander aufweist: Schaltungen (30) zum Umwandeln von Analogsignalen in logische Binarsignale, eine logische Schaltung (32) von der Art eines Multiplizierers oder einer Exklusiv-ODER Verknüpfung, eine Schaltung (34) zum Erzeugen eines Korrelationssignals S1, S2 durch Addition und eine Schaltung (38, 40, 52) zur Addition der Absolutwerte der zwei Korrelationssignale S1, S2, wobei am Ausgang ein Korrelationssignal S erzeugt wird, das im wesentlichen unabhängig von einer zeitlichen Versetzung der Analogsignale ist.
  9. Vorrichtung nach Anspruch 8, dadurch gekennzeichnet, daß der Ausgang der Addierschaltung (40) mit dem Eingang eines Tiefpaßfilters (42) verbunden ist, welches eine Glättung des Korrelationssignals S bewirkt.
  10. Vorrichtung nach Anspruch 9, dadurch gekennzeichnet, daß am Ausgang eine Schaltung (44) zum Vergleichen des Korrelationssignals S mit einem vorbestimmten Schwellwert vorgesehen ist.
  11. Vorrichtung nach einem der Ansprüche 8 bis 10, dadurch gekennzeichnet, daß die Schaltung zur Herstellung jedes Korrelationssignals S1, S2 durch Addition ein Tiefpaßfilter (34) ist, dessen Ausgang mit einer Schaltung (38) zur Absolutwertbildung, wie einer Vollweg-Gleichrichterschaltung, verbunden ist.
  12. Vorrichtung nach Anspruch 8, dadurch gekennzeichnet, daß die Schaltung zur Herstellung jedes Korrelationssignals S1, S2 ein Auf- und Abwärtszähler (46) ist, der einer Schaltung (48) zur periodischen Nullstellung zugeordnet ist.
  13. Vorrichtung nach einem der Ansprüche 8 bis 12, dadurch gekennzeichnet, daß sie Eingangsschaltungen aufweist, von denen jede aus einer Pegelschaltung (26), wie einer automatisch gesteuerten Verstärkerschaltung, und aus einem Bandpaßfilter (28) besteht, dessen Durchlaßbereich dem vorbestimmten Frequenzband entspricht.
  14. Vorrichtung nach einem der Ansprüche 8 bis 13, dadurch gekennzeichnet, daß die Umwandlerschaltungen in logische Binärsignale Schaltungen (30) zum Vergleichen von Analogsignalen mit einem vorbestimmten Wert, insbesondere dem Wert Null, aufweisen.
EP91900037A 1989-12-01 1991-06-28 Verfahren und anordnung zum vergleich zweier veraenderlicher analogsignale Expired - Lifetime EP0473731B1 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AT91900037T ATE103077T1 (de) 1989-12-01 1991-06-28 Verfahren und anordnung zum vergleich zweier veraenderlicher analogsignale.

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR8915906 1989-12-01
FR8915906A FR2655439B1 (fr) 1989-12-01 1989-12-01 Procede et dispositif de comparaison de deux signaux analogiques variables.

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EP0473731A1 EP0473731A1 (de) 1992-03-11
EP0473731B1 true EP0473731B1 (de) 1994-03-16

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US (1) US5305243A (de)
EP (1) EP0473731B1 (de)
JP (1) JPH04505366A (de)
CA (1) CA2046652A1 (de)
DE (1) DE69007477D1 (de)
FR (1) FR2655439B1 (de)
WO (1) WO1991008493A2 (de)

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Publication number Priority date Publication date Assignee Title
JP3102734B2 (ja) * 1993-09-29 2000-10-23 株式会社ケンウッド 相関検出器
DE19749803A1 (de) * 1997-11-11 1999-05-27 Sensopart Industriesensorik Gm Vorrichtung zur Ermittlung der Beleuchtungsposition mit einer positionsempfindlichen photoelektrischen Detektoreinrichtung
AU1270300A (en) * 1998-11-17 2000-06-05 Koninklijke Philips Electronics N.V. Embedding and extracting supplemental data in an information signal
JP3675256B2 (ja) * 1999-10-15 2005-07-27 日本碍子株式会社 ベクトル信号処理回路
DE102006007184A1 (de) * 2006-02-15 2007-08-16 Dr. Johannes Heidenhain Gmbh Positionsmesseinrichtung
JP5141052B2 (ja) * 2007-03-08 2013-02-13 日本電気株式会社 電源ノイズ測定回路および測定方法

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3961172A (en) * 1973-12-03 1976-06-01 Robert Stewart Hutcheon Real-time cross-correlation signal processor
FR2314538A1 (fr) * 1975-06-10 1977-01-07 Thomson Csf Dispositif correlateur et systeme de mesure du retard entre deux signaux comportant un tel dispositif
US4224679A (en) * 1978-10-16 1980-09-23 Rca Corporation Signal correlation means
JPS61207973A (ja) * 1985-03-13 1986-09-16 Mitsubishi Electric Corp 相関式時間差計

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Publication number Publication date
WO1991008493A2 (fr) 1991-06-13
EP0473731A1 (de) 1992-03-11
FR2655439A1 (fr) 1991-06-07
CA2046652A1 (fr) 1991-06-02
JPH04505366A (ja) 1992-09-17
WO1991008493A3 (fr) 1996-09-19
FR2655439B1 (fr) 1992-05-15
US5305243A (en) 1994-04-19
DE69007477D1 (de) 1994-04-21

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