EP0435750B1 - Procédé d'adressage de chaque colonne d'un écran LCD de type matriciel - Google Patents

Procédé d'adressage de chaque colonne d'un écran LCD de type matriciel Download PDF

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Publication number
EP0435750B1
EP0435750B1 EP90403695A EP90403695A EP0435750B1 EP 0435750 B1 EP0435750 B1 EP 0435750B1 EP 90403695 A EP90403695 A EP 90403695A EP 90403695 A EP90403695 A EP 90403695A EP 0435750 B1 EP0435750 B1 EP 0435750B1
Authority
EP
European Patent Office
Prior art keywords
period
voltage
column
ramp
video signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP90403695A
Other languages
German (de)
English (en)
French (fr)
Other versions
EP0435750A1 (fr
Inventor
Bruno Mourey
Eric Benoit
Antoine Dupont
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Technicolor SA
Original Assignee
Thomson Multimedia SA
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Filing date
Publication date
Application filed by Thomson Multimedia SA filed Critical Thomson Multimedia SA
Publication of EP0435750A1 publication Critical patent/EP0435750A1/fr
Application granted granted Critical
Publication of EP0435750B1 publication Critical patent/EP0435750B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2011—Display of intermediate tones by amplitude modulation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0259—Details of the generation of driving signals with use of an analog or digital ramp generator in the column driver or in the pixel circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0204—Compensation of DC component across the pixels in flat panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3614—Control of polarity reversal in general

Definitions

  • the present invention relates to the control of the columns of a matrix type LCD screen, more particularly a method of addressing each column of a matrix type LCD screen and in particular of an active matrix LCD screen.
  • a matrix type LCD screen comprises a set of bus-lines and bus-columns which controls the voltage applied to electrodes located on the same side of a liquid crystal layer, the other side being occupied by a counter electrode which cooperates with the first electrode to electrically orient the molecules of the liquid crystal and achieve the modulation of a light beam by polarization rotation.
  • the columns are controlled by supplying each column with a charge current of the capacity produced between the column conductor and the counter-electrode such that the electric voltage across this capacity represents a sample of video signal between two successive addresses.
  • An example of a control circuit for an active matrix LCD screen is described in particular in European application EP-A-0 298 255.
  • a control circuit of a column comprising a voltage-duration converter 1 which receives on one of its inputs the sample E of video signal and on its other input a voltage ramp from a generator of ramps 2.
  • This converter outputs a pulse I whose duration t reflects the amplitude of the input video signal sample.
  • This pulse I is sent to the gate g of a driving effect transistor 3 having a field effect, one of the electrodes or drain d of which, in the embodiment shown, receives a voltage ramp from generator 2 and whose l The other electrode or source is connected to the column bus in question.
  • the pulse I obtained at the output of converter 1 does not have a falling edge with a steep slope.
  • the blocking of transistor 3 occurs at a time which depends on the value of the conduction threshold. Consequently, the charging voltage of the capacity changes with the displacement of the threshold.
  • the conduction threshold shifts due to the electrical stress or constraint undergone by the field effect transistor 3 which is used to switch the column.
  • This stress can be defined as the product of the gate-source voltage by the time during which the voltage is applied.
  • this stress is a function of the value of the input signal and therefore of the video signal since the duration of the pulse is a function of the video signal.
  • FIG. 2 shows the pulse I, the voltage ramp and the column voltages V1 and V2 obtained.
  • threshold voltages T1 and T2 respectively with threshold voltages T1 and T2. It can be seen that the rise in the threshold voltage of the transistor tends to reduce the column voltage Vsg. Thus, it can be seen that a low value of the video signal sample generates a gate-source voltage stress lower than the stress generated by a high value of the video signal sample, as shown diagrammatically by A and B on FIG. 3. In the first case, the offset of the threshold voltage will therefore be lower. This therefore results in a non-uniform shift of the threshold voltages of the various column switching transistors, resulting in non-uniformity of luminance on the LCD screen.
  • the object of the present invention is therefore to remedy this drawback by proposing a method for addressing each column which prevents the switching threshold of the transistor from changing with the video signal samples.
  • the present invention also aims to propose a method for addressing each column which makes it possible to create conditions such that the gate-source stress of the transistor is on average independent of the video signal sample applied to the column.
  • the subject of the present invention is a method of addressing each column of a matrix type LCD screen comprising the periodic production of pulses of period T as a function of the video signal to be displayed on the screen, the pulses controlling a drive transistor of said column and having a duration determined by the amplitude of the sample video signal at input, each pulse acting on the conduction state of said transistor to connect said column to a supply terminal where develop voltage ramps of period T, characterized in that the pulses are alternated periodically so that the sum of the durations of two alternating pulses corresponds to said period T of the pulses, and characterized in that so that a given amplitude of the video signal sample produces the same optical effect from one period to the next, is applied to said column either, in the case where the voltage applied to the liquid crystal counter electrode is not alternated from period T to period T, for all consecutive pairs of periods, a first of the voltage ramps followed by a second of the said voltage ramps offset with respect to the first ramp by a value at least equal to its maximum amplitude, that
  • the video signal before the production of the pulses, is periodically inverted so as to obtain, during a first period a pulse of duration t and during a second period a pulse of duration Tt, T being the duration of the period.
  • the voltage ramp is offset symmetrically at each period with respect to the fixed voltage so as to apply a ramp varying between V and V 'during a first period and a ramp varying between -V 'and -V during a second period.
  • a DC offset voltage is applied to the counter electrode compensating for the average offset of the threshold voltages of the switching transistors.
  • the present invention also relates to an LCD screen for implementing the method described above.
  • FIG. 4 shows an active matrix LCD screen. This screen has been represented diagrammatically by a single point or pixel P at the intersection of a column bus cl and a line bus L.
  • the coupling line L-column cl is produced by a transistor T in thin film (TFT) which receives on its grid the voltage applied to the line L and on an electrode the voltage applied to the column, the other electrode being connected to the liquid crystal electrode forming with the CE counter electrode the capacity C.
  • the liquid crystal is therefore equivalent to a capacity C with a resistance not shown.
  • the CE counter-electrode receives an alternating voltage from a rectangular voltage generator 4. As shown in FIG.
  • the CE counter-electrode voltage alternately goes to a level of, for example 5 Volts during a first period then at a level of, for example, 0 Volts during a second period.
  • the column control circuit comprises, like the column control circuit of FIG. 1, a voltage-duration converter 1 which receives as input a sample of video signal and on another input of a ramp from a ramp generator 2.
  • the video signal sample E comes from a circuit 5 complementing the video signal.
  • the circuit 5 is controlled by the rectangular voltage generator 4 so as to apply for a first period the video signal itself and for a second period the complement of the video signal.
  • a pulse I is obtained whose duration is a function of the amplitude of the video signal, namely a pulse I having, for example, a duration t during the first period and a duration Tt during the second period, T representing the duration of the period, namely preferably a frame duration. More generally, the alternation of the two pulse durations is equal to a predetermined sum.
  • the pulse I when the pulse I has a duration t, one obtains on the source s of the transistor 3 a voltage V ′ as represented in FIG. 5.
  • the voltage across the terminals of the cell of liquid crystal is equal to (5 Volts - V ′) in the embodiment shown and corresponds to a high voltage allowing for example the display of black.
  • the pulse I has a duration T-t and corresponds to a voltage V on the source.
  • the voltage across the terminals of the liquid crystal cell becomes equal to 0-V, this voltage is also a high voltage corresponding to the display of black.
  • the threshold voltages of the control transistors of the different lines undergo an offset so that the voltages corresponding to white and black respectively are no longer V and V ′ but in general V-DV and V′-DV.
  • an offset voltage of the same level is applied to the counter-electrode.
  • this compensation can also be carried out at other places, in particular by decoding the ramp or at the level of the video signal itself.
  • FIG. 6 an embodiment of the addressing method according to the present invention in the case where the CE counter-electrode receives a fixed voltage, for example a voltage of 0 Volt.
  • the ramp applied to one of the electrodes of the switching transistor 3 is offset in voltage at each period.
  • a ramp varying for example, between 0 and 5 Volts during a first period
  • a ramp varying between -5 Volts and 0 Volt during a second period as shown in FIG. 5 which relates to an example of coding with a black dot.
  • the pulse applied to the gate of the transistor 3 has a duration t0 which corresponds to maximum stress.
  • the voltage across the pixel P is therefore equal to 5 Volts (maximum value of the ramp) -0 Volt (voltage applied to the counter-electrode), or 5 Volts which corresponds to a minimum luminance of the point.
  • the pulse applied to the gate of transistor 3 has a duration T-to corresponding to minimal stress.
  • the voltage across the pixel is equal to - 5 Volts (minimum value of the ramp) - 0 Volt (value of the counter-electrode voltage) or - 5 Volts.
  • the luminance of the point is still minimal in this case.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal (AREA)
EP90403695A 1989-12-28 1990-12-20 Procédé d'adressage de chaque colonne d'un écran LCD de type matriciel Expired - Lifetime EP0435750B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR8917312A FR2656757B1 (fr) 1989-12-28 1989-12-28 Procede d'adressage de chaque colonne d'un ecran lcd de type matriciel.
FR8917312 1989-12-28

Publications (2)

Publication Number Publication Date
EP0435750A1 EP0435750A1 (fr) 1991-07-03
EP0435750B1 true EP0435750B1 (fr) 1996-03-06

Family

ID=9389059

Family Applications (1)

Application Number Title Priority Date Filing Date
EP90403695A Expired - Lifetime EP0435750B1 (fr) 1989-12-28 1990-12-20 Procédé d'adressage de chaque colonne d'un écran LCD de type matriciel

Country Status (6)

Country Link
US (1) US5319381A (ja)
EP (1) EP0435750B1 (ja)
JP (1) JP3034612B2 (ja)
AT (1) ATE135129T1 (ja)
DE (1) DE69025736D1 (ja)
FR (1) FR2656757B1 (ja)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1992007352A1 (fr) * 1990-10-19 1992-04-30 Thomson S.A. Circuit de commande pour afficheur de type matriciel et decodeur de signal pour un tel circuit
GB9217336D0 (en) * 1992-08-14 1992-09-30 Philips Electronics Uk Ltd Active matrix display devices and methods for driving such
JPH06314080A (ja) * 1993-04-14 1994-11-08 Internatl Business Mach Corp <Ibm> 液晶表示装置
US5712653A (en) * 1993-12-27 1998-01-27 Sharp Kabushiki Kaisha Image display scanning circuit with outputs from sequentially switched pulse signals
JP3470440B2 (ja) * 1995-02-28 2003-11-25 ソニー株式会社 ランプ信号生成方法、ランプ信号生成装置、液晶駆動装置及び液晶表示装置
US6310599B1 (en) 1995-12-22 2001-10-30 Cirrus Logic, Inc. Method and apparatus for providing LCD panel protection in an LCD display controller
GB2313224A (en) * 1996-05-17 1997-11-19 Sharp Kk Ferroelectric liquid crystal device
US6137466A (en) * 1997-11-03 2000-10-24 Motorola, Inc. LCD driver module and method thereof
FR2787910B1 (fr) * 1998-12-23 2001-03-16 Sextant Avionique Circuit de commande d'ecran a cristaux liquides
US6657609B2 (en) * 2001-09-28 2003-12-02 Koninklijke Philips Electronics N.V. Liquid crystal displays with reduced flicker
KR100605763B1 (ko) * 2005-01-18 2006-08-01 엘지전자 주식회사 플라즈마 디스플레이 패널 구동 장치 및 방법
JP4810910B2 (ja) * 2005-07-26 2011-11-09 エプソンイメージングデバイス株式会社 電気光学装置、駆動方法および電子機器
WO2007034353A2 (en) * 2005-09-19 2007-03-29 Koninklijke Philips Electronics N.V. Active-matrix display devices and methods of driving the same

Family Cites Families (11)

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Publication number Priority date Publication date Assignee Title
US4525710A (en) * 1982-02-16 1985-06-25 Seiko Instruments & Electronics Ltd. Picture display device
FR2524679B1 (fr) * 1982-04-01 1990-07-06 Suwa Seikosha Kk Procede d'attaque d'un panneau d'affichage a cristaux liquides a matrice active
JPS59113420A (ja) * 1982-12-21 1984-06-30 Citizen Watch Co Ltd マトリクス表示装置の駆動方法
JPH0634154B2 (ja) * 1983-01-21 1994-05-02 シチズン時計株式会社 マトリクス型表示装置の駆動回路
JPS6083477A (ja) * 1983-10-13 1985-05-11 Sharp Corp 液昇表示装置の駆動回路
KR900005489B1 (ko) * 1984-04-26 1990-07-30 마쯔시다덴기산교 가부시기가이샤 액정표시장치의 구동회로
JPS61163324A (ja) * 1985-01-14 1986-07-24 Canon Inc 液晶セルの駆動方法
JPS6249399A (ja) * 1985-08-29 1987-03-04 キヤノン株式会社 表示装置
US4836656A (en) * 1985-12-25 1989-06-06 Canon Kabushiki Kaisha Driving method for optical modulation device
GB2204174B (en) * 1987-04-23 1991-03-13 Seiko Instr Inc Electro-optical modulator
JPH0750389B2 (ja) * 1987-06-04 1995-05-31 セイコーエプソン株式会社 液晶パネルの駆動回路

Also Published As

Publication number Publication date
US5319381A (en) 1994-06-07
FR2656757B1 (fr) 1992-03-20
DE69025736D1 (de) 1996-04-11
EP0435750A1 (fr) 1991-07-03
JPH04136893A (ja) 1992-05-11
JP3034612B2 (ja) 2000-04-17
FR2656757A1 (fr) 1991-07-05
ATE135129T1 (de) 1996-03-15

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