EP0435750B1 - Addressing method for every column of a matrix LCD screen - Google Patents

Addressing method for every column of a matrix LCD screen Download PDF

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Publication number
EP0435750B1
EP0435750B1 EP90403695A EP90403695A EP0435750B1 EP 0435750 B1 EP0435750 B1 EP 0435750B1 EP 90403695 A EP90403695 A EP 90403695A EP 90403695 A EP90403695 A EP 90403695A EP 0435750 B1 EP0435750 B1 EP 0435750B1
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EP
European Patent Office
Prior art keywords
period
voltage
column
ramp
video signal
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Expired - Lifetime
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EP90403695A
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German (de)
French (fr)
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EP0435750A1 (en
Inventor
Bruno Mourey
Eric Benoit
Antoine Dupont
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Technicolor SA
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Thomson Multimedia SA
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2011Display of intermediate tones by amplitude modulation
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3648Control of matrices with row and column drivers using an active matrix
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3685Details of drivers for data electrodes
    • G09G3/3688Details of drivers for data electrodes suitable for active matrices only
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243Details of the generation of driving signals
    • G09G2310/0259Details of the generation of driving signals with use of an analog or digital ramp generator in the column driver or in the pixel circuit
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0204Compensation of DC component across the pixels in flat panels
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3614Control of polarity reversal in general

Definitions

  • the present invention relates to the control of the columns of a matrix type LCD screen, more particularly a method of addressing each column of a matrix type LCD screen and in particular of an active matrix LCD screen.
  • a matrix type LCD screen comprises a set of bus-lines and bus-columns which controls the voltage applied to electrodes located on the same side of a liquid crystal layer, the other side being occupied by a counter electrode which cooperates with the first electrode to electrically orient the molecules of the liquid crystal and achieve the modulation of a light beam by polarization rotation.
  • the columns are controlled by supplying each column with a charge current of the capacity produced between the column conductor and the counter-electrode such that the electric voltage across this capacity represents a sample of video signal between two successive addresses.
  • An example of a control circuit for an active matrix LCD screen is described in particular in European application EP-A-0 298 255.
  • a control circuit of a column comprising a voltage-duration converter 1 which receives on one of its inputs the sample E of video signal and on its other input a voltage ramp from a generator of ramps 2.
  • This converter outputs a pulse I whose duration t reflects the amplitude of the input video signal sample.
  • This pulse I is sent to the gate g of a driving effect transistor 3 having a field effect, one of the electrodes or drain d of which, in the embodiment shown, receives a voltage ramp from generator 2 and whose l The other electrode or source is connected to the column bus in question.
  • the pulse I obtained at the output of converter 1 does not have a falling edge with a steep slope.
  • the blocking of transistor 3 occurs at a time which depends on the value of the conduction threshold. Consequently, the charging voltage of the capacity changes with the displacement of the threshold.
  • the conduction threshold shifts due to the electrical stress or constraint undergone by the field effect transistor 3 which is used to switch the column.
  • This stress can be defined as the product of the gate-source voltage by the time during which the voltage is applied.
  • this stress is a function of the value of the input signal and therefore of the video signal since the duration of the pulse is a function of the video signal.
  • FIG. 2 shows the pulse I, the voltage ramp and the column voltages V1 and V2 obtained.
  • threshold voltages T1 and T2 respectively with threshold voltages T1 and T2. It can be seen that the rise in the threshold voltage of the transistor tends to reduce the column voltage Vsg. Thus, it can be seen that a low value of the video signal sample generates a gate-source voltage stress lower than the stress generated by a high value of the video signal sample, as shown diagrammatically by A and B on FIG. 3. In the first case, the offset of the threshold voltage will therefore be lower. This therefore results in a non-uniform shift of the threshold voltages of the various column switching transistors, resulting in non-uniformity of luminance on the LCD screen.
  • the object of the present invention is therefore to remedy this drawback by proposing a method for addressing each column which prevents the switching threshold of the transistor from changing with the video signal samples.
  • the present invention also aims to propose a method for addressing each column which makes it possible to create conditions such that the gate-source stress of the transistor is on average independent of the video signal sample applied to the column.
  • the subject of the present invention is a method of addressing each column of a matrix type LCD screen comprising the periodic production of pulses of period T as a function of the video signal to be displayed on the screen, the pulses controlling a drive transistor of said column and having a duration determined by the amplitude of the sample video signal at input, each pulse acting on the conduction state of said transistor to connect said column to a supply terminal where develop voltage ramps of period T, characterized in that the pulses are alternated periodically so that the sum of the durations of two alternating pulses corresponds to said period T of the pulses, and characterized in that so that a given amplitude of the video signal sample produces the same optical effect from one period to the next, is applied to said column either, in the case where the voltage applied to the liquid crystal counter electrode is not alternated from period T to period T, for all consecutive pairs of periods, a first of the voltage ramps followed by a second of the said voltage ramps offset with respect to the first ramp by a value at least equal to its maximum amplitude, that
  • the video signal before the production of the pulses, is periodically inverted so as to obtain, during a first period a pulse of duration t and during a second period a pulse of duration Tt, T being the duration of the period.
  • the voltage ramp is offset symmetrically at each period with respect to the fixed voltage so as to apply a ramp varying between V and V 'during a first period and a ramp varying between -V 'and -V during a second period.
  • a DC offset voltage is applied to the counter electrode compensating for the average offset of the threshold voltages of the switching transistors.
  • the present invention also relates to an LCD screen for implementing the method described above.
  • FIG. 4 shows an active matrix LCD screen. This screen has been represented diagrammatically by a single point or pixel P at the intersection of a column bus cl and a line bus L.
  • the coupling line L-column cl is produced by a transistor T in thin film (TFT) which receives on its grid the voltage applied to the line L and on an electrode the voltage applied to the column, the other electrode being connected to the liquid crystal electrode forming with the CE counter electrode the capacity C.
  • the liquid crystal is therefore equivalent to a capacity C with a resistance not shown.
  • the CE counter-electrode receives an alternating voltage from a rectangular voltage generator 4. As shown in FIG.
  • the CE counter-electrode voltage alternately goes to a level of, for example 5 Volts during a first period then at a level of, for example, 0 Volts during a second period.
  • the column control circuit comprises, like the column control circuit of FIG. 1, a voltage-duration converter 1 which receives as input a sample of video signal and on another input of a ramp from a ramp generator 2.
  • the video signal sample E comes from a circuit 5 complementing the video signal.
  • the circuit 5 is controlled by the rectangular voltage generator 4 so as to apply for a first period the video signal itself and for a second period the complement of the video signal.
  • a pulse I is obtained whose duration is a function of the amplitude of the video signal, namely a pulse I having, for example, a duration t during the first period and a duration Tt during the second period, T representing the duration of the period, namely preferably a frame duration. More generally, the alternation of the two pulse durations is equal to a predetermined sum.
  • the pulse I when the pulse I has a duration t, one obtains on the source s of the transistor 3 a voltage V ′ as represented in FIG. 5.
  • the voltage across the terminals of the cell of liquid crystal is equal to (5 Volts - V ′) in the embodiment shown and corresponds to a high voltage allowing for example the display of black.
  • the pulse I has a duration T-t and corresponds to a voltage V on the source.
  • the voltage across the terminals of the liquid crystal cell becomes equal to 0-V, this voltage is also a high voltage corresponding to the display of black.
  • the threshold voltages of the control transistors of the different lines undergo an offset so that the voltages corresponding to white and black respectively are no longer V and V ′ but in general V-DV and V′-DV.
  • an offset voltage of the same level is applied to the counter-electrode.
  • this compensation can also be carried out at other places, in particular by decoding the ramp or at the level of the video signal itself.
  • FIG. 6 an embodiment of the addressing method according to the present invention in the case where the CE counter-electrode receives a fixed voltage, for example a voltage of 0 Volt.
  • the ramp applied to one of the electrodes of the switching transistor 3 is offset in voltage at each period.
  • a ramp varying for example, between 0 and 5 Volts during a first period
  • a ramp varying between -5 Volts and 0 Volt during a second period as shown in FIG. 5 which relates to an example of coding with a black dot.
  • the pulse applied to the gate of the transistor 3 has a duration t0 which corresponds to maximum stress.
  • the voltage across the pixel P is therefore equal to 5 Volts (maximum value of the ramp) -0 Volt (voltage applied to the counter-electrode), or 5 Volts which corresponds to a minimum luminance of the point.
  • the pulse applied to the gate of transistor 3 has a duration T-to corresponding to minimal stress.
  • the voltage across the pixel is equal to - 5 Volts (minimum value of the ramp) - 0 Volt (value of the counter-electrode voltage) or - 5 Volts.
  • the luminance of the point is still minimal in this case.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal (AREA)

Abstract

The present invention relates to an addressing method for every column (cl) of a matrix LCD screen comprising production of a control pulse by a transistor (3) driving the said column, the said pulse having a duration determined by the value of the sample of a video input signal, the said pulse acting on the conduction state of the said transistor in order to connect the said column to a supply terminal where a voltage ramp (2) is developed. In accordance with the method, two pulse durations are alternated, whose sum is predetermined and so that a given value of the sample of a video signal produces the same optical effect from one period to the next, differentiated excitation voltages are employed on at least one of the framing electrodes of the liquid crystal layer, namely the said column (cl) and its counter-electrode (CE). Application especially to active matrix LCD screens.

Description

La présente invention concerne la commande des colonnes d'un écran LCD de type matriciel, plus particulièrement un procédé d'adressage de chaque colonne d'un écran LCD de type matriciel et notamment d'un écran LCD à matrice active.The present invention relates to the control of the columns of a matrix type LCD screen, more particularly a method of addressing each column of a matrix type LCD screen and in particular of an active matrix LCD screen.

Un écran LCD de type matriciel comporte un ensemble de bus-lignes et de bus-colonnes qui contrôle la tension appliquée à des électrodes situées d'un même côté d'une couche de cristal liquide, l'autre côté étant occupé par une contre-électrode qui coopère avec la première électrode pour orienter électriquement les molécules du cristal liquide et réaliser la modulation d'un faisceau lumineux par rotation de polarisation. La commande des colonnes est réalisée en fournissant à chaque colonne un courant de charge de la capacité réalisée entre le conducteur de colonne et la contre-électrode telle que la tension électrique aux bornes de cette capacité représente un échantillon de signal vidéo entre deux adressages successifs. Un exemple de circuit de commande d'un écran LCD à matrice active est décrit notamment dans la demande européenne EP-A-0 298 255.A matrix type LCD screen comprises a set of bus-lines and bus-columns which controls the voltage applied to electrodes located on the same side of a liquid crystal layer, the other side being occupied by a counter electrode which cooperates with the first electrode to electrically orient the molecules of the liquid crystal and achieve the modulation of a light beam by polarization rotation. The columns are controlled by supplying each column with a charge current of the capacity produced between the column conductor and the counter-electrode such that the electric voltage across this capacity represents a sample of video signal between two successive addresses. An example of a control circuit for an active matrix LCD screen is described in particular in European application EP-A-0 298 255.

D'autre part, pour obtenir ce courant de charge fonction du signal vidéo, on a proposé notamment dans le cas où les circuits de commande sont intégrés à l'écran LCD, d'utiliser un transistor d'attaque de colonne dont la grille reçoit une impulsion de commande fonction de l'échantillon de signal vidéo. Pour illustrer ce cas, on a représenté sur la figure 1 le schéma de principe d'une commande connue pour un écran LCD à matrice active symbolisé par une colonne cl, une ligne L, un point P, la contre-électrode CE et un transistor en film mince de sélection de ligne.On the other hand, to obtain this charge current as a function of the video signal, it has been proposed in particular in the case where the control circuits are integrated into the LCD screen, to use a column driver transistor whose gate receives a control pulse based on the video signal sample. To illustrate this case, there is shown in Figure 1 the block diagram of a known control for an active matrix LCD screen symbolized by a column cl, a line L, a point P, the counter electrode CE and a transistor in thin line selection film.

De manière plus spécifique, on a proposé, comme représenté sur la figure 1, d'utiliser un circuit de commande d'une colonne comportant un convertisseur tension-durée 1 qui reçoit sur une de ses entrées l'échantillon E de signal vidéo et sur son autre entrée une rampe de tension issue d'un générateur de rampes 2. Ce convertisseur délivre en sortie une impulsion I dont la durée t traduit l'amplitude de l'échantillon de signal vidéo en entrée. Cette impulsion I est envoyée sur la grille g d'un transistor d'attaque 3 à effet de champ dont l'une des électrodes ou drain d, dans le mode de réalisation représenté, reçoit une rampe de tension issue du générateur 2 et dont l'autre électrode ou source s est connectée au bus de colonne considéré. Avec le circuit décrit ci-dessus, tant que la tension Vgs du transistor 3 reste supérieure à sa tension de seuil Vt, le signal sur la source s suit donc l'évolution de la rampe de tension appliquée sur le drain d et la capacité C qui représente la capacité équivalente de la colonne, à savoir la capacité cristal-liquide, les capacités parasites des transistors de commande du point P et la capacité de croisement des bus, se charge. Dès que la tension Vgs devient inférieure à la tension de seuil Vt, le transistor 3 se bloque et le signal sur la colonne garde pour valeur la valeur de la tension chargée dans la capacité C. On obtient donc sur chaque colonne cl, une tension, par exemple, proportionnelle à la largeur de l'impulsion I de commande du transistor 3More specifically, it has been proposed, as shown in FIG. 1, to use a control circuit of a column comprising a voltage-duration converter 1 which receives on one of its inputs the sample E of video signal and on its other input a voltage ramp from a generator of ramps 2. This converter outputs a pulse I whose duration t reflects the amplitude of the input video signal sample. This pulse I is sent to the gate g of a driving effect transistor 3 having a field effect, one of the electrodes or drain d of which, in the embodiment shown, receives a voltage ramp from generator 2 and whose l The other electrode or source is connected to the column bus in question. With the circuit described above, as long as the voltage Vgs of transistor 3 remains greater than its threshold voltage Vt, the signal on the source s therefore follows the evolution of the voltage ramp applied to the drain d and the capacitance C which represents the equivalent capacity of the column, namely the liquid-crystal capacity, the parasitic capacities of the point P control transistors and the bus crossing capacity, is charged. As soon as the voltage Vgs becomes lower than the threshold voltage Vt, the transistor 3 is blocked and the signal on the column keeps for value the value of the voltage charged in the capacitor C. We therefore obtain on each column cl, a voltage, for example, proportional to the width of the control pulse I of transistor 3

Dans ce circuit, l'impulsion I obtenue en sortie du convertisseur 1 ne présente pas un front descendant à pente raide. Il en résulte que le blocage du transistor 3 se produit à un instant qui dépend de la valeur du seuil de conduction. En conséquence, la tension de charge de la capacité change avec le déplacement du seuil. En effet, le seuil de conduction se décale du fait du stress ou contrainte électrique subit par le transistor à effet de champ 3 qui sert à commuter la colonne. Ce stress peut être défini comme le produit de la tension grille-source par la durée pendant laquelle la tension est appliquée. Ainsi, ce stress est fonction de la valeur du signal en entrée et donc du signal vidéo puisque la durée de l'impulsion est fonction du signal vidéo. Pour illustrer ce problème, on a représenté sur la figure 2, l'impulsion I, la rampe de tension et les tensions de colonne V1 et V2 obtenues respectivement avec des tensions de seuil T1 et T2. On voit que l'élévation de la tension de seuil du transistor tend à réduire la tension de colonne Vsg. Ainsi, on peut constater qu'une valeur basse de l'échantillon de signal vidéo, engendre un stress de tension grille-source inférieur au stress engendré par une valeur haute de l'échantillon de signal vidéo, comme représenté schématiquement par A et B sur la figure 3. Dans le premier cas, le décalage de la tension de seuil sera donc inférieur. Il en résulte donc un décalage non uniforme des tensions de seuil des différents transistors de commutation de colonne entraînant une non-uniformité de luminance sur l'écran LCD.In this circuit, the pulse I obtained at the output of converter 1 does not have a falling edge with a steep slope. As a result, the blocking of transistor 3 occurs at a time which depends on the value of the conduction threshold. Consequently, the charging voltage of the capacity changes with the displacement of the threshold. Indeed, the conduction threshold shifts due to the electrical stress or constraint undergone by the field effect transistor 3 which is used to switch the column. This stress can be defined as the product of the gate-source voltage by the time during which the voltage is applied. Thus, this stress is a function of the value of the input signal and therefore of the video signal since the duration of the pulse is a function of the video signal. To illustrate this problem, FIG. 2 shows the pulse I, the voltage ramp and the column voltages V1 and V2 obtained. respectively with threshold voltages T1 and T2. It can be seen that the rise in the threshold voltage of the transistor tends to reduce the column voltage Vsg. Thus, it can be seen that a low value of the video signal sample generates a gate-source voltage stress lower than the stress generated by a high value of the video signal sample, as shown diagrammatically by A and B on FIG. 3. In the first case, the offset of the threshold voltage will therefore be lower. This therefore results in a non-uniform shift of the threshold voltages of the various column switching transistors, resulting in non-uniformity of luminance on the LCD screen.

La présente invention a donc pour but de remédier à cet inconvénient en proposant un procédé d'adressage de chaque colonne qui évite que le seuil de commutation du transistor ne change avec les échantillons de signal vidéo.The object of the present invention is therefore to remedy this drawback by proposing a method for addressing each column which prevents the switching threshold of the transistor from changing with the video signal samples.

La présente invention a aussi pour but de proposer un procédé d'adressage de chaque colonne qui permette de créer des conditions telles que le stress grille-source du transistor soit en moyenne indépendant de l'échantillon de signal vidéo appliqué sur la colonne.The present invention also aims to propose a method for addressing each column which makes it possible to create conditions such that the gate-source stress of the transistor is on average independent of the video signal sample applied to the column.

En conséquence, la présente invention a pour objet un procédé d'adressage de chaque colonne d'un écran LCD de type matriciel comprenant la production périodique d'impulsions de période T en fonction du signal vidéo à afficher sur l'écran, les impulsions commandant un transistor d'attaque de ladite colonne et ayant une durée déterminée par l'amplitude de l'échantillon de signal vidéo en entrée, chaque impulsion agissant sur l'état de conduction dudit transistor pour relier ladite colonne à une borne d'alimentation où se développent des rampes de tension de période T, caractérisé en ce que les impulsions sont alternées périodiquement de telle sorte que la somme des durées de deux impulsions alternées correspond à ladite période T des impulsions, et caractérisé en ce qu'afin qu'une amplitude donnée de l'échantillon de signal vidéo produise le même effet optique d'une période à la suivante, on applique sur ladite colonne soit, dans le cas où la tension appliquée sur la contre-électrode du crystal liquide n'est pas alternée de période T à période T, pour toutes les paires consécutives de périodes, une première dedistes rampes de tension suivie d'une seconde desdites rampes de tension décalée par rapport à la première rampe d'une valeur au moins égale à l'amplitude maximale de celle-ci, soit, dans le cas où la tension appliquée sur la contre électrode est alternée de période T à période T une rampe de tension identique de période T à période T.Consequently, the subject of the present invention is a method of addressing each column of a matrix type LCD screen comprising the periodic production of pulses of period T as a function of the video signal to be displayed on the screen, the pulses controlling a drive transistor of said column and having a duration determined by the amplitude of the sample video signal at input, each pulse acting on the conduction state of said transistor to connect said column to a supply terminal where develop voltage ramps of period T, characterized in that the pulses are alternated periodically so that the sum of the durations of two alternating pulses corresponds to said period T of the pulses, and characterized in that so that a given amplitude of the video signal sample produces the same optical effect from one period to the next, is applied to said column either, in the case where the voltage applied to the liquid crystal counter electrode is not alternated from period T to period T, for all consecutive pairs of periods, a first of the voltage ramps followed by a second of the said voltage ramps offset with respect to the first ramp by a value at least equal to its maximum amplitude, that is, in the case where the voltage applied to the counter electrode is alternated from period T to period T, an identical voltage ramp from period T to period T.

Selon un mode de réalisation particulier, avant la production des impulsions, l'on inverse périodiquement le signal vidéo de manière à obtenir, pendant une première période une impulsion de durée t et pendant une deuxième période une impulsion de durée T-t, T étant la durée de la période.According to a particular embodiment, before the production of the pulses, the video signal is periodically inverted so as to obtain, during a first period a pulse of duration t and during a second period a pulse of duration Tt, T being the duration of the period.

D'autre part, lorsqu'une tension alternative est appliquée périodiquement sur la contre électrode, la même rampe de tension est appliquée à chaque période.On the other hand, when an alternating voltage is applied periodically to the counter electrode, the same voltage ramp is applied to each period.

Toutefois, lorsqu'une tension fixe est appliquée sur la contre-électrode, la rampe de tension est décalée symétriquement à chaque période par rapport à la tension fixe de manière à appliquer une rampe variant entre V et V' pendant une première période et une rampe variant entre -V' et -V pendant une deuxième période.However, when a fixed voltage is applied to the counter electrode, the voltage ramp is offset symmetrically at each period with respect to the fixed voltage so as to apply a ramp varying between V and V 'during a first period and a ramp varying between -V 'and -V during a second period.

Avec ce procédé, la valeur moyenne des stress grille-source est constante. Ainsi, le décalage des tensions de seuil des transistors commandant les colonnes est aussi constant, ce qui entraîne une dégradation visuelle uniforme.With this process, the average value of grid-source stresses is constant. Thus, the offset of the threshold voltages of the transistors controlling the columns is also constant, which leads to uniform visual degradation.

Toutefois, pour pallier à ce décalage constant des tensions sur les colonnes par rapport à la normale, selon une autre caractéristique de la présente invention, l'on applique sur la contre électrode une tension continue de décalage compensant le décalage moyen des tensions de seuil des transistors de commutation.However, to compensate for this constant offset of the voltages on the columns with respect to normal, according to another characteristic of the present invention, a DC offset voltage is applied to the counter electrode compensating for the average offset of the threshold voltages of the switching transistors.

La présente invention a aussi pour objet un écran LCD pour la mise en oeuvre du procédé décrit ci-dessus.The present invention also relates to an LCD screen for implementing the method described above.

D'autres caractéristiques et avantages de la présente inention apparaîtront à la lecture de la description faite ci-après de différents modes de réalisation, cette description étant faite avec référence aux dessins ci-annexés dans lesquels :

  • la figure 1 déjà décrite est un schéma synoptique d'un circuit de commande d'une colonne d'un écran LCD à matrice active selon l'art antérieur ;
  • la figure 2 est une courbe donnant la tension en fonction du temps expliquant les problèmes dûs au stress du transistor de commutation dans le circuit de la figure 1 ;
  • la figure 3 représente deux courbes schématiques montrant le stress en fonction de la tension de l'échantillon vidéo ;
  • la figure 4 est un schéma synoptique d'un circuit de commande pour la mise en oeuvre du procédé de la présente invention dans le cas où une tension alternative est appliquée sur la contre-électrode ;
  • la figure 5 est un diagramme des temps expliquant le fonctionnement de la présente invention, et
  • la figure 6 est un schéma simplifié expliquant le fonctionnement de la présente invention dans le cas d'un écran LCD à matrice active dont la contre-électrode est à un potentiel fixe.
Other characteristics and advantages of the present invention will appear on reading the description given below of various embodiments, this description being made with reference to the attached drawings in which:
  • Figure 1 already described is a block diagram of a control circuit of a column of an active matrix LCD screen according to the prior art;
  • Figure 2 is a curve giving the voltage as a function of time explaining the problems due to stress of the transistor switching in the circuit of FIG. 1;
  • FIG. 3 represents two schematic curves showing stress as a function of the voltage of the video sample;
  • Figure 4 is a block diagram of a control circuit for implementing the method of the present invention in the case where an AC voltage is applied to the counter electrode;
  • FIG. 5 is a time diagram explaining the operation of the present invention, and
  • Figure 6 is a simplified diagram explaining the operation of the present invention in the case of an active matrix LCD screen whose counter electrode is at a fixed potential.

Pour simplifier la description, dans les figures les mêmes éléments portent les mêmes références.To simplify the description, in the figures the same elements have the same references.

On a représenté sur la figure 4 un écran LCD à matrice active. Cet écran a été représenté schématiquement par un seul point ou pixel P au croisement d'un bus de colonne cl et d'un bus ligne L. Dans le mode de réalisation représenté, le couplage ligne L-colonne cl est réalisé par un transistor T en film mince (TFT) qui reçoit sur sa grille la tension appliquée sur la ligne L et sur une électrode la tension appliquée sur la colonne, l'autre électrode étant connectée à l'électrode du cristal liquide formant avec la contre-électrode CE la capacité C. Le cristal-liquide est donc équivalent à une capacité C avec une résistance non représentée. Dans le mode de réalisation de la figure 4, la contre-électrode CE reçoit une tension alternative issue d'un générateur de tension rectangulaire 4. Comme représenté sur la figure 5, la tension de contre-électrode CE passe alternativement à un niveau de, par exemple 5 Volts pendant une première période puis à un niveau de, par exemple, 0 Volt pendant une deuxième période. D'autre part, le circuit de commande de colonne comporte, comme le circuit de commande de colonne de la figure 1, un convertisseur tension-durée 1 qui reçoit en entrée un échantillon de signal vidéo et sur une autre entrée une rampe issue d'un générateur de rampe 2. Conformément à la présente invention, l'échantillon de signal vidéo E est issu d'un circuit 5 complémentant le signal vidéo. Le circuit 5 est commandé par le générateur de tension rectangulaire 4 de manière à appliquer pendant une première période le signal vidéo lui-même et pendant une deuxième période le complément du signal vidéo. Ainsi, en sortie du convertisseur tension-durée 1, on obtient une impulsion I dont la durée est fonction de l'amplitude du signal vidéo, à savoir une impulsion I présentant, par exemple, une durée t pendant la première période et une durée T-t pendant la deuxième période, T représentant la durée de la période, à savoir de préférence une durée trame. De manière plus générale, l'alternance des deux durées d'impulsion est égale à une somme prédéterminée.FIG. 4 shows an active matrix LCD screen. This screen has been represented diagrammatically by a single point or pixel P at the intersection of a column bus cl and a line bus L. In the embodiment shown, the coupling line L-column cl is produced by a transistor T in thin film (TFT) which receives on its grid the voltage applied to the line L and on an electrode the voltage applied to the column, the other electrode being connected to the liquid crystal electrode forming with the CE counter electrode the capacity C. The liquid crystal is therefore equivalent to a capacity C with a resistance not shown. In the embodiment of FIG. 4, the CE counter-electrode receives an alternating voltage from a rectangular voltage generator 4. As shown in FIG. 5, the CE counter-electrode voltage alternately goes to a level of, for example 5 Volts during a first period then at a level of, for example, 0 Volts during a second period. On the other hand, the column control circuit comprises, like the column control circuit of FIG. 1, a voltage-duration converter 1 which receives as input a sample of video signal and on another input of a ramp from a ramp generator 2. According to the present invention, the video signal sample E comes from a circuit 5 complementing the video signal. The circuit 5 is controlled by the rectangular voltage generator 4 so as to apply for a first period the video signal itself and for a second period the complement of the video signal. Thus, at the output of the voltage-duration converter 1, a pulse I is obtained whose duration is a function of the amplitude of the video signal, namely a pulse I having, for example, a duration t during the first period and a duration Tt during the second period, T representing the duration of the period, namely preferably a frame duration. More generally, the alternation of the two pulse durations is equal to a predetermined sum.

Avec le circuit ci-dessus, lorsque l'impulsion I a une durée t, l'on obtient sur la source s du transistor 3 une tension V′ telle que représentée sur la figure 5. Dans ce cas la tension aux bornes de la cellule de cristal liquide est égale à (5 Volts - V′) dans le mode de réalisation représenté et correspond à une tension importante permettant par exemple l'affichage du noir. Lors de la deuxième période, l'impulsion I a une durée T-t et correspond à une tension V sur la source. Dans ce cas, la tension aux bornes de la cellule de cristal liquide devient égale à 0-V, cette tension est aussi une tension importante correspondant à l'affichage du noir. Comme représenté sur la figure 5, la tension rectangulaire entre 0 et 5V ainsi que les tensions V et V′ sont choisies de telle sorte que (5-V′) = (V-0). On applique donc une tension moyenne nulle aux bornes de la cellule de cristal liquide. Les mêmes conclusions seraient obtenues pour l'affichage des blancs ou des gris.With the above circuit, when the pulse I has a duration t, one obtains on the source s of the transistor 3 a voltage V ′ as represented in FIG. 5. In this case the voltage across the terminals of the cell of liquid crystal is equal to (5 Volts - V ′) in the embodiment shown and corresponds to a high voltage allowing for example the display of black. During the second period, the pulse I has a duration T-t and corresponds to a voltage V on the source. In this case, the voltage across the terminals of the liquid crystal cell becomes equal to 0-V, this voltage is also a high voltage corresponding to the display of black. As shown in Figure 5, the rectangular voltage between 0 and 5V and the voltages V and V ′ are chosen so that (5-V ′) = (V-0). A zero mean voltage is therefore applied across the terminals of the liquid crystal cell. The same conclusions would be obtained for the display of whites or grays.

En pratique, les tensions de seuil des transistors de commande des différentes lignes subissent un décalage de telle sorte que les tensions correspondant respectivement au blanc et au noir ne sont plus V et V′ mais en général V-DV et V′-DV. Pour remédier à ces décalages des tensions au niveau du point, conformément à la présente invention, on applique une tension de décalage de même niveau sur la contre-électrode. Toutefois, cette compensation peut aussi être réalisée à d'autres endroits, notamment en décodant la rampe ou au niveau du signal vidéo lui-même.In practice, the threshold voltages of the control transistors of the different lines undergo an offset so that the voltages corresponding to white and black respectively are no longer V and V ′ but in general V-DV and V′-DV. To remedy these shifts in voltages at the point, in accordance with the present invention, an offset voltage of the same level is applied to the counter-electrode. However, this compensation can also be carried out at other places, in particular by decoding the ramp or at the level of the video signal itself.

On décrira maintenant avec référence à la figure 6, un mode de réalisation du procédé d'adressage conforme à la présente invention dans le cas où la contre-électrode CE reçoit une tension fixe, par exemple une tension de 0 Volt. Conformément à la présente invention, dans ce cas, non seulement le signal vidéo E est alternativement transmis ou complémenté à chaque période, mais la rampe appliquée sur une des électrodes du transistor de commutation 3 est décalée en tension à chaque période. Ainsi, on applique soit une rampe variant, par exemple, entre 0 et 5 Volts pendant une première période, soit une rampe variant entre -5 Volts et 0 Volt pendant une deuxième période, comme représenté sur la figure 5 qui concerne un exemple de codage d'un point noir. Dans le mode de réalisation représenté, l'impulsion appliquée sur la grille du transistor 3 présente une durée to qui correspond à un stress maximal. La tension aux bornes du pixel P est donc égale à 5 Volts (valeur maximale de la rampe) -0 Volt (tension appliquée sur la contre-électrode), soit 5 Volts ce qui correspond à une luminance minimale du point. Pendant la deuxième période, l'impulsion appliquée sur la grille du transistor 3 a une durée T-to correspondant à un stress minimal. La tension aux bornes du pixel est égale à - 5 Volts (valeur minimale de la rampe) - 0 Volt (valeur de la tension de contre-électrode) soit - 5 Volts. La luminance du point est encore minimale dans ce cas. Ainsi, en adaptant les variations de tension de la rampe appliquée sur l'électrode du transistor 3, on peut uniformiser le stress appliqué à tous les transistors du circuit de commande en inversant le signal vidéo d'une période à une autre.A description will now be given with reference to FIG. 6, an embodiment of the addressing method according to the present invention in the case where the CE counter-electrode receives a fixed voltage, for example a voltage of 0 Volt. According to the present invention, in this case, not only the video signal E is alternately transmitted or supplemented at each period, but the ramp applied to one of the electrodes of the switching transistor 3 is offset in voltage at each period. Thus, one applies either a ramp varying, for example, between 0 and 5 Volts during a first period, or a ramp varying between -5 Volts and 0 Volt during a second period, as shown in FIG. 5 which relates to an example of coding with a black dot. In the embodiment shown, the pulse applied to the gate of the transistor 3 has a duration t0 which corresponds to maximum stress. The voltage across the pixel P is therefore equal to 5 Volts (maximum value of the ramp) -0 Volt (voltage applied to the counter-electrode), or 5 Volts which corresponds to a minimum luminance of the point. During the second period, the pulse applied to the gate of transistor 3 has a duration T-to corresponding to minimal stress. The voltage across the pixel is equal to - 5 Volts (minimum value of the ramp) - 0 Volt (value of the counter-electrode voltage) or - 5 Volts. The luminance of the point is still minimal in this case. Thus, by adapting the voltage variations of the ramp applied to the electrode of transistor 3, it is possible to standardize the stress applied to all the transistors of the control circuit by inverting the video signal from one period to another.

Claims (8)

  1. Method for addressing each column (cl) of a matrix type LCD panel comprising the periodic production of pulses (I) of period T depending on the video signal (E) to be displayed on the panel, the pulses (I) controlling a driver transistor (3) for the said column (cl) and having a duration (t) determined by the amplitude of the input video signal sample, each pulse (I) acting on the state of conduction of the said transistor (3) in order to connect the said column (cl) to a power supply terminal of which voltage ramps of period T develop, characterized in that the pulses (I) are periodically alternated in such a way that the sum of the durations (t, T-t) of two alternate pulses corresponds to the said period T of the pulses (I), and characterized in that so that a given amplitude of the video signal sample should produce the same optical effect from one period to the next, there is applied to the said column (cl) either, in the case where the voltage applied to the counter-electrode (CE) of the liquid crystal is not alternated from period T to period T, for all the consecutive pairs of periods, a first of the said voltage ramps followed by a second of the said voltage ramps, shifted with respect to the first ramp by a value equal to at least the maximum amplitude thereof, or, in the case where the voltage applied to the counterelectrode (CE) is alternated from period T to period T, a voltage ramp which is identical from period T to period T.
  2. Addressing method according to Claim 1, characterized in that before the production of pulses, the video signal is reversed periodically so as to obtain a pulse with a duration t during a first period and a pulse with a duration T-t during a second period, T being the duration of the period.
  3. Method according to Claim 1, characterized in that when an AC voltage is applied periodically to the counter-electrode (CE), the same voltage ramp is applied at each period.
  4. Method according to Claim 1, characterized in that when a fixed voltage is applied to the counterelectrode (CE), the voltage ramp is shifted symmetrically at each period in relation to the fixed voltage so that a ramp varying between V and V' is applied during a first period and a ramp varying between -V' and -V is applied during a second period.
  5. Method according to any one of Claims 1 to 4, characterized in that the period T corresponds to a frame.
  6. Method according to any one of Claims 1 to 5, characterized in that the LCD panel is an active matrix panel.
  7. Method according to any one of Claims 1 to 6, characterized in that a DC shift voltage, compensating for the mean shift in the threshold voltages of the switch-over transistors, is applied to the counterelectrode.
  8. LCD panel comprising addressing columns (cl) each associated with a transistor (3) for driving the said column so as to implement the method according to any one of Claims 1 to 7, the LCD panel including a column control circuit comprising a voltage-duration converter (1) and a ramp generator (2), the converter (1) receiving the video signal at one of its inputs and voltage ramps of period T coming from the ramp generator (2) at the other input, the converter (1) delivering, for each period T, a pulse (I) whose duration (t) is a function of the amplitude of a sample (E) of the video signal, this pulse being sent to the gate of the said transistor (3), one of the electrodes of which receives the said voltage ramps and the other electrode of which is linked to a column (cl) characterized in that it includes a circuit (5) for complementing the video signal connected at the input of the voltage-duration converter (1), this circuit being controlled by a square-wave voltage generator (4) which also controls the voltage applied to the counterelectrode in such a way that, in the case where the voltage applied to the counter-electrode (CE) of the liquid crystal is not alternated from period T to period T, for all the consecutive pairs of periods, a first of the said voltage ramps followed by a second of the said voltage ramps, shifted with respect to the first ramp by a value equal to at least the maximum amplitude thereof, are applied to the said electrode receiving the voltage ramp, or in the case where the voltage applied to the counter-electrode (CE) is alternated from period T to period T, a voltage ramp which is identical from period T to period T is applied to the said electrode receiving the voltage ramp.
EP90403695A 1989-12-28 1990-12-20 Addressing method for every column of a matrix LCD screen Expired - Lifetime EP0435750B1 (en)

Applications Claiming Priority (2)

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FR8917312A FR2656757B1 (en) 1989-12-28 1989-12-28 METHOD FOR ADDRESSING EACH COLUMN OF A MATRIX TYPE LCD SCREEN.
FR8917312 1989-12-28

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ATE135129T1 (en) 1996-03-15
FR2656757B1 (en) 1992-03-20
DE69025736D1 (en) 1996-04-11
FR2656757A1 (en) 1991-07-05
JP3034612B2 (en) 2000-04-17
EP0435750A1 (en) 1991-07-03
US5319381A (en) 1994-06-07

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