EP0385573A3 - Mesa fabrication in semiconductor structures - Google Patents

Mesa fabrication in semiconductor structures Download PDF

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Publication number
EP0385573A3
EP0385573A3 EP19900300742 EP90300742A EP0385573A3 EP 0385573 A3 EP0385573 A3 EP 0385573A3 EP 19900300742 EP19900300742 EP 19900300742 EP 90300742 A EP90300742 A EP 90300742A EP 0385573 A3 EP0385573 A3 EP 0385573A3
Authority
EP
European Patent Office
Prior art keywords
cycle
mesa
oxide
silicon
mesas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP19900300742
Other languages
German (de)
French (fr)
Other versions
EP0385573A2 (en
EP0385573B1 (en
Inventor
James L. Swindal
Daniel H. Grantham
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Breed Automotive Technology Inc
Original Assignee
United Technologies Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by United Technologies Corp filed Critical United Technologies Corp
Publication of EP0385573A2 publication Critical patent/EP0385573A2/en
Publication of EP0385573A3 publication Critical patent/EP0385573A3/en
Application granted granted Critical
Publication of EP0385573B1 publication Critical patent/EP0385573B1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/84Types of semiconductor device ; Multistep manufacturing processes therefor controllable by variation of applied mechanical force, e.g. of pressure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01LMEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
    • G01L9/00Measuring steady of quasi-steady pressure of fluid or fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means
    • G01L9/0041Transmitting or indicating the displacement of flexible diaphragms
    • G01L9/0042Constructional details associated with semiconductive diaphragm sensors, e.g. etching, or constructional details of non-semiconductive diaphragms
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01LMEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
    • G01L9/00Measuring steady of quasi-steady pressure of fluid or fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means
    • G01L9/0041Transmitting or indicating the displacement of flexible diaphragms
    • G01L9/0072Transmitting or indicating the displacement of flexible diaphragms using variations in capacitance
    • G01L9/0073Transmitting or indicating the displacement of flexible diaphragms using variations in capacitance using a semiconductive diaphragm
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/316Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/3165Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
    • H01L21/31654Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself
    • H01L21/31658Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe
    • H01L21/31662Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe of silicon in uncombined form
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/911Differential oxidation and etching
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/977Thinning or removal of substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Measuring Fluid Pressure (AREA)
  • Pressure Sensors (AREA)
  • Weting (AREA)

Abstract

Semiconductor structures for electronic use, such as for example a silicon-glass-silicon pressure sensor include mesa or pedestal structures extending up from silicon substrates. In the invention the mesa structures are fabricated in an oxidation process applied in a cyclical fashion.
Each cycle includes a photolithographic operation to protect the previously grown oxide on the mesas from etching. During each cycle less oxide is grown (or conversely silicon consumed) on the mesas than in the preceding cycle, while equivalent amounts of oxide are grown on non-mesa areas in each cycle. As a result, the tops of the mesas get higher and higher above the surrounding areas in each cycle. In order to prevent the leaving of any oxide "scraps" in a non-mesa area during the oxidation steps, resulting from a flaw in the mask, a double exposure process is used, utilizing two completely independent masks, with a positive working photo-resist.
EP90300742A 1989-02-28 1990-01-24 Mesa fabrication in semiconductor structures Expired - Lifetime EP0385573B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/317,309 US4883768A (en) 1989-02-28 1989-02-28 Mesa fabrication in semiconductor structures
US317309 2002-12-11

Publications (3)

Publication Number Publication Date
EP0385573A2 EP0385573A2 (en) 1990-09-05
EP0385573A3 true EP0385573A3 (en) 1991-03-27
EP0385573B1 EP0385573B1 (en) 1996-07-17

Family

ID=23233089

Family Applications (1)

Application Number Title Priority Date Filing Date
EP90300742A Expired - Lifetime EP0385573B1 (en) 1989-02-28 1990-01-24 Mesa fabrication in semiconductor structures

Country Status (9)

Country Link
US (1) US4883768A (en)
EP (1) EP0385573B1 (en)
JP (1) JPH02271680A (en)
KR (1) KR0170371B1 (en)
AR (1) AR241974A1 (en)
BR (1) BR9000735A (en)
CA (1) CA2008788A1 (en)
DE (1) DE69027797D1 (en)
IL (1) IL93541A (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5444901A (en) * 1993-10-25 1995-08-29 United Technologies Corporation Method of manufacturing silicon pressure sensor having dual elements simultaneously mounted
US5440931A (en) * 1993-10-25 1995-08-15 United Technologies Corporation Reference element for high accuracy silicon capacitive pressure sensor
US5375034A (en) * 1993-12-02 1994-12-20 United Technologies Corporation Silicon capacitive pressure sensor having a glass dielectric deposited using ion milling
US5381299A (en) * 1994-01-28 1995-01-10 United Technologies Corporation Capacitive pressure sensor having a substrate with a curved mesa
US5448444A (en) * 1994-01-28 1995-09-05 United Technologies Corporation Capacitive pressure sensor having a reduced area dielectric spacer
US5567659A (en) * 1995-05-25 1996-10-22 Northern Telecom Limited Method of etching patterns in III-V material with accurate depth control
US5675164A (en) * 1995-06-07 1997-10-07 International Business Machines Corporation High performance multi-mesa field effect transistor
EP0984490A1 (en) 1998-08-13 2000-03-08 Siemens Aktiengesellschaft Process for the manufacture of structured material layers
US20200135898A1 (en) * 2018-10-30 2020-04-30 International Business Machines Corporation Hard mask replenishment for etching processes

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0075875A2 (en) * 1981-09-28 1983-04-06 General Electric Company Method of making integrated circuits comprising dielectric isolation regions
US4444605A (en) * 1982-08-27 1984-04-24 Texas Instruments Incorporated Planar field oxide for semiconductor devices
US4635344A (en) * 1984-08-20 1987-01-13 Texas Instruments Incorporated Method of low encroachment oxide isolation of a semiconductor device
US4764248A (en) * 1987-04-13 1988-08-16 Cypress Semiconductor Corporation Rapid thermal nitridized oxide locos process

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5362985A (en) * 1976-11-18 1978-06-05 Toshiba Corp Mis type field effect transistor and its production
JPS5846648A (en) * 1981-09-14 1983-03-18 Toshiba Corp Manufacture of semiconductor device
JPS59165434A (en) * 1983-03-11 1984-09-18 Toshiba Corp Manufacture of semiconductor device
JPS59186343A (en) * 1983-04-07 1984-10-23 Sony Corp Manufacture of semiconductor device
JPS60249334A (en) * 1984-05-25 1985-12-10 Hitachi Ltd Formation of thin film
JPH0621541A (en) * 1992-07-02 1994-01-28 Sumitomo Electric Ind Ltd Analog light transmitter

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0075875A2 (en) * 1981-09-28 1983-04-06 General Electric Company Method of making integrated circuits comprising dielectric isolation regions
US4444605A (en) * 1982-08-27 1984-04-24 Texas Instruments Incorporated Planar field oxide for semiconductor devices
US4635344A (en) * 1984-08-20 1987-01-13 Texas Instruments Incorporated Method of low encroachment oxide isolation of a semiconductor device
US4764248A (en) * 1987-04-13 1988-08-16 Cypress Semiconductor Corporation Rapid thermal nitridized oxide locos process

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 10, no. 113 (E-399)(2170) 26 April 1986, & JP-A-60 249334 (HITACHI SEISAKUSHO K.K.) 10 December 1985, *

Also Published As

Publication number Publication date
CA2008788A1 (en) 1990-08-31
DE69027797D1 (en) 1996-08-22
IL93541A (en) 1993-01-31
KR900013666A (en) 1990-09-06
IL93541A0 (en) 1990-11-29
US4883768A (en) 1989-11-28
AR241974A1 (en) 1993-01-29
EP0385573A2 (en) 1990-09-05
KR0170371B1 (en) 1999-02-01
JPH02271680A (en) 1990-11-06
BR9000735A (en) 1991-01-22
EP0385573B1 (en) 1996-07-17

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