EP0381470A2 - Speicherzugriffsausnahmenbehandlung neben vorauslesbaren Befehlswörtern in dem Befehlsfliessband eines Rechners mit virtuellen Speicher - Google Patents

Speicherzugriffsausnahmenbehandlung neben vorauslesbaren Befehlswörtern in dem Befehlsfliessband eines Rechners mit virtuellen Speicher Download PDF

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Publication number
EP0381470A2
EP0381470A2 EP90301002A EP90301002A EP0381470A2 EP 0381470 A2 EP0381470 A2 EP 0381470A2 EP 90301002 A EP90301002 A EP 90301002A EP 90301002 A EP90301002 A EP 90301002A EP 0381470 A2 EP0381470 A2 EP 0381470A2
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EP
European Patent Office
Prior art keywords
unit
memory
instruction
address
memory access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP90301002A
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English (en)
French (fr)
Other versions
EP0381470B1 (de
EP0381470A3 (de
Inventor
Ricky C. Hetherington
David A. Webb, Jr.
David B. Fite
Francis X. Mckeen
Mark A. Firstenberg
John E. Murray
Dwight P. Manley
Ronald M. Salett
Tryggve Fossum
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Digital Equipment Corp
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Publication of EP0381470A2 publication Critical patent/EP0381470A2/de
Publication of EP0381470A3 publication Critical patent/EP0381470A3/de
Application granted granted Critical
Publication of EP0381470B1 publication Critical patent/EP0381470B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G06F9/3865—Recovery, e.g. branch miss-prediction, exception handling using deferred exception handling, e.g. exception flags
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/073—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a memory management context, e.g. virtual memory or cache management
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0766—Error or fault reporting or storing
    • G06F11/0772—Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1045—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache
EP90301002A 1989-02-03 1990-01-31 Speicherzugriffsausnahmebehandlung bei vorausgelesenen Befehlswörtern in dem Befehlsfliessband eines Rechners mit virtuellem Speicher Expired - Lifetime EP0381470B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/306,866 US4985825A (en) 1989-02-03 1989-02-03 System for delaying processing of memory access exceptions until the execution stage of an instruction pipeline of a virtual memory system based digital computer
US306866 1989-02-03

Publications (3)

Publication Number Publication Date
EP0381470A2 true EP0381470A2 (de) 1990-08-08
EP0381470A3 EP0381470A3 (de) 1992-11-19
EP0381470B1 EP0381470B1 (de) 1997-09-17

Family

ID=23187213

Family Applications (1)

Application Number Title Priority Date Filing Date
EP90301002A Expired - Lifetime EP0381470B1 (de) 1989-02-03 1990-01-31 Speicherzugriffsausnahmebehandlung bei vorausgelesenen Befehlswörtern in dem Befehlsfliessband eines Rechners mit virtuellem Speicher

Country Status (7)

Country Link
US (1) US4985825A (de)
EP (1) EP0381470B1 (de)
JP (1) JPH02234248A (de)
AT (1) ATE158423T1 (de)
AU (1) AU631420B2 (de)
CA (1) CA1323701C (de)
DE (1) DE69031433T2 (de)

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Publication number Priority date Publication date Assignee Title
WO1993001544A1 (en) * 1991-07-04 1993-01-21 The Victoria University Of Manchester Condition detection in asynchronous pipelines
EP0766155A1 (de) * 1995-09-29 1997-04-02 Matsushita Electric Works, Ltd. Programmierbare Steuerung
EP1239427A3 (de) * 2001-02-21 2009-04-15 Nxp B.V. Schaltungsanordnung sowie Verfahren zum Erkennen einer Zugriffsverletzung bei einer Mikrokontrolleranordnung

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US5197133A (en) * 1988-12-19 1993-03-23 Bull Hn Information Systems Inc. Control store addressing from multiple sources
US5075844A (en) * 1989-05-24 1991-12-24 Tandem Computers Incorporated Paired instruction processor precise exception handling mechanism
US5329629A (en) * 1989-07-03 1994-07-12 Tandem Computers Incorporated Apparatus and method for reading, writing, and refreshing memory with direct virtual or physical access
JP2504235B2 (ja) * 1989-11-16 1996-06-05 三菱電機株式会社 デ―タ処理装置
JPH03185530A (ja) * 1989-12-14 1991-08-13 Mitsubishi Electric Corp データ処理装置
US5546551A (en) * 1990-02-14 1996-08-13 Intel Corporation Method and circuitry for saving and restoring status information in a pipelined computer
US5450564A (en) * 1990-05-04 1995-09-12 Unisys Corporation Method and apparatus for cache memory access with separate fetch and store queues
JP2570466B2 (ja) * 1990-05-18 1997-01-08 日本電気株式会社 情報処理装置
CA2045789A1 (en) * 1990-06-29 1991-12-30 Richard Lee Sites Granularity hint for translation buffer in high performance processor
US5251310A (en) * 1990-06-29 1993-10-05 Digital Equipment Corporation Method and apparatus for exchanging blocks of information between a cache memory and a main memory
US5539911A (en) 1991-07-08 1996-07-23 Seiko Epson Corporation High-performance, superscalar-based computer system with out-of-order instruction execution
US5961629A (en) * 1991-07-08 1999-10-05 Seiko Epson Corporation High performance, superscalar-based computer system with out-of-order instruction execution
US5493687A (en) * 1991-07-08 1996-02-20 Seiko Epson Corporation RISC microprocessor architecture implementing multiple typed register sets
US5438668A (en) 1992-03-31 1995-08-01 Seiko Epson Corporation System and method for extraction, alignment and decoding of CISC instructions into a nano-instruction bucket for execution by a RISC computer
EP0636256B1 (de) * 1992-03-31 1997-06-04 Seiko Epson Corporation Befehlsablauffolgeplanung von einem risc-superskalarprozessor
DE69308548T2 (de) 1992-05-01 1997-06-12 Seiko Epson Corp Vorrichtung und verfahren zum befehlsabschluss in einem superskalaren prozessor.
JPH0667980A (ja) * 1992-05-12 1994-03-11 Unisys Corp ４ブロックキャッシュメモリへのアクセスを最適化するためのキャッシュ論理システムおよびメインフレームコンピュータの高速キャッシュメモリへのアクセス時のダブルミスを防ぐ方法
JP3644959B2 (ja) 1992-09-29 2005-05-11 セイコーエプソン株式会社 マイクロプロセッサシステム
US6735685B1 (en) * 1992-09-29 2004-05-11 Seiko Epson Corporation System and method for handling load and/or store operations in a superscalar microprocessor
DE69330889T2 (de) 1992-12-31 2002-03-28 Seiko Epson Corp System und Verfahren zur Änderung der Namen von Registern
US5628021A (en) * 1992-12-31 1997-05-06 Seiko Epson Corporation System and method for assigning tags to control instruction processing in a superscalar processor
US5471598A (en) * 1993-10-18 1995-11-28 Cyrix Corporation Data dependency detection and handling in a microprocessor with write buffer
US5615402A (en) * 1993-10-18 1997-03-25 Cyrix Corporation Unified write buffer having information identifying whether the address belongs to a first write operand or a second write operand having an extra wide latch
US5740398A (en) * 1993-10-18 1998-04-14 Cyrix Corporation Program order sequencing of data in a microprocessor with write buffer
US6219773B1 (en) 1993-10-18 2001-04-17 Via-Cyrix, Inc. System and method of retiring misaligned write operands from a write buffer
US5630149A (en) * 1993-10-18 1997-05-13 Cyrix Corporation Pipelined processor with register renaming hardware to accommodate multiple size registers
GB2284493B (en) * 1993-12-01 1998-04-01 Intel Corp Exception handling in a processor that performs speculative out-of-order instruction execution
DE4434895C2 (de) * 1993-12-23 1998-12-24 Hewlett Packard Co Verfahren und Vorrichtung zur Behandlung von Ausnahmebedingungen
US5555399A (en) * 1994-07-07 1996-09-10 International Business Machines Corporation Dynamic idle list size processing in a virtual memory management operating system
US5640526A (en) * 1994-12-21 1997-06-17 International Business Machines Corporation Superscaler instruction pipeline having boundary indentification logic for variable length instructions
US6643765B1 (en) 1995-08-16 2003-11-04 Microunity Systems Engineering, Inc. Programmable processor with group floating point operations
US6101590A (en) 1995-10-10 2000-08-08 Micro Unity Systems Engineering, Inc. Virtual memory system with local and global virtual address translation
US5778208A (en) * 1995-12-18 1998-07-07 International Business Machines Corporation Flexible pipeline for interlock removal
US5802573A (en) * 1996-02-26 1998-09-01 International Business Machines Corp. Method and system for detecting the issuance and completion of processor instructions
US6061773A (en) * 1996-05-03 2000-05-09 Digital Equipment Corporation Virtual memory system with page table space separating a private space and a shared space in a virtual memory
JP3849951B2 (ja) * 1997-02-27 2006-11-22 株式会社日立製作所 主記憶共有型マルチプロセッサ
US6219758B1 (en) * 1998-03-24 2001-04-17 International Business Machines Corporation False exception for cancelled delayed requests
US6233668B1 (en) 1999-10-27 2001-05-15 Compaq Computer Corporation Concurrent page tables
US6766440B1 (en) * 2000-02-18 2004-07-20 Texas Instruments Incorporated Microprocessor with conditional cross path stall to minimize CPU cycle time length
US7113902B2 (en) * 2000-03-02 2006-09-26 Texas Instruments Incorporated Data processing condition detector with table lookup
JP4522548B2 (ja) * 2000-03-10 2010-08-11 富士通フロンテック株式会社 アクセス監視装置及びアクセス監視方法
US7310800B2 (en) * 2001-02-28 2007-12-18 Safenet, Inc. Method and system for patching ROM code
US7684447B2 (en) * 2004-12-23 2010-03-23 Agilent Technologies, Inc. Sequencer and method for sequencing
US7752427B2 (en) * 2005-12-09 2010-07-06 Atmel Corporation Stack underflow debug with sticky base
US20080181210A1 (en) * 2007-01-31 2008-07-31 Finisar Corporation Processing register values in multi-process chip architectures
US9507725B2 (en) * 2012-12-28 2016-11-29 Intel Corporation Store forwarding for data caches
US20140189246A1 (en) * 2012-12-31 2014-07-03 Bin Xing Measuring applications loaded in secure enclaves at runtime
KR101978984B1 (ko) * 2013-05-14 2019-05-17 한국전자통신연구원 프로세서의 오류를 검출하는 장치 및 방법
US10061675B2 (en) * 2013-07-15 2018-08-28 Texas Instruments Incorporated Streaming engine with deferred exception reporting
US9311508B2 (en) * 2013-12-27 2016-04-12 Intel Corporation Processors, methods, systems, and instructions to change addresses of pages of secure enclaves
US9672354B2 (en) * 2014-08-18 2017-06-06 Bitdefender IPR Management Ltd. Systems and methods for exposing a result of a current processor instruction upon exiting a virtual machine
US20160085695A1 (en) 2014-09-24 2016-03-24 Intel Corporation Memory initialization in a protected region
US10528353B2 (en) 2016-05-24 2020-01-07 International Business Machines Corporation Generating a mask vector for determining a processor instruction address using an instruction tag in a multi-slice processor
US10248555B2 (en) 2016-05-31 2019-04-02 International Business Machines Corporation Managing an effective address table in a multi-slice processor
US10467008B2 (en) * 2016-05-31 2019-11-05 International Business Machines Corporation Identifying an effective address (EA) using an interrupt instruction tag (ITAG) in a multi-slice processor
US10747679B1 (en) * 2017-12-11 2020-08-18 Amazon Technologies, Inc. Indexing a memory region
US11860795B2 (en) * 2020-02-18 2024-01-02 Arm Limited Device, system, and method of determining memory requirements and tracking memory usage

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1993001544A1 (en) * 1991-07-04 1993-01-21 The Victoria University Of Manchester Condition detection in asynchronous pipelines
US5574925A (en) * 1991-07-04 1996-11-12 The Victoria University Of Manchester Asynchronous pipeline having condition detection among stages in the pipeline
EP0766155A1 (de) * 1995-09-29 1997-04-02 Matsushita Electric Works, Ltd. Programmierbare Steuerung
US5933651A (en) * 1995-09-29 1999-08-03 Matsushita Electric Works, Ltd. Programmable controller
EP1239427A3 (de) * 2001-02-21 2009-04-15 Nxp B.V. Schaltungsanordnung sowie Verfahren zum Erkennen einer Zugriffsverletzung bei einer Mikrokontrolleranordnung

Also Published As

Publication number Publication date
DE69031433T2 (de) 1998-04-16
ATE158423T1 (de) 1997-10-15
EP0381470B1 (de) 1997-09-17
JPH02234248A (ja) 1990-09-17
EP0381470A3 (de) 1992-11-19
AU631420B2 (en) 1992-11-26
CA1323701C (en) 1993-10-26
DE69031433D1 (de) 1997-10-23
AU5394390A (en) 1991-12-19
JPH0526219B2 (de) 1993-04-15
US4985825A (en) 1991-01-15

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