EP0349300A1 - Videosignalverarbeitungsgerät - Google Patents
Videosignalverarbeitungsgerät Download PDFInfo
- Publication number
- EP0349300A1 EP0349300A1 EP89306580A EP89306580A EP0349300A1 EP 0349300 A1 EP0349300 A1 EP 0349300A1 EP 89306580 A EP89306580 A EP 89306580A EP 89306580 A EP89306580 A EP 89306580A EP 0349300 A1 EP0349300 A1 EP 0349300A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- signal
- time
- video signal
- producing
- processing apparatus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
- H04N5/57—Control of contrast or brightness
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N11/00—Colour television systems
- H04N11/06—Transmission systems characterised by the manner in which the individual colour picture signal components are combined
- H04N11/08—Transmission systems characterised by the manner in which the individual colour picture signal components are combined using sequential signals only
Definitions
- This invention relates generally to a video signal processing apparatus and more particularly, the invention relates to a video signal processing apparatus for reproducing chrominance and color difference signals from a video signal including a time-compressed chrominance and color difference signals in one horizontal scanning line interval, their time-compressed factors being different each other.
- a video signal processing apparatus is used for reproducing chrominance and color difference signals from a time-division-multiplexed video signal including a time-compressed chrominance and color difference signals by time-expansion.
- a video signal is employed in MAC (Multiplexed Analog Components), TCI (Time Compressed Insertion) systems, and other systems using time-division-multiplexed video signal.
- FIG. 9 A prior art video processing circuit is shown in Fig. 9 of a block diagram.
- an input video signal "a” is applied to an input terminal 11 and is sent to a time-expansion circuit 12, a time-expansion circuit 14, and a signal generation circuit 17.
- the time-expansion circuit 12 expands a chrominance signal of the video signal "a” by an expansion ratio of three to reproduce a chrominance signal with respect to time base.
- the time-expansion circuit 14 expands a color difference signal of the video signal "a” by an expansion ratio of 3/2 to reproduce a color difference signal with respect to time base.
- the present invention has been developed in order to remove the above-described drawbacks inherent to the conventional video processing apparatus.
- an input video signal "a" of MAC system is applied to an input terminal 11 and is sent to a time-expansion circuit 12, a time-expansion circuit 14, and a signal generation circuit 31.
- the time-expansion circuit 12 expands the signal "a” with respect to time base by an expansion ratio of "3/2" to reproduce a chrominance signal in response to a write clock WR1 and a read clock RD from the signal generation circuit 31.
- the time-expansion circuit 12 is a digital memory which stores its input data in response to the write clock WR1 and outputs the stored data in response to the read clock RD.
- a timer 319 with a predetermined interval corresponding to a period of the color difference signal transmitted outputs a timing signal in response to the horizontal signal H from the divider 316.
- the timing signal is sent to the AND gate 322 which controls output timing of the write clock WR2.
- a timer 320 with a predetermined interval corresponding to a period of the chrominance signal transmitted outputs a timing signal in response to an output signal from the timer 319.
- the timing signal is sent to the AND gate 321 which controls output timing of the clock WR1.
- the divider 316 further divides frequencies of the output from the VCO 315 for reading the stored data to be expanded, to produce a read signal.
- the read signal is sent to an AND gate 325 whose another input responds an output of a timer 324.
- a phase detector 317 detects degree of phase difference between the field pulse and the synthesized vertical synchronizing pulse V to produce a phase error signal.
- An output of the phase detector 317 is sent to a low-pass filter 318 whose time constant is determined by an interval corresponding to a vertical scanning period.
- the low-pass filter 318 converts a pulse-like signal from the phase detector 317 into an analog signal and holds its output level for more than one vertical scanning interval by its time constant.
- An output of the low-pass filter 318 is sent to a comparator 323 comparing it with a predetermined reference signal Vt to output a control signal sent to the switch 32.
- the switch 32 transfers the signal "d" when the phase error signal is not detected by the phase detector 317 and comparator 323.
- the holding level of an output signal of the phase detector 317 or an output signal of comparator 323 can be also made by digital technique.
- the phase detector 317 sends the phase error signal to the comparator 323 through the low-pass filter 318.
- the comparator 323 produces the control signal by comparing the phase error signal with the reference signal Vt.
- the control signal is sent to the switch 32.
- the switch 32 does not transfer the signal "d" to the color difference signal reproduction circuit 15 when the phase detector 317 detects that the synthesized vertical synchronizing pulse is out of phase with detected field pulse. Therefore, there is no double image on the display 18 because color signals are not outputted from the switch 32 but the chrominance signal when PLL 330 is not locked.
- the control signal can be produced by phase detection between a synthesized frame pulse and a frame pulse detected from the video signal "a".
- the synthesized frame pulse is produced by dividing the synthesized vertical synchronizing pulse by "2".
- the Fig. 8 shows further a modified circuit arrangement.
- the low-pass filter 318 and comparator 323 responds to the output of phase detector 313 instead of the output of phase detector 317.
- the output signal of at the comparator 323 is the control signal for controlling the switch 32.
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Color Television Systems (AREA)
- Processing Of Color Television Signals (AREA)
- Synchronizing For Television (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63160092A JPH0210988A (ja) | 1988-06-28 | 1988-06-28 | テレビジョン受信機 |
| JP160092/88 | 1988-06-28 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| EP0349300A1 true EP0349300A1 (de) | 1990-01-03 |
| EP0349300B1 EP0349300B1 (de) | 1995-03-22 |
Family
ID=15707686
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP89306580A Expired - Lifetime EP0349300B1 (de) | 1988-06-28 | 1989-06-28 | Videosignalverarbeitungsgerät |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US5031031A (de) |
| EP (1) | EP0349300B1 (de) |
| JP (1) | JPH0210988A (de) |
| KR (1) | KR920008154B1 (de) |
| CA (1) | CA1306536C (de) |
| DE (1) | DE68921800T2 (de) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0529103A1 (de) * | 1990-02-28 | 1993-03-03 | Texas Instruments France | Verfahren, System und Vorrichtungen zur Verarbeitung eines Videosignals |
| CN1109438C (zh) * | 1995-07-20 | 2003-05-21 | 三星电子株式会社 | 记录/重放多个信号录像机 |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2972501B2 (ja) * | 1993-09-20 | 1999-11-08 | 富士通株式会社 | I/oサブシステム及びi/oサブシステムにおける排他制御方法 |
| JP3734306B2 (ja) * | 1996-05-13 | 2006-01-11 | ローム株式会社 | カラーエンコーダ |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6251393A (ja) * | 1985-08-30 | 1987-03-06 | Nec Home Electronics Ltd | Muse方式テレビ受像機のカラ−キラ− |
| JPS62176286A (ja) * | 1986-01-29 | 1987-08-03 | Canon Inc | ビデオ信号伝送システム |
-
1988
- 1988-06-28 JP JP63160092A patent/JPH0210988A/ja active Pending
- 1988-10-29 KR KR1019880014150A patent/KR920008154B1/ko not_active Expired
-
1989
- 1989-06-27 CA CA000604100A patent/CA1306536C/en not_active Expired - Lifetime
- 1989-06-27 US US07/371,858 patent/US5031031A/en not_active Expired - Fee Related
- 1989-06-28 EP EP89306580A patent/EP0349300B1/de not_active Expired - Lifetime
- 1989-06-28 DE DE68921800T patent/DE68921800T2/de not_active Expired - Fee Related
Non-Patent Citations (2)
| Title |
|---|
| FUNKSCHAU 6/1987, Munich HERBERT NOLL "Alles auf einem Chip" pages 24-26 * |
| RUNDFUNKTECHNISCHE MITTEI- LUNGEN RTM 1/85, Hamburg CHRISTOPH DOSCH "C-MAC/PAKET- -Normvorschlag der euro- pÛischen Rundfunkunion fÙr den Satellitenrundfunk" pages 23-35 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0529103A1 (de) * | 1990-02-28 | 1993-03-03 | Texas Instruments France | Verfahren, System und Vorrichtungen zur Verarbeitung eines Videosignals |
| CN1109438C (zh) * | 1995-07-20 | 2003-05-21 | 三星电子株式会社 | 记录/重放多个信号录像机 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0210988A (ja) | 1990-01-16 |
| EP0349300B1 (de) | 1995-03-22 |
| CA1306536C (en) | 1992-08-18 |
| DE68921800D1 (de) | 1995-04-27 |
| US5031031A (en) | 1991-07-09 |
| DE68921800T2 (de) | 1995-08-17 |
| KR900001242A (ko) | 1990-01-31 |
| KR920008154B1 (ko) | 1992-09-22 |
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