EP0273995B1 - Dispositif d'affichage plat - Google Patents

Dispositif d'affichage plat Download PDF

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Publication number
EP0273995B1
EP0273995B1 EP87100148A EP87100148A EP0273995B1 EP 0273995 B1 EP0273995 B1 EP 0273995B1 EP 87100148 A EP87100148 A EP 87100148A EP 87100148 A EP87100148 A EP 87100148A EP 0273995 B1 EP0273995 B1 EP 0273995B1
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EP
European Patent Office
Prior art keywords
column
display
drive lines
display elements
display device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
EP87100148A
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German (de)
English (en)
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EP0273995A1 (fr
Inventor
Masaru Yasui
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Hosiden Electronics Co Ltd
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Hosiden Electronics Co Ltd
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Publication date
Application filed by Hosiden Electronics Co Ltd filed Critical Hosiden Electronics Co Ltd
Priority to DE8787100148T priority Critical patent/DE3761279D1/de
Priority to AT87100148T priority patent/ATE49075T1/de
Priority to EP87100148A priority patent/EP0273995B1/fr
Publication of EP0273995A1 publication Critical patent/EP0273995A1/fr
Application granted granted Critical
Publication of EP0273995B1 publication Critical patent/EP0273995B1/fr
Expired legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2003—Display of colours
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels

Definitions

  • This invention relates to a planar display device for displaying a monochromatic or color image as liquid crystal display, plasma display, light-emitting diode display, etc. with a plurality of display elements arranged in rows and columns.
  • a liquid crystal display device which comprises a pair of transparent substrates 11 and 12 and liquid crystal 13 sealed therebetween.
  • a transparent common electrode 14 is provided on the entire inner surface of the other substrate 12.
  • the display electrodes 1 l,n are arranged in rows and columns. As shown in Fig. 2, a row drive line 2 l is provided along corresponding one of rows of display electrodes 1 l,n , and a column drive line 3n is provided along corresponding one of columns of display electrodes 1.e, n .
  • a thin-film transistor 4 l,n is provided for each display electrode 1 l,n . Each thin-film transistor 4 l,n has a drain connected to the corresponding display electrode 1 l,n , a gate connected to the corresponding row drive line 2 1 and a source connected to the corresponding column drive line 3 n .
  • a red filter R for the color display, a red filter R, a green filter G and a blue filter B are provided on either respective display electrodes 1 l,n or on the corresponding portions of the common electrode 14. These color filters are arranged substantially uniformly, for instance as shown in Fig. 3. Various colors can be displayed as mixtures of the red, green and blue colors depending on the state of display by the plurality of display elements corresponding to the respective display electrodes.
  • the display elements for displaying the red color will be referred to as R
  • the display elements for displaying the green color as G for displaying the blue color as B.
  • a white picture point i.e., a white dot
  • three display elements i.e., red, green and blue display elements, adjacent to one another, have to be driven simultaneously for white color emission.
  • White horizontal and vertical lines can be displayed simply by activating corresponding row and column of display elements R, G and B.
  • a 45-degree white oblique line from the right top to the left bottom of the display device can also be displayed by selectively activating display elements R, G and B along the oblique line, as shown in Fig. 4.
  • display elements are selected along a 45-degree oblique line from the left top to the right bottom on the display device, only one of the three colors, e.g.
  • red display elements R are displayed and a white line can not be display, as shown in Fig. 5.
  • This problem arises if it is intended to have one picture element (i.e., pixel) constituted by one display element, i.e., if each display element is intended to be used as a resolvable picture element so that a thin oblique or curved display line can be achieved.
  • a three-color display element set for a picture dot in which a set of three adjacent color display elements, i.e. red, green and blue color display elements R, G and B, are simultaneously driven for display of a white picture point, and also any other desired color is displayed as a picture point (i.e., dot) of a resultant color of suitable combination of light intensities through the three color display elements.
  • a set of three adjacent color display elements i.e. red, green and blue color display elements R, G and B
  • any other desired color is displayed as a picture point (i.e., dot) of a resultant color of suitable combination of light intensities through the three color display elements.
  • one row drive line 2 1 is selectively driven via a row drive circuit 17 according to the contents of a row register 16, while one column drive line 3n is selectively driven via a column drive circuit 19 according to the contents of a column register 18, as shown in Fig. 2, thus causing the display of a corresponding display electrode.
  • image signal data for one display line is stored in correspondence to individual display elements 5 1 , n of the display line.
  • the next row drive line is selectively driven, and image signal data for the next line of display element row to be displayed is stored in the column register 18.
  • successive row drive lines are selectively driven while storing image signal data for a line in the column register 18 after selection of each row drive line.
  • one display row 6i is displayed as follows.
  • the individual picture point signals in the signals for one display row are divided into two signals, i.e., one being a stream of R 1 , B 1 , G 2 , R 3 , B 3 , G 4 , ⁇ loaded in the column register 18 as shown in Fig.
  • the signal shown in Fig. 8A stored in the column register 18 in Fig. 2 is provided to activate the display elements connected to the corresponding row drive line 21 and individual column drive lines 3 n , 3n+1, 2 n+2 , ⁇ .
  • the signal shown in Fig. 8B stored in the column register 18 is provided to activate the display elements connected to the row drive line 2.e +l .
  • the display signal for one display row i.e., one horizontal scanning line cycle
  • the display signal for one display row is divided into two signals for driving display elements independently. Therefore, the operation is complicated.
  • the image signal is usually supplied for each display row, i.e., each horizontal scanning line, the aforementioned display system, therefore, is inferior in view of the matching with the divided two streams of input image signals.
  • the display surface is repeatedly scanned by selecting successsive row drive lines.
  • the repetition cycle period of scanning the display area i.e., vertical cycle period
  • flicker of the display surface screen occurs to deteriorate the quality of display.
  • increasing the row drive lines dictates increase in the rate of switching of the row drive lines, thus leading to expensive and complicated peripheral circuits.
  • row drive lines are each provided for two adjacent rows of display elements. That is, the display elements in the two rows are connected to the common row drive line.
  • Column drive lines are provided in pairs each for each column of display elements. Every other ones of the display elements in the column are connected to one of the pair column drive lines, and the other display elements in the column are connected to the other column drive lines in the pair. Each of the display elements is selectively displayed by the row and column drive lines connected to it.
  • Fig. 9 is a view similar to Fig. 2 but shows the embodiment of the invention. Referring to Fig. 9, display electrodes 1 2 1,3n are arranged in rows and columns. Unlike the prior art system, row drive lines 2 2Q are each provided for two adjacent rows of display electrodes 1 2l,3n .
  • one row of display electrodes 1 2l,3n , 1 2l,3n+2 , ⁇ is provided above the row drive line 2 2l
  • the other row of display electrodes 1 2l,3n+1 , 1 2 1, 3 n+3, ⁇ is provided below the line.
  • Two column drive lines are provided for each column of display electrodes.
  • column drive lines 3 3n and 3 3n+1 are provided on the opposite sides of the column of display electrodes 1 2 1,3n, 1 2l,3n+1 , ⁇ .
  • Thin-film transistors 4 2l,3n are each provided for each of the display electrtodes 1 21 , 3 n.
  • To the row drive line 2 2l are connected the gates of thin-film transistors corresponding to the display electrodes, between which the drive line 2 2l extends.
  • the display electrodes in each column are connected alternately and through the respective thin-film transistors to the column drive lines on the opposite sides of the column.
  • each display electrode constitutes together with the corresponding thin-film transistor and corresponding portions of the liquid crystal and common electrode (Fig. 1) a display element 5.
  • red, green and blue color filters R, G and B are provided substantially in a uniform arrangement in correspondence to the individual pixel electrodes.
  • the red, green and blue colour signals R k , G k and B k or color image signal supplied through input lines 25R, 25G and 25B are supplied through a color signal switching circuit 26 to color signal buses 27 to 29.
  • a horizontal sync pulse signal H s y n of the color image signal is supplied from a horizontal sync input terminal 31 to a tertiary counter 32.
  • the color signal switching circuit 26 is controlled to switch the color signals according to the count of the tertiary counter 32. According to the control the color signal switching circuit 26 connects the input signal lines 25R, 25G and 25B to the color signal buses 27, 28 and 29 , or 28, 29 and 27, or 29, 27 and 28, respectively.
  • the color signal buses 27 to 29 are repeatedly connected to successive stages of the column register 18, and the outputs of these stages drive the column drive lines 3 3n , 3 3 n+1, 3 3 n+2, 3 3 n+3, 3 3 n+4, 3 3 n+5, ⁇ through the column drive circuit 19.
  • a clock signal having three times the dot frequency of the input color image signal is supplied as shift clock from a clock terminal 33 to a shift register 34, and a horizontal sync pulse is supplied from the terminal 31 to the first stage of the shift register 34 at the start of each horizontal scanning cycle period.
  • Data from the individual stages of the column register 18 are fetched successively in response to the outputs of the respective shift stages of the shift register 34.
  • red, green and blue color signals R k , G k and B k are stored as the image signal of a certain horizontal cycle period in the manner as shown in Fig. 10A in the column register 18 and the row drive line 2 2l is driven at this time, all the display elements (i.e., display electrodes) in the two rows associated with the row drive line 2 2l shown in Fig. 9 are driven according to the contents of the corresponding stages of the column register 18.
  • the three-color display-element sets of respective picture are simultaneously driven for one display row.
  • color signals are stored in the manner as shown in Fig. 10B in the column register 18, and the row drive line 2 21 +2 is driven.
  • the display elements associated with the row drive line 2 21+2 shown in Fig. 9 are driven likewise as simultaneous drive for one display row.
  • color signals are stored in the manner as shown in Fig. 10C in the column register 18, and the row drive line 2 2l+4 is driven.
  • the display elements associated with the row drive line 2 2l+4 are driven as simultaneous drive for one display row.
  • the image signal is stored successively and repeatedly in the order of Figs. 10A to 10C for respective horizontal periods in the column register 18. It is possible to arrange such that the color signals on the color signal buses 27 to 29 are stored simultaneously in three stages of the column register 18 for each dot of the input image signal.
  • Fig. 11 shows a second embodiment of the invention.
  • each row drive line 2 21 is provided for every two rows of display elements.
  • each row drive line is provided for each display element row. That is, row drive lines 2 2l+1 , 2 2 1+3, ⁇ are provided additionally to the embodiment of Fig. 9.
  • To each of these additional row drive lines are connected display elements on the opposite sides, i.e., on the upper and lower sides of the additional row drive line in the Figure.
  • Each display element is also connected to the column drive lines or opposite sides thereof.
  • additional thin-film transistors (labeled by circles)4 2l+1,3 n, 4 2 2+1,3n+2, ⁇ , and 4 2 2+1,3n+1, 4 2l+1,3n+3 , ⁇ on one sides of the respective display electrodes 1 2l,3n+1 , 1 2l,3n+3 , ⁇ , and 2 2 1+2,3n, 1 2 1+2,3n+2, ⁇ , opposite respectively from those thin-film transistors 4 2 2,3n + 1, 4 2l,3n+3 , ⁇ and 4 2l+2,3n , 4 2l+2,3n+2 , ⁇ shown in Fig.
  • the thin-film transistors 4 2 1+1,3n, 4 2 1+1,3n+2, ⁇ , and 4 2 2+1,3n+1, ⁇ 4 2l+1,3n+3 , ⁇ have their drains connected to the respective opposite side display electrodes 1 2l,3n+1 , 1 2l,3n+3 , ⁇ and 1 2 1+2,3n, 1 2 1+2,3n+2, ⁇ , their sources connected to the respective column drive lines 3 3 n, 3 3 n+2, ⁇ , and 3 3 n+i, 3 3 n+3, ⁇ and their gates commonly connected to the row drive line 2 2l,+1 .
  • additional thin-film transistors are provided for each of the other additional row drive lines.
  • first or second embodiment two rows, i.e., upper and lower side rows of display elements are connected to each row drive line, so that two rows of display elements can be displayed while a single row drive line is being selected.
  • the row drive lines can be reduced in number to one hald compared to the row drive lines in the prior art arrangement shown in Fig. 2. This means that for the same period, during which each row drive line is selectively driven, the driving period for one frame can be reduced to one half, resulting in reduced flicker and improved quality of the displayed image.
  • the number of display element rows can be doubled to increase the resolution correspondingly.
  • the period of driving of one row drive line can be doubled compared to the prior art system. That is, the drive speed can be reduced to permit simpler construction of the peripheral circuits. Further, in the case of the liquid crystal display, the charging period for each of the display electrodes can be extended so that it is possible to obtain a display image having an improved contrast.
  • the number of column drive lines is doubled compared to the prior art system, the number of row drive lines is reduced to one half, so that the design and manufacture of the device will not become difficult.
  • the row drive line has to be driven twice for the display of one display row.
  • the display device is scanned twice during one horizontal scanning cycle period of the image signal. Therefore, the correspondency to the image signal is unsatisfactory in view of displaying the image signal supplied for each horizontal scanning cycle period.
  • the image signal supplied for each horizontal scanning cycle period is displayed by driving each row drive line only once for one horizontal scanning line period. Nevertheless, the display thus obtained for one display row consists of three-color display element sets as respective picture points.
  • the display device according to the invention thus has satisfactory matching property with respect to the input of the image signal.
  • three color signals for each picture point can be simultaneously input to the column register 18 as mentioned earlier. Further, it is possible to store three color signals for two or three picture points simultaneously in the column register 18.
  • the color signal buses 27 to 29 are connected through a one-dot delay circuit 35 to color signal buses 36 to 38, and the color signals 27 to 29 and 36 to 38 are successsively and repeatedly connected to individual stages of the column register 18.
  • the column register 18 is divided into groups each consisting of 6 stages, a horizontal sync pulse H s y n is supplied to the first stage of a shift register 39 and shifted therethrough in response to the output of a frequency divider 41, which divides the frequency of a dot clock from a terminal 40 to one half, and writing of data in one of the groups of the column register 18 is effected according to the output of each stage of the shift register 39.
  • the input image signal is stored six color signals for two picture dots at a time in the column register 18.
  • a twofold path is provided for the driving of each display element. That is, even if one of the two paths is defective, the display element may be driven through the other path. This means a corresponding increase in the production yield. While the above embodiments of the invention have concerned with the liquid crystal planar display devices, the invention is applicable to planar display devices based on light-emitting diodes or plasma display as well.
  • the row drive line 2 2l+1 is selected to turn ON the thin-film transistor 4 2l+1,3n , whereby a negative voltage is applied across the liquid crystal at the display electrode 1 2l,3n+1 by negative voltage supplied from the line 3 3n
  • the row drive line 221 is selected to turn ON the transistor 4 2l,3n+1 , whereby a negative voltage is applied across the liquid crystal at the same display electrode by negative voltage supplied from the line 3 3n+1
  • the line 2 2l+1 is selected to turn ON the transistor 4 2 k+1,3n, whereby a positive voltage is applied across the liquid crystal by positive voltage supplied from the line 3 3 n
  • the fourth field (even field) the line 2 2l is selected, whereby a negative voltage is applied across the liquid crystal by negative voltage supplied from the line 3 3n+1 .
  • the drive control is carried out as shown in Fig. 14.
  • the drive control sequence pattern repeats for every eight successive fields.
  • the pattern shown in Fig. 14 is only an example of driving waveform, and it is also possible to use a pattern which is shifted in phase by one field period with respect to the pattern of Fig. 14.
  • zero voltage is applied to the common electrode 4 (Fig. 1).
  • the waveform as shown in Fig. 14 may be obtained with an arrangement as shown in Fig. 15, for instance.
  • the vertical sync pulse signal supplied from a terminal 51 is frequency divided into one half the frequency in a flip-flop 52.
  • the Q and Q outputs of the flip-flop 52 are used to control gates 53 and 54 to separate the input vertical sync pulses into even and odd field pulses.
  • the separated pulse signals are frequency divided into one half the frequency in respective flip-flops 55 and 56.
  • the outputs of these flip-flops are ANDed in an AND gate 57.
  • the output of the flip-flop 56 is frequency divided into one half the frequency in a flip-flop 58.
  • the outputs of the flip-flop 58 and AND gate 57 are exclusively ORed in an exclusive OR gate 59. As a result, an intended output is obtained at an output terminal 61.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Liquid Crystal Display Device Control (AREA)

Claims (11)

1. Dispositif d'affichage plat comprenant une pluralité d'éléments d'affichage (122, 3n) disposés en rangées et en colonnes, une pluralité de premières lignes de commande de rangée (22.e) prévues pour et s'étendant le long des rangées respectives desdits éléments d'affichage et une pluralité de lignes de commande de colonne (33n) prévues pour et s'étendant le long des colonnes respectives desdits éléments d'affichage, lesdites premières lignes de commande de rangée et lignes de commande de colonne étant sélectivement commandées pour sélectivement activer lesdits éléments d'affichage, caractérisé en ce que lesdites premières lignes de commande de rangée sont chacune prévue pour deux rangées adjacentes desdits éléments d'affichage, lesdits éléments d'affichage sur les côtés opposés de chacune desdites premières lignes de commande de rangée (22B) étant connectés en commun à ladite première ligne de commande de rangée, lesdites premières lignes de commande de colonne étant fournies par paires (33n, 33n+1) chacune pour chaque colonne desdits éléments d'affichage, chacun des autres desdits éléments d'affichage dans ladite colonne étant connectés à l'une desdites lignes de commande de colonne en paire, les autres éléments d'affichage dans ladite colonne étant connectés à l'autre ligne de commande de colonne dans la paire.
2. Dispositif d'affichage plat selon la revendication 1, qui comprend en outre des secondes lignes de commande de rangée, chacune étant prévue pour et s'étendant entre deux rangées d'éléments d'affichage adjacents entre lesdites premières lignes de commande de rangée adjacentes, les éléments correspondant desdits éléments d'affichage sur les côtés opposés de chaque dite seconde ligne de commande de rangée étant connectées en commun à ladite chaque seconde ligne de commande de rangée, chacun desdits éléments d'affichage dans chaque colonne étant connecté aux deux dites lignes de commande de colonne dans la paire pour la colonne correspondante desdits éléments d'affichage.
3. Dispositif d'affichage plat selon la revendication 1, qui comprend en outre un moyen de commande de rangée servant à commander ladite pluralité de premières lignes de commande de rangée l'une après l'autre en synchronisation avec le cycle de balayage horizontal d'un signal d'image devant être affiché et un moyen de commande de colonne fourni avec ledit signal d'image pour une ligne de balayage et comportant des étages en nombre égal à ladite pluralité de lignes de commande de colonne pour commander lesdites lignes de commande de colonne en conformité avec les sorties desdits étages correspondant.
4. Dispositif d'affichage plat selon la revendication 2 ou 3, dans lequel des filtres couleur rouge, vert et bleu sont prévus sur lesdits éléments d'affichage respectifs afin de former des ensembles d'éléments d'affichage à trois couleurs tels que lesdits filtres couleur sont sensiblement répartis de manière uniforme comme un tout, dans lequel deux des trois éléments d'affichage couleur dans chaque ensemble dans une colonne et l'autre élément d'affichage couleur dans une colonne adjacente pour constituer l'un des points d'image par rapport à une première ligne de commande de rangée.
5. Dispositif d'affichage plat selon la revendication 4, dans lequel ledit signal d'image en entrée est constitué de signaux de pixel en série chacun étant constitué de signaux couleur parallèle rouge, vert et bleu, et ledit dispositif comprend en outre un registre à décalage alimenté avec le signal de synchronisation horizontale pour le décalage de signaux sous la commande d'un signal d'horloge à trois fois la fréquence des signaux pixel, des premiers à des troisièmes bus de signaux couleur, à travers lesquels les trois signaux couleur sont successivement et de manière répétée appliqués aux étages correspondant dudit moyen de commande de colonne en conformité avec les données décalées à travers ledit registre à décalage, et un moyen servant à commuter la connexion de lignes d'entrée, auxquelles lesdits signaux rouge, vert et bleu sont appliqués, et lesdits premier au troisième bus de signaux couleur, pour chaque dit signal de synchronisation horizontale.
6. Dispositif d'affichage plat selon l'une des revendications 2 et 4, lequel comporte en outre un moyen servant à commander lesdites premières lignes de commande de rangée pour des champs pairs dudit signal d'image et à commander lesdites secondes lignes de commande de rangée pour des champs impairs dudit signal d'image.
7. Dispositif d'affichage plat selon la revendication 4 lequel comporte en outre des premiers à des troisièmes bus de signaux couleur, auxquels des signaux couleur rouge, vert et bleu sont appliqués, des quatrièmes à des sixièmes bus de signaux couleur, auxquels lesdits signaux couleur rouge, vert et bleu sont appliqués après avoir été retardés d'une période d'horlorge de pixel, un registre à décalage, auquel des impulsions de synchronisation horizontale dudit signal d'image sont appliquées sous la forme de données et d'un signal d'horloge à une moitié de la fréquence de l'horloge de pixel dudit signal d'image est appliqué sous la forme d'une horloge de décalage, et une pluralité de registres de colonne chacun étant alimenté avec des signaux couleur sur lesdits premier au sixième bus de signaux couleur en réponse aux sorties d'étages dudit registre à décalage pour appliquer six sorties de chaque dit registre de colonne aux lignes correspondantes desdites lignes de commande de colonne.
8. Dispositif d'affichage plat selon l'une des revendications 1 à 5, dans lequel ledit dispositif d'affichage plat est un dispositif d'affichage à cristaux liquides, et dans lequel lesdits éléments d'affichage sont constitués par des électrodes d'affichage disposées en rangées et en colonnes dans ledit dispositif d'affichage à cristaux liquides, des transistors à film mince comportant des drains respectifs connectés auxdites électrodes d'affichage, des grilles respectives connectées auxdites premières et secondes lignes de commande de rangée et des sources respectives connectées auxdites lignes de commande de colonne, et une électrode commune se trouvant opposée auxdites électrodes d'affichage via un cristal liquide.
9. Dispositif d'affichage plat selon l'une des revendications 1 à 5, dans lequel lesdites lignes de commande de colonne dans chaque paire sont prévues sur les côtés opposés de chaque colonne des éléments d'affichage.
10. Dispositif d'affichage plat selon la revendication 1, qui comprend en outre un moyen de commande à courant alternatif de cristal liquide servant à commander le cristal liquide dans des première et seconde trames différentes pour chaque huit champs successifs, une tension d'une polarité étant appliquée à travers ledit cristal liquide pour les champs pairs et impairs dans ladite première sorte de trame, des tensions de polarité opposées étant appliquées à travers ledit cristal liquide pour les champs impairs et pairs respectifs dans ladite seconde sorte de trame, lesdites première et seconde trames se produisant en alternance, la polarité de la tension appliquée à travers ledit cristal liquide étant inversée lorsque lesdites première et seconde sortes de trames sont changées.
11. Dispositif d'affichage plat selon la revendication 10, dans lequel ledit moyen de commande à courant alternatif de cristal liquide comprend un moyen servant à séparer les impulsions de synchronisation verticale en celles pour des champs pairs et celles pour des champs impairs, des premier et second moyens de diviseur de fréquence servant à diviser la fréquence desdites impulsions séparées d'une moitié de la fréquence, et une porte ET pour mettre en ET les sorties desdits moyens de diviseur de fréquence, un troisième moyen de diviseur de fréquence servant à diviser la fréquence de la sortie dudit second moyen de diviseur de fréquence d'une moitié, et une porte OU exclusif servant à mettre en OU exclusif les sorties dudit troisième moyen de diviseur de fréquence et de ladite porte ET.
EP87100148A 1987-01-08 1987-01-08 Dispositif d'affichage plat Expired EP0273995B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
DE8787100148T DE3761279D1 (de) 1987-01-08 1987-01-08 Flaches anzeigegeraet.
AT87100148T ATE49075T1 (de) 1987-01-08 1987-01-08 Flaches anzeigegeraet.
EP87100148A EP0273995B1 (fr) 1987-01-08 1987-01-08 Dispositif d'affichage plat

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP87100148A EP0273995B1 (fr) 1987-01-08 1987-01-08 Dispositif d'affichage plat

Publications (2)

Publication Number Publication Date
EP0273995A1 EP0273995A1 (fr) 1988-07-13
EP0273995B1 true EP0273995B1 (fr) 1989-12-27

Family

ID=8196669

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EP87100148A Expired EP0273995B1 (fr) 1987-01-08 1987-01-08 Dispositif d'affichage plat

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EP (1) EP0273995B1 (fr)
AT (1) ATE49075T1 (fr)
DE (1) DE3761279D1 (fr)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0287055B1 (fr) * 1987-04-15 1993-09-29 Sharp Kabushiki Kaisha Dispositif d'affichage à cristaux liquides
SE467985B (sv) * 1991-10-04 1992-10-12 Siemens Elema Ab Anordning foer indikering av ett parametervaerde samt anvaendning daerav
JP3133216B2 (ja) * 1993-07-30 2001-02-05 キヤノン株式会社 液晶表示装置及びその駆動方法
FR2742910B1 (fr) * 1995-12-22 1998-04-17 Thomson Multimedia Sa Procede et dispositif d'adressage d'un ecran matriciel
DE19746329A1 (de) * 1997-09-13 1999-03-18 Gia Chuong Dipl Ing Phan Display und Verfahren zur Ansteuerung des Displays
US7286136B2 (en) 1997-09-13 2007-10-23 Vp Assets Limited Display and weighted dot rendering method
DE19746576A1 (de) * 1997-10-22 1999-04-29 Zeiss Carl Fa Verfahren für die Bilderzeugung auf einem Farbbildschirm und ein dazu geeigneter Farbbildschirm
US6630921B2 (en) * 2001-03-20 2003-10-07 Koninklijke Philips Electronics N.V. Column driving circuit and method for driving pixels in a column row matrix
KR20040020317A (ko) * 2002-08-30 2004-03-09 삼성전자주식회사 액정 표시 장치 및 그 구동 방법
JP2006517687A (ja) * 2003-02-11 2006-07-27 コピン・コーポレーシヨン データ線の容量を用いた集積デジタル・アナログ変換器を付けた液晶ディスプレー

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0167408B1 (fr) * 1984-07-06 1991-06-12 Sharp Kabushiki Kaisha Circuit de commande pour un dispositif d'affichage en couleurs à cristaux liquides
JPH07113819B2 (ja) * 1984-11-06 1995-12-06 キヤノン株式会社 表示装置及びその駆動法

Also Published As

Publication number Publication date
EP0273995A1 (fr) 1988-07-13
DE3761279D1 (de) 1990-02-01
ATE49075T1 (de) 1990-01-15

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