EP0158785A1 - Festverdrahtete Einrichtung zum steuern von Fenstern auf einem Bildschirm - Google Patents

Festverdrahtete Einrichtung zum steuern von Fenstern auf einem Bildschirm Download PDF

Info

Publication number
EP0158785A1
EP0158785A1 EP85101615A EP85101615A EP0158785A1 EP 0158785 A1 EP0158785 A1 EP 0158785A1 EP 85101615 A EP85101615 A EP 85101615A EP 85101615 A EP85101615 A EP 85101615A EP 0158785 A1 EP0158785 A1 EP 0158785A1
Authority
EP
European Patent Office
Prior art keywords
windows
abscissa
ordinate
window
screen
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP85101615A
Other languages
English (en)
French (fr)
Other versions
EP0158785B1 (de
Inventor
Guy Marcoux
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel Lucent SAS
Original Assignee
Compagnie Generale dElectricite SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Compagnie Generale dElectricite SA filed Critical Compagnie Generale dElectricite SA
Priority to AT85101615T priority Critical patent/ATE37109T1/de
Publication of EP0158785A1 publication Critical patent/EP0158785A1/de
Application granted granted Critical
Publication of EP0158785B1 publication Critical patent/EP0158785B1/de
Expired legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/14Display of multiple viewports

Definitions

  • the present invention relates to graphical or alphanumeric visualization using point scanning, television type for an information processing system, and more particularly multi-window visualization making it possible to display independent image zones, of rectangular shapes, which can overlap.
  • Existing display devices generally use a screen controller formed by a specialized or non-specialized processor which generates a display maintenance signal by means of a scan, by lines of successive positions of character points , an image that can be displayed in whole or in part, and a simultaneous reading of an image memory containing appearance words defining the image at each point or character position using an addressing word, one of which group of bits is a function of the rank of the point or character position scanned in a line being scanned and of which another group of bits is a function of the order of the line considered in the scanning frame.
  • the screen controller does not directly address the image memory for display maintenance but a composition memory reflecting the composition of the display in which another processor , or the screen controller itself, has assembled, from the content of the image memory and by means of fairly heavy software, the different image parts which must appear on the display in each window.
  • the composition memory can include the appearance words defining the graphics of the image at each point or character position. This is often the case with display terminals where the image memory is relegated to a central computer which ensures by remote transmission the management of the content of the composition memory, the screen controller having its role strictly limited to maintenance. of the display. This arrangement has the drawback of restricting the autonomy of the terminals and of monopolizing the memory capacity and the computation time of the central computer.
  • the object of the present invention is to remedy the aforementioned faults by means of a cable circuit which is simple to implement, indicating at any time to which window the point or character position being written on the screen belongs without impose restrictions on the definition of windows.
  • the screen controller registers point positions on the screen one by one by scanning lines, in accordance with the value of an aspect word stored in memory and specific to each point position called by means of an addressing word which is a function of the Cartesian coordinates defined by the scanning with a group of so-called abscissa bits representing more or less completely the rank, in a scanning line of the current point position and with a group of bits said to be ordinate also representing more or less completely the order, in the frame, of the scan line considered.
  • abscissa bits representing more or less completely the rank
  • a scanning line of the current point position and with a group of bits said to be ordinate also representing more or less completely the order, in the frame, of the scan line considered.
  • it is usual to slow down the reading rate of the image memory by grouping in each of its locations the appearance words relating to several positions of successive points in a scanning line.
  • the image memory contains only a character code defining the graphics on the screen of a block formed of several dot positions usually 8 ⁇ 8 so that the group of bits of abscissa of the address word intended for the image memory is limited to the row of the block in a scan line while the group of ordinate bits is limited to the order of the character line considered, the complementary addressing within the block being applied, with the character code taken from the image memory, to a character memory.
  • the screen controller generates an address for memory image corresponding to the XY coordinates in the screen sweep of very small areas scanned successively, point positions, groups of aligned point positions, tiles, representing the smallest possible partition of the screen from which are defined the windows and which will be designated subsequently picture elements.
  • the screen controller makes it possible to display on the screen in whole or in part, a particular document defined in image memory from_ appearance words relating to its image elements.
  • the use of windows on the screen makes it possible to display several documents, each window being linked to a particular document that can be displayed in whole or in part. It implies a partitioning of the image memory into pages each containing the appearance words relating to the image elements of a document and requires the addressing of the screen controller by a designation of the page concerned, that is to say that is, the window to which the picture element being scanned on the screen belongs.
  • FIG. 1 represents the screen 1 defined in image elements identified by Cartesian coordinates XY appearing, as indicated above, in the address word of the screen controller.
  • This screen 1 comprises different windows A, B, C, D rectangular, parallel to the edges of the screen and of various sizes which are entirely determined by their projections DX, DY on the two coordinate axes defined by the sweeping maintenance line. display performed by the screen controller.
  • the window to which the scanned image element belongs From the DX, DY projections of the windows and their order of superimposition on the screen assumed here to be the alphabetical order of the letters which refer.
  • the membership of an image element in a window can be deduced from the simultaneous membership of the values of the abscissa X and ordered parts Y of the addressing word of the screen controller to the projections DX, DY of the window considered while the uncertainty resulting from the simultaneous belonging of an image element to several windows can be removed by considering the windows in an order of priority coinciding with their order of superposition.
  • FIG. 2 schematically illustrates the constitution which results therefrom for a window management circuit supplementing the addressing of the image memory supplied by a screen controller.
  • This presents the screen 1 with an image element 2 being scanned in the display maintenance scan for which the screen controller generates an address word having an x-value part of the value x and a ordered part of value y.
  • An auxiliary memory for the abscissa projections of the windows 3 contains the DX projections of the windows on the abscissa axis. It is addressed by the abscissa bit group X of the address word of the screen controller and has as many addressable locations as there are discrete values taken by this abscissa bit group X.
  • Each of its locations contain abscissa occupation pointers, in number equal to that of the windows, four in this example, which are formed by a bit taking the value 1 if the window considered projects on the abscissa value x considered and 0 in the opposite case.
  • An auxiliary memory of the ordinate projections of the windows 4 contains the projections DY of the windows on the ordinate axis. It is addressed by the group of ordinate bits Y of the address word of the screen controller and has as many addressable locations as there are discrete values taken by this group of ordinate bits Y.
  • Each of its locations contain as many ordinates of occupation ordinate as there are windows formed of a bit taking the value 1 if the window considered is projected on the value of ordinate y considered and 0 in the opposite case.
  • a battery 5 of logic gates of type "and" with two inputs performing the intersection of the abscissa occupation pointers and of ordinate of each window and generating, for each window a logic signal at state 1 when the element d! scanned image belongs to it and at state 0 otherwise.
  • a priority encoder 6 is connected to the outputs of the battery 5 of logic gates so as to make its order of priority coincide with that of superposition of the windows. He delivers in output number N from the window visible on the screen at the location of the scanned image element. This number N associated with the address word XY of the screen controller is used to address the page of the image memory 7 relating to the document corresponding to the window concerned and, within this page, the aspect word or words corresponding to the scanned image element.
  • auxiliary memories 3, 4 of abscissa and ordinate projection is modified outside the display maintenance scan lines for example during the frame returns between two images by an auxiliary microprocessor ⁇ p which can be possibly that of the screen controller.
  • the capacity of these auxiliary memories depends on the number of windows but it is liable to reduce it by neglecting the least significant bits of the abscissa and ordered parts of the address word of the screen controller.
  • the counterpart of this operation is to magnify the visible image element vis-à-vis the windows and to limit the possibility of defining the windows.
  • FIG. 3 represents an exemplary embodiment of a window management circuit adapted to the case of a screen with 1024 ⁇ 1024 dot positions and of a screen controller 10 generating a display maintenance sweep at a frame rate of 50 frames per second, a separate addressing word per group of eight successive point positions in a scan line comprising a group of abscissa bits X at 7 bits and a group of ordinate bits Y at 10 bits and a signaling E of the occupancy state of its address bus.
  • An auxiliary processor 15 has its address bus connected directly to that of the screen controller 10, its data bus connected by buffer circuits 17, 18 to the data ports of the auxiliary memories 11, 12 and its control bus connected to the commands for registering auxiliary memories, blocking and transmission direction of the buffer circuits as well as signaling E of the screen controller. Outside the periods of use of the address bus by the screen controller 10 which are reported to it by the signaling E it ensures the control of the contents of the auxiliary memories 11, 12 that is to say the modifications of the forms Windows.
  • the maintenance of a screen of 1024 x 1024 positions of points at a rate of 50 images per second, with a reading of the image memory by group of eight positions of successive points in a scanning line corresponds to a change in the value the address word of the screen controller approximately every 120 ns. during which the management circuit and the screen controller must have validly addressed the image memory which is a reasonable delay taking into account the read times of the random access memories of average speed insofar as the addressing delay caused by the window management circuit does not have to be accumulated with the image memory read time, this delay time can be compensated by a resynchronization in the image memory of the controller address word XY screen, its complement N provided by the priority encoder and scan synchronization signals delivered by the screen controller.
  • the number of windows can be extended by widening the window management circuit. For example for 32 windows, it is necessary to use auxiliary memories 11, 12 formed of random access memories organized in 128 words of 32 bits, to take a battery 12 of 32 logic gates of type "and" and to cascade four circuits encoder of priority envisaged each for one byte.
  • the window management circuit can be designed according to a serial technique with operation in several successive phases for each addressing cycle of the screen controller, which consequently reduces the number of elements of the battery 12 of logic gates and the capacities of the priority encoder 14 and of the buffer circuits 17, 18.
  • FIG. 4 schematically illustrates a circuit for managing 32 windows of this design provided for a screen with 512 x 512 positions of dots whose display is maintained at a rate of 50 images per second using a controller screen addressing the image memory in groups of eight successive positions of points in a scan line, the value of the address word changing approximately every 480 ns.
  • the windows of this management circuit are defined according to a grid whose mesh makes 8 x 8 positions of points, that is to say that the 3 least significant bits of the group of bits of ordinate Y of the word screen controller address are neglected.
  • This management circuit comprises a counter 20 rotating at a rate four times faster than that of change of value of the address word XY generated by the screen controller and delivering two bits of phase f one evolving at this rate four times faster and the other at half that rate.
  • the abscissa projection auxiliary memory 21 has a capacity of 256 words of 8 bits. It is addressed by the two phase bits' f in four zones of 64 words of 8 bits themselves addressed by means of the 6 bits of part X of the address word of the screen controller.
  • the ordinate projection auxiliary memory 22 also has a capacity of 256 8-bit words addressed in four areas of 64 8-bit words by the two bits of phase f, each zone being addressed internally by the 6 most significant bits of the ordered part Y of the address word of the screen controller.
  • the battery of logic gates of type "and" 23 with two inputs connected to the bits of the same rank of the data ports of the auxiliary memories stores eight elements and the priority encoder 24 eight inputs although the number of windows is 32.
  • the priority encoder is provided with a blocking circuit formed by a flip-flop interposed between its trigger signaling output EO and its inhibition input Ei, and reset to zero by the falling edge of the most significant phase bit .
  • a register with five parallel bits 26 delivers the window number N from the pet phase bits of the three bits of the output of the priority encoder 24 which it records on the order of the trigger signaling output EO of the priority encoder 24.
  • This window management circuit determines to which window the image element scrutinized by the screen controller belongs by examining the DX, DY projections of the 32 windows by four successive groups of eight, one group during each phase, the windows are considered in decreasing order of priority so that the first and only triggering by cycle of the priority encoder corresponds to the window visible on the screen.
  • the register with five parallel bits 26 delivers the number of the window sought from the number of the latter in a group delivered by the priority encoder and from the number of the group concerned delivered by the phase bits of the counter.
  • FIG. 5 illustrates a variant of the window management circuit described relative to FIG. 3.
  • the auxiliary memories for abscissa projection and ordinate projection are combined in a single random access memory 30 addressed to the times by the abscissa bit group X and the ordinate bit group Y of the address word of the screen controller.
  • a buffer register 31 placed at the output of the random access memory 30 makes it possible to simultaneously present to the battery of logic gates of type "and" 32 the abscissa occupation and ordinate occupation pointers of the different windows for the element image being scanned.
  • a priority encoder 33 connected following the battery of logic gates 32 delivers the window number N.
  • the buffer register 31 is written at the start of each scan line with the ordinate occupation pointers which remain invariant throughout a line. For this, it receives a registration order legally used for addressing in the RAM 30 of the DX or DY parts.
  • This variant simplifies the access of the auxiliary processor to the memory 30 of the window management circuit.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Digital Computer Display Output (AREA)
  • Image Generation (AREA)
  • Coating With Molten Metal (AREA)
  • Communication Cables (AREA)
  • Liquid Crystal (AREA)
  • Details Of Aerials (AREA)
  • Gas Or Oil Filled Cable Accessories (AREA)
  • Window Of Vehicle (AREA)
EP85101615A 1984-02-20 1985-02-14 Festverdrahtete Einrichtung zum steuern von Fenstern auf einem Bildschirm Expired EP0158785B1 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AT85101615T ATE37109T1 (de) 1984-02-20 1985-02-14 Festverdrahtete einrichtung zum steuern von fenstern auf einem bildschirm.

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR8402510A FR2559927B1 (fr) 1984-02-20 1984-02-20 Circuit cable de gestion de fenetres sur ecran
FR8402510 1984-02-20

Publications (2)

Publication Number Publication Date
EP0158785A1 true EP0158785A1 (de) 1985-10-23
EP0158785B1 EP0158785B1 (de) 1988-09-07

Family

ID=9301176

Family Applications (1)

Application Number Title Priority Date Filing Date
EP85101615A Expired EP0158785B1 (de) 1984-02-20 1985-02-14 Festverdrahtete Einrichtung zum steuern von Fenstern auf einem Bildschirm

Country Status (6)

Country Link
US (1) US4670752A (de)
EP (1) EP0158785B1 (de)
JP (1) JPS60188992A (de)
AT (1) ATE37109T1 (de)
DE (1) DE3564876D1 (de)
FR (1) FR2559927B1 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0261463A2 (de) * 1986-09-24 1988-03-30 Hitachi, Ltd. Anzeigesteuergerät

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB8428443D0 (en) * 1984-11-10 1984-12-19 Int Computers Ltd Data processing
JPS61188582A (ja) * 1985-02-18 1986-08-22 三菱電機株式会社 マルチウインドウ書込み制御装置
GB8508668D0 (en) * 1985-04-03 1985-05-09 British Telecomm Video display apparatus
US4710767A (en) * 1985-07-19 1987-12-01 Sanders Associates, Inc. Method and apparatus for displaying multiple images in overlapping windows
EP0212563B1 (de) * 1985-08-14 1994-11-02 Hitachi, Ltd. Verfahren zur Anzeigesteuerung für ein System mit mehreren Bildausschnitten
JPS6249577A (ja) * 1985-08-29 1987-03-04 Agency Of Ind Science & Technol マルチウインド優先制御方式
US4777486A (en) * 1986-05-09 1988-10-11 A-Squared Systems Video signal receiver for computer graphics system
US4884199A (en) * 1987-03-02 1989-11-28 International Business Macines Corporation User transaction guidance
US4965558A (en) * 1987-07-15 1990-10-23 Interand Corporation Method and apparatus for image retrieval
JPS6426221A (en) * 1987-07-22 1989-01-27 Sharp Kk Fast page turning control system
US4890098A (en) * 1987-10-20 1989-12-26 International Business Machines Corporation Flexible window management on a computer display
US5396263A (en) * 1988-06-13 1995-03-07 Digital Equipment Corporation Window dependent pixel datatypes in a computer video graphics system
US5216413A (en) * 1988-06-13 1993-06-01 Digital Equipment Corporation Apparatus and method for specifying windows with priority ordered rectangles in a computer video graphics system
US5128658A (en) * 1988-06-27 1992-07-07 Digital Equipment Corporation Pixel data formatting
US5001469A (en) * 1988-06-29 1991-03-19 Digital Equipment Corporation Window-dependent buffer selection
US5185597A (en) * 1988-06-29 1993-02-09 Digital Equipment Corporation Sprite cursor with edge extension and clipping
US5075675A (en) * 1988-06-30 1991-12-24 International Business Machines Corporation Method and apparatus for dynamic promotion of background window displays in multi-tasking computer systems
US4961071A (en) * 1988-09-23 1990-10-02 Krooss John R Apparatus for receipt and display of raster scan imagery signals in relocatable windows on a video monitor
US5592678A (en) * 1991-07-23 1997-01-07 International Business Machines Corporation Display adapter supporting priority based functions
US5276437A (en) * 1992-04-22 1994-01-04 International Business Machines Corporation Multi-media window manager
US5557298A (en) * 1994-05-26 1996-09-17 Hughes Aircraft Company Method for specifying a video window's boundary coordinates to partition a video signal and compress its components
JP2004094385A (ja) * 2002-08-29 2004-03-25 Olympus Corp 画像入力装置の領域選択方式、領域選択方法及び領域選択プログラム
KR102208441B1 (ko) * 2014-06-13 2021-01-27 삼성전자주식회사 화면을 포함하는 전자 장치

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2517448A1 (fr) * 1981-11-27 1983-06-03 Hitachi Ltd Appareil de commande d'un dispositif d'affichage d'images et procede de commande d'un tel dispositif

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4197590A (en) * 1976-01-19 1980-04-08 Nugraphics, Inc. Method for dynamically viewing image elements stored in a random access memory array
US4295135A (en) * 1978-12-18 1981-10-13 Josef Sukonick Alignable electronic background grid generation system
US4533910A (en) * 1982-11-02 1985-08-06 Cadtrak Corporation Graphics display system with viewports of arbitrary location and content
US4554538A (en) * 1983-05-25 1985-11-19 Westinghouse Electric Corp. Multi-level raster scan display system
US4542376A (en) * 1983-11-03 1985-09-17 Burroughs Corporation System for electronically displaying portions of several different images on a CRT screen through respective prioritized viewports

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2517448A1 (fr) * 1981-11-27 1983-06-03 Hitachi Ltd Appareil de commande d'un dispositif d'affichage d'images et procede de commande d'un tel dispositif

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0261463A2 (de) * 1986-09-24 1988-03-30 Hitachi, Ltd. Anzeigesteuergerät
EP0261463A3 (de) * 1986-09-24 1991-01-23 Hitachi, Ltd. Anzeigesteuergerät
US5129055A (en) * 1986-09-24 1992-07-07 Hitachi, Ltd. Display control apparatus including a window display priority designation arrangement

Also Published As

Publication number Publication date
JPS60188992A (ja) 1985-09-26
FR2559927A1 (fr) 1985-08-23
EP0158785B1 (de) 1988-09-07
ATE37109T1 (de) 1988-09-15
DE3564876D1 (en) 1988-10-13
FR2559927B1 (fr) 1986-05-16
JPH0254957B2 (de) 1990-11-26
US4670752A (en) 1987-06-02

Similar Documents

Publication Publication Date Title
EP0158785B1 (de) Festverdrahtete Einrichtung zum steuern von Fenstern auf einem Bildschirm
DE3882365T2 (de) Einrichtung zur erzeugung eines cursormusters auf einer anzeige.
FR2554256A1 (fr) Appareil et procede de regeneration d'un tampon de trames fonctionnant a grande vitesse
JPH0131195B2 (de)
EP0202166B1 (de) Virtuelle Bildspeicherschaltung für vielfache Bildfenster
FR2588405A1 (fr) Dispositif d'affichage graphique
CA2294668C (en) Span-based multi-sample z-buffer pixel processor
FR2426294A1 (fr) Generateur de signaux pour console graphique
CA1054274A (fr) Memoire numerique d'image
EP0161175A1 (de) Einrichtung zum Modifizieren des Aspektes der Bildpunkte auf einem Bildschirm eines graphischen Anzeigegerätes
US4500928A (en) Storage apparatus for video data
EP0187077B1 (de) Vektorprozessor
KR940000924A (ko) 디지탈 화상 처리시스템의 영역신호 생성방법 및 장치
BE849340A (fr) Ensemble de commande de visualisation de caracteres alphanumeriques
JPS6067990A (ja) 密度変換機能を有する画情報処理装置
EP0085593A1 (de) Gerät zum Schreiben und Lesen in einem Seitenspeicher eines Kathodenstrahlröhren-Anzeigegeräts
JPS5872990A (ja) カラ−図形発生方式
FR2576124A1 (fr) Generateur de caracteres et utilisation d'un tel generateur dans un systeme de visualisation
JPS62187884A (ja) 回転画像表示装置
CN1049315C (zh) 动态画像的显示装置与方法
FR2811091A1 (fr) Procede et dispositif de rearrangement d'un document electronique
FR2559933A1 (fr) Circuit de gestion memoire pour visualisation sur ecran
SU1403092A1 (ru) Устройство дл вывода графической информации
SU1374272A1 (ru) Устройство дл отображени графической информации на телевизионном индикаторе
RU96100497A (ru) Устройство для считывания изображений

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Designated state(s): AT BE CH DE FR GB IT LI LU NL SE

17P Request for examination filed

Effective date: 19860417

17Q First examination report despatched

Effective date: 19871103

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): AT BE CH DE FR GB IT LI LU NL SE

REF Corresponds to:

Ref document number: 37109

Country of ref document: AT

Date of ref document: 19880915

Kind code of ref document: T

REF Corresponds to:

Ref document number: 3564876

Country of ref document: DE

Date of ref document: 19881013

GBT Gb: translation of ep patent filed (gb section 77(6)(a)/1977)
ITF It: translation for a ep patent filed
PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LU

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 19890228

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed
PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: LU

Payment date: 19900207

Year of fee payment: 6

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: AT

Payment date: 19911230

Year of fee payment: 8

Ref country code: FR

Payment date: 19911230

Year of fee payment: 8

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 19920102

Year of fee payment: 8

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: CH

Payment date: 19920122

Year of fee payment: 8

Ref country code: SE

Payment date: 19920122

Year of fee payment: 8

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: BE

Payment date: 19920129

Year of fee payment: 8

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 19920218

Year of fee payment: 8

ITTA It: last paid annual fee
PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: NL

Payment date: 19920229

Year of fee payment: 8

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Effective date: 19930214

Ref country code: AT

Effective date: 19930214

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SE

Effective date: 19930215

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: CH

Effective date: 19930228

Ref country code: LI

Effective date: 19930228

Ref country code: BE

Effective date: 19930228

BERE Be: lapsed

Owner name: CIE GENERALE D'ELECTRICITE

Effective date: 19930228

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: NL

Effective date: 19930901

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 19930214

NLV4 Nl: lapsed or anulled due to non-payment of the annual fee
PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Effective date: 19931029

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DE

Effective date: 19931103

REG Reference to a national code

Ref country code: FR

Ref legal event code: ST

EUG Se: european patent has lapsed

Ref document number: 85101615.4

Effective date: 19930912