EP0137512A2 - Solarzelle - Google Patents

Solarzelle Download PDF

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Publication number
EP0137512A2
EP0137512A2 EP84112305A EP84112305A EP0137512A2 EP 0137512 A2 EP0137512 A2 EP 0137512A2 EP 84112305 A EP84112305 A EP 84112305A EP 84112305 A EP84112305 A EP 84112305A EP 0137512 A2 EP0137512 A2 EP 0137512A2
Authority
EP
European Patent Office
Prior art keywords
insulation layer
substrate
layer
electric insulation
less
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP84112305A
Other languages
English (en)
French (fr)
Other versions
EP0137512A3 (en
EP0137512B1 (de
Inventor
Kunio Nishimura
Takehisa Nakayama
Kazunori Tsuge
Yoshihisa Tawada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kanegafuchi Chemical Industry Co Ltd
Original Assignee
Kanegafuchi Chemical Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kanegafuchi Chemical Industry Co Ltd filed Critical Kanegafuchi Chemical Industry Co Ltd
Publication of EP0137512A2 publication Critical patent/EP0137512A2/de
Publication of EP0137512A3 publication Critical patent/EP0137512A3/en
Application granted granted Critical
Publication of EP0137512B1 publication Critical patent/EP0137512B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B3/00—Insulators or insulating bodies characterised by the insulating materials; Selection of materials for their insulating or dielectric properties
    • H01B3/02—Insulators or insulating bodies characterised by the insulating materials; Selection of materials for their insulating or dielectric properties mainly consisting of inorganic substances
    • H01B3/12—Insulators or insulating bodies characterised by the insulating materials; Selection of materials for their insulating or dielectric properties mainly consisting of inorganic substances ceramics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
    • H01L31/202—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic Table
    • H01L31/204—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic Table including AIVBIV alloys, e.g. SiGe, SiC
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to an electric insulation thin layer comprising a non-monocrystalline substance, which is deposited on a substrate such as a substrate for a solar cell by means of a plasma CVD method or a spatter method.
  • a substrate in the form of a light transmitting board coated with a transparent electrically conductive film such as ITO/glass or sno2/glass; a metal board made of stainless steel, iron, aluminum, nickel, brass, copper, zinc or an alloy thereof; a metal board treated with other metal; and the like.
  • an electrically conductive board such as a metal board
  • a substrate for a solar cell since a plurality of cells are formed in a pattern on a single substrate and are connected in series, it is required that the substrate is electrically insulated from.the solar cell electrode on the board side. For this reason, an insulation layer is formed on the substrate.
  • the insulation material used for formation of said insulation layer must be heat resistant since the substrate must be subjected to a heat treatment at a temperature of 20° to 350°C in the preparation process of a solar cell. Therefore, a heat-resistant organic polymer such as polyimide resin is usually applied to the substrate by such a method as spin coat or dipping and subjected to a heat treatment for curing and degassing.
  • the higher the semiconductor layer forming temperature the higher the quality of the resulting solar cell.
  • the semiconductor layer forming temperature can raise only up to 250°C, such a temperature being insufficient for obtaining a solar cell of high quality.
  • condensation occurs in the insulation layer during heating to release H 2 0 or to discharge impurities, which lowers the characteristics of the solar cell.
  • the dielectric breakdown voltage is low i.e. only 20 to 30 V/um, and thus the deposit of the amorphous silicon must be considerably thick.
  • An object of the present invention is to provide an electric insulation thin layer deposited on a substrate which has an improved heat resistance and can eliminate the complex heat treatment required for the formation of the insulation layer made of polyimide resin which degrades characteristics of the product.
  • an electric insulation thin layer comprising a non-monocrystalline substance, being deposited on a substrate by means of a plasma CVD method or a spatter method, and having a carbon content of not less than 10 % (% by atom).
  • the insulation layer has an excellent heat resistance, and does not require a complex heat treatment, and can be made thinner.
  • Nonrestrictive examples of the substrates used in the present invention are, for instance, an electrically conductive board such as a metal board of 0.03 to 1 mm in thickness made of stainless steel, iron, aluminum, nickel, brass, copper, zinc, or the like.
  • the insulation layer of the present invention is formed on the substrate by the usual plasma CVD method or spatter method (spatter vapor deposition method).
  • the insulation layer formed by such method contains carbon atoms of not less than 10 %. If the carbon content is less than 10 %, the dielectric breakdown voltage decreases to 50 V/um or less, which means insufficiency in point of insulating performance. If the carbon content is 30 % or more, the dielectric breakdown voltage of the insulation layer further increases to 100 V/ ⁇ m or more, which is preferable for a semiconductor device produced by glow discharge.
  • the insulation layer of the present invention is made of an amouphous substance represented by the formula: (wherein X is at least one member selected from the group consisting of N, 0, P, Cl, Br and Ge; 1 ⁇ x ⁇ 0.1; 0.9 y ⁇ 0.1; and 1 ⁇ x+y ⁇ 0.1).
  • X is at least one member selected from the group consisting of N, 0, P, Cl, Br and Ge; 1 ⁇ x ⁇ 0.1; 0.9 y ⁇ 0.1; and 1 ⁇ x+y ⁇ 0.1.
  • the non-monocrystalline substance of the insulation layer of the present invention is not limited thereto.
  • Typical examples of the amorphous substance represented by the general formula are, for instance, C: H, Si (1-x) C x : H (wherein x is as defined above), Si (1-x-y) C x N y : H (wherein x and y are as defined above), Si (1-x-y) C x F y : H (wherein x and y are as defined above), and the like.
  • the insulation layer of the present invention may or may not contain hydrogen atom. Further, the insulation layer is preferably not doped, but it may be doped with a small amount of boron, phosphorus, or the like.
  • the insulation layer can be formed from a gas mixture by the plasma CVD method or spatter method.
  • the gas mixture preferably comprises a gas of a silicon-containing compound and a gas of a carbon-containing compound, and, if necessary, a diluent gas such as hydrogen gas and an inert gas.
  • silicon-containing compounds are, for instance, silan, polysilane such as disilane or trisilane, organosilicon derivative such as trimethylsilane or halogenated derivative thereof, a mixture thereof, and the like.
  • Examples of the carbon-containing compounds are, for instance, a saturated or unsaturated hydrocarbon such as methane, ethylene, acetylene or propane, a halogenated derivative thereof, an admixture thereof, and the like.
  • the carbon-containing compound can be admixed so that the insulation layer formed contains carbon atoms of not less than 10 %.
  • the thickness of the insulation layer is preferably about 0.5 to 100 um, more preferably about 1 to 10 ⁇ m. If the thickness of the insulation layer is about 0.5 to 100 ⁇ m, there is obtained a dielectric breakdown voltage of 50 V/um or above. If the thickness is not more than 0.5 ⁇ m, pinholes tend to increase, while if it exceeds 100 ⁇ m, peel-off tends to occur owing to internal stress. If the thickness is about 1 to 10 um, there is obtained a dielectric breakdown voltage of about 100 to 1000 V/um, pinholes decrease, and less peel-off takes place.
  • an electric insulation layer 2 of the present invention is formed on a substrate 1, and then a metal film electrode 3 is formed thereon.
  • Fig. 2 is a schematic sectional view showing an embodiment of a vacuum apparatus for depositing the insulation layer on a substrate by the plasma CVD method or spatter method.
  • a process of deposition of the insulation layer of the present invention by the plasma CVD method with the apparatus shown in Fig. 2 is carried out, for example, by placing the substrate 1 on an electrode 6 and evacuating a vacuum container 4 once to 1 X 10- 6 to 10 X 10 -6 Torr. Thereafter, a valve 7 is opened to introduce a gas mixture. While maintain a degree of vacuum of about 1 X 10 -2 to 5 Torr, and a dc voltage or a high frequency voltage with 1 kHz to tens of MHz is applied between the electrodes 5 and 6 to establish a plasma state in the vacuum container 4. This state is maintained for minutes to hours, whereby there is formed on the substrate the insulation layer having a thickness of about 0.5 to 100 ⁇ m, a carbon content of not less than 10 %, and a dielectric breakdown voltage of not less than 50 V/ ⁇ m.
  • a process of deposition of the insulation layer of the present invention by the spatter method is carried out, for example, by placing the substrate 1 on the electrode 6 of the apparatus shown in Fig. 2 and evacuating the vacuum container 4 once to 1 X 10 -6 to 10 X 10 -6 Torr. Thereafter, a gas mixture of an inert gas such as argon gas or helium gas and hydrogen gas, a hydrocarbon gas or a silicon compound gas is fed through the valve 7 into the vacuum container 4.
  • an inert gas such as argon gas or helium gas and hydrogen gas
  • a hydrocarbon gas or a silicon compound gas is fed through the valve 7 into the vacuum container 4.
  • a dc voltage or a high frequency voltage with 1 kHz to tens of MHz is applied between the electrode 5 having a target of SiC, graphite or silicon, and the electrode 6 on which the substrate 1 is placed so as to establish a plasma state in the vacuum container 4.
  • This state is maintained for minutes or hours, whereby there is formed on the substrate 1 the insulation layer 2 having a film thickness of 0.5 to 100 ⁇ m, a carbon content of not less than 10 %, and a dielectric breakdown voltage of not less than 50 V/um.
  • the applied voltage for establishing the plasma state is about 1 to 3 kV
  • the current is 100 to 300 mA
  • the power is about 100 to 300 W.
  • the substrate with the insulation layer and the metal electrode shown in Fig. 1 can be prepared.
  • the metal layer has an appropriate electric conductivity and a thickness of about 500 A to 1 um.
  • Materials of the metal layer are, for instance, aluminum, molybdenum, stainless steel, antimony, chromium, nickrome, and the like.
  • the insulation layer of the present invention does not need to undergo a heat treatment during production as it was needed in the case of use of polyimide resin, and its heat resistance is higher than when polyimide resin is used. Further, since there is no influence from degassing by heating during the production of a solar cell, semiconductor layer formation can be effected at a high temperature and the performance of a solar cell obtained can be improved. Furthermore, as compared with the case where polyimide resin is formed by the spin coat method or dipping method, the formation of the insulation layer by the plasma CVD method or spatter method ensures uniform formation of the layer, so that the yield is improved.
  • the insulation layer of the present invention has a dielectric breakdown voltage of 50 V/um or above, preferably a dielectric breakdown voltage of 100 V/um or above.
  • This example was carried out by the plasma CVD method by using an apparatus similar to the one shown in Fig. 2.
  • a stainless 304 sheet having a thickness of 0.2 mm was employed as the substrate 1 and was placed on the electrode 6.
  • the distance between the electrodes 5 and 6 was 20 mm, and the substrate was heated so that its surface temperature was 250°C.
  • a gas mixture of 2 seem (standard cubic centimeter) of silane and 180 seem of methane deluted with hydrogen to 10 % by volume was introduced through the valve 7, and the degree of vacuum was maintained at l.5 Torr.
  • a high frequency voltage (30 W, 13.56 MHz) was applied between the electrodes 5 and 6 to establish a plasma state in the vacuum container, and the state was maintained for 3 hours, whereby an insulation layer 2 was formed.
  • the insulation layer obtained had a film thickness of 2 ⁇ m and an optical inhibition band width of Eg (Opt) 2.6 eV.
  • the carbon content of the insulation layer measured by the Auger electron spectroanalysis was 45 %.
  • chromium was deposited as the metal electrode 3 on the surface of the insulation layer 2 by the electron beam vapor deposition method so that its thickness was 1000 ⁇ .
  • the dielectric breakdown voltage was found to be about 300 V/um.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Inorganic Chemistry (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Development (AREA)
  • Sustainable Energy (AREA)
  • Photovoltaic Devices (AREA)
  • Chemical Vapour Deposition (AREA)
  • Insulating Bodies (AREA)
  • Physical Vapour Deposition (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
EP84112305A 1983-10-13 1984-10-12 Solarzelle Expired - Lifetime EP0137512B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP58192188A JPS6082669A (ja) 1983-10-13 1983-10-13 基板絶縁材料
JP192188/83 1983-10-13

Publications (3)

Publication Number Publication Date
EP0137512A2 true EP0137512A2 (de) 1985-04-17
EP0137512A3 EP0137512A3 (en) 1987-08-19
EP0137512B1 EP0137512B1 (de) 1991-01-16

Family

ID=16287138

Family Applications (1)

Application Number Title Priority Date Filing Date
EP84112305A Expired - Lifetime EP0137512B1 (de) 1983-10-13 1984-10-12 Solarzelle

Country Status (4)

Country Link
EP (1) EP0137512B1 (de)
JP (1) JPS6082669A (de)
CA (1) CA1268241A (de)
DE (1) DE3483935D1 (de)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1566072A (en) * 1977-03-28 1980-04-30 Tokyo Shibaura Electric Co Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1566072A (en) * 1977-03-28 1980-04-30 Tokyo Shibaura Electric Co Semiconductor device

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN, vol. 8, no. 77 (C-218)[1514], 10th April 1984; & JP-A-59 003 017 (SHARP K.K.) 09-01-1984 *

Also Published As

Publication number Publication date
CA1268241C (en) 1990-04-24
DE3483935D1 (de) 1991-02-21
CA1268241A (en) 1990-04-24
JPH0524990B2 (de) 1993-04-09
EP0137512A3 (en) 1987-08-19
JPS6082669A (ja) 1985-05-10
EP0137512B1 (de) 1991-01-16

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