EP0101895B1 - Dispositif et procédé pour générer la réverbération des signaux tonales analogues - Google Patents

Dispositif et procédé pour générer la réverbération des signaux tonales analogues Download PDF

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Publication number
EP0101895B1
EP0101895B1 EP83107156A EP83107156A EP0101895B1 EP 0101895 B1 EP0101895 B1 EP 0101895B1 EP 83107156 A EP83107156 A EP 83107156A EP 83107156 A EP83107156 A EP 83107156A EP 0101895 B1 EP0101895 B1 EP 0101895B1
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EP
European Patent Office
Prior art keywords
audio data
digital
audio signals
microprocessor
digital audio
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
EP83107156A
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German (de)
English (en)
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EP0101895A3 (en
EP0101895A2 (fr
Inventor
Reinhard Franz
Wilfried Dipl.-Ing. Dittmar
Christian Dipl.-Phys. Scheidegger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
FRANZ, REINHARD
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Individual
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Priority to AT83107156T priority Critical patent/ATE41714T1/de
Publication of EP0101895A2 publication Critical patent/EP0101895A2/fr
Publication of EP0101895A3 publication Critical patent/EP0101895A3/de
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Publication of EP0101895B1 publication Critical patent/EP0101895B1/fr
Expired legal-status Critical Current

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    • G—PHYSICS
    • G10—MUSICAL INSTRUMENTS; ACOUSTICS
    • G10K—SOUND-PRODUCING DEVICES; METHODS OR DEVICES FOR PROTECTING AGAINST, OR FOR DAMPING, NOISE OR OTHER ACOUSTIC WAVES IN GENERAL; ACOUSTICS NOT OTHERWISE PROVIDED FOR
    • G10K15/00—Acoustics not otherwise provided for
    • G10K15/08—Arrangements for producing a reverberation or echo sound
    • G10K15/12—Arrangements for producing a reverberation or echo sound using electronic time-delay networks

Definitions

  • the invention relates to a device for generating Hall for analogue audio signals, with an A / D converter for converting the analogue audio signals into digital audio data, a processing unit for handling the digital audio data, a D / A converter for converting back the treated digital Sound data and a microprocessor, the processing unit having a sound data memory and a 16-bit calculator for additions and multiplications, which are connected to lines for the digital sound data, and a method for operating this device.
  • the desired reverberation is generated in that several all-pass filter calculations are carried out in succession, the sound data which have been stored at different times being added after they have been partially before have been multiplied by a gain factor less than 1. All computing operations must be carried out within one working cycle of the converter. Since the clock times have to be kept short for the flawless reproduction of the analog signals by digital data, but on the other hand the computing processes require a large number of individual steps due to the numerous multiplications, the processing unit has a computer designed as an arithmetic processor with a very high clock frequency and sound data adapted to this frequency Memory on. Both are very complex assemblies, so that the Hall device is very expensive overall.
  • a microprocessor which is connected to a remote control part, the time control of the processing unit, a program memory part and possibly further control devices. It is used to select and influence the reverb program, taking into account the settings of the remote control part.
  • Another known Hall generating device (DE-A 24 31 989) also works with digital sound data, the input AID converter being designed for 14 bits and the output D / A converter for 15 bits in the exemplary embodiment.
  • audio data is added to the current audio data, each of which is reduced by one quantization level. This reduction by one level is easy to do in terms of calculation, but only leads to a linear degression. This is in contrast to the exponential degression, as can be achieved with the help of the all-pass calculations by multiplication by a factor less than 1.
  • the invention has for its object to provide a device of the type described above, which has a much simpler structure for generating the desired Hall and can therefore be manufactured cheaper.
  • the converters are designed for the processing of 12- or 14-bit audio data and that the controlling microprocessor is connected to the lines for the digital audio data, designed for internal 16-bit processing and as a computer is used for all-pass calculations, which carries out multiplications which are restricted to certain values which result from very few steps, such as 0.5, 0.625, 0.75, 0875, by shifting and, if appropriate, adding digital values.
  • Microprocessors have a comparatively low clock frequency. If they are to be used to multiply two digital values, the transducers could be carried out at most one or two multiplications within a work cycle, which is insufficient for the Hall generation. However, if the multiplication is limited to certain values, namely those that result from shifting and possibly adding, that is to say summing or subtracting, these multiplications require only a very few steps.
  • the clock frequency of a conventional microprocessor is therefore sufficient to carry out the required number of multiplications and other arithmetic operations within one working cycle of the converter.
  • the converters are designed for the processing of 12-bit or 14-bit audio data, there is a particularly precise replication of the analog audio signals by digital audio data. Because the microprocessor is designed for internal 16-bit processing, it can also carry out the necessary all-pass calculations with these 12- or 14-bit audio data, which can result in an "overflow" in the addition stage.
  • the microprocessor not only understands control tasks, but also works as a computer, the previously used special computer (arithmetic processor) with a high clock frequency can be omitted.
  • the previously used special computer arithmetic processor
  • the microprocessor for calling up various Hall programs from a program memory is provided with an indexing device which has a reset connection (Reset) which is used to control the first program and an indexing connection (interrupt). , which is used to control the next program.
  • Reset reset connection
  • interrupt indexing connection
  • a squelch circuit for suppressing the smallest amplitudes can be provided in the output circuit of the analog audio signals. This suppresses the output signals as soon as a predetermined level is undershot. This prevents unwanted quantization noise and disturbing quantization distortion.
  • a method for operating this device in which several all-pass filter calculations are carried out by multiplication with an amplification factor of less than 1, is characterized in that all multiplications are carried out with the same amplification factor. In this way, all digital audio data can be treated in the same way, which leads to considerable simplifications.
  • the multiplications should be made with the gain factor 0.75.
  • the gain factor 0.75.
  • this value leads to very appealing Hall results.
  • gain factors such as 0.5 or 0.625 or 0.875 u.
  • a further advantageous measure consists in that the digital sound data occurring successively on the A / D converter is read into the sound data memory under cyclically recurring addresses, the addresses of the sound data to be called up for the individual all-pass filter calculations by means of a switchable base number or auxiliary numbers differing from this are determined by permanently entered subtraction values, the basic number is cyclically advanced up to twice the address number of the sound signal memory and the basic or auxiliary numbers, which are shortened by the first binary digit, are used as addresses.
  • an analog audio signal is fed via an input 1 to an emphasis circuit EM which produces a treble boost and a bass attenuation in order to achieve the A / D at all frequencies of this analog input signal at the maximum amplitudes to be expected in each case. and utilize D / A conversion accuracy.
  • the analog sound signal is then fed to a compressor circuit Co, in which the sound signal is compressed between -30 dB and -50 dB and 10 dB for the purpose of physiological adaptation.
  • a filter circuit F1 follows, which has a six-pole Chebyshev low-pass filter to meet the condition of the sampling theorem (band limitation).
  • a sample and hold circuit SH and an analog-digital converter AD follow.
  • the sample and hold circuit SH ensures that a stable signal is present at the A / D converter input during the A / D conversion.
  • the conversion takes place with a 12 bit module at a clock frequency of 10 kHz, for example.
  • the processing unit 2 includes a microprocessor MP, to which a program memory PM is assigned, and a sound data memory SM.
  • a microprocessor MP to which a program memory PM is assigned
  • a sound data memory SM for example, a 2k x 8 ROM can be used as the program memory, and an 8k x 8 RAM can be used as the sound data memory.
  • a digital-to-analog converter DA is provided on the output side, which in turn is a 12-bit module.
  • a de-emphasis circuit DE follows, which compensates for the effect of the emphasis circuit EM, so that the overall frequency response becomes linear.
  • a filter circuit F2 which has a six-pole Chebyshev low-pass filter at 4 kHz due to the sampling theorem.
  • a squelch circuit SC is provided, to which the output line 3 for the analog audio signal connects.
  • the microprocessor MP has eight data connections D, which are connected to an 8 bit data bus 4. This data bus is connected to the analog-digital converter AD, the digital-analog converter DA, the sound data memory SM and the program memory PM and therefore not only carries program signals but also serves as a sound data line before, during and after processing. There are also twelve address connections A, which are connected to the program memory PM and the sound signal memory SM via a 12-bit address bus 5. The control connections C are connected via a control bus 6 to the sample and hold circuit SH, the analog-to-digital converter AD, the digital-to-analog converter DA, the program memory PM and the sound data memory SM. For reasons of simplification, decoders or interfaces provided are also not shown.
  • the microprocessor MP has an internal 16-bit processing and can be operated, for example, with an internal computing speed of 2 MHz. It also has an indexing device 7 in order to let various Hall programs from the program memory PM take effect. For this purpose, a reset connection R and a relay connection I are provided. If a pulse is applied to the reset connection R, the first program is activated from a program cycle. Each time a pulse is applied to the switching terminal I, the next program in the cycle is switched to.
  • FIG. 2 and 3 explain how the digital sound data obtained in the analog-digital converter AD are treated in the processing unit 2.
  • Fig. 2 shows the calculation process for an all-pass filter.
  • Fig. 3 shows that four such filter calculations are carried out in succession.
  • the delayed signal s2 is generated by multiplying V1 a signal s4 by the factor k.
  • the signal s4 is taken from the sound data memory SM at an address z- n . n indicates by how many converter work cycles the sound signal s3 was previously written into the memory SM.
  • the delayed signal s4 is subjected to an addition A2 with a signal s5, which was generated by multiplying V2 of the signal s3 by the factor -k.
  • the emerging sum signal s6 is then processed further.
  • the gain factor k always has the same value 0.75. This is obtained, for example, by shifting the respective sound data by one binary position and again by one binary position (which corresponds to multiplication by a factor of 0.5) and then summing the two shifted values.
  • the reverberation time can be set between 0.1 and 5 s, so that all sensible reverberation times that are commonly used in music today can be achieved with this system.
  • FIG. 4 schematically shows in the area I those addresses under which sound data can be stored in the memory SM. For example, these addresses go from 00000 to 11111. In area II, this memory is shown again with the same addresses, which has the same addresses.
  • a base number B which has another position in front of the address, is advanced in the direction of the arrow x. By subtraction with fixed values, the base number B is linked to a number of auxiliary numbers H "H 2 and H 3 , which therefore experience the same increment as the base number
  • the base or auxiliary number without the first binary position serves as the address (incomplete decoding)
  • the digital sound data is only retrieved from the actually available memory, regardless of whether the microprocessor addresses the area or II low working capacity of the microprocessor required for address management.
  • the exemplary embodiment works with values such as can be achieved with commercially available microprocessors. As far as newer microprocessors have higher clock frequencies, multiplications can also be carried out, in which the shifting and adding requires more steps or more than four all-pass filter calculations are carried out in succession. The multiplications also include measures in which shifted signals are added not by summation but by subtraction, for example from the original signal.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Acoustics & Sound (AREA)
  • Multimedia (AREA)
  • Analogue/Digital Conversion (AREA)
  • Electrophonic Musical Instruments (AREA)
  • Reverberation, Karaoke And Other Acoustics (AREA)
  • Measurement Of Velocity Or Position Using Acoustic Or Ultrasonic Waves (AREA)

Claims (10)

1. Dispositif pour engendrer la réverbération de signaux tonals analogiques comprenant un convertisseur analogique - numérique prévu pour la conversion des signaux tonals analogiques en données tonales numériques, une unité de traitement des données tonales numériques, un convertisseur numérique-analogique prévu pour la conversion inverse des données tonales numériques traitées et un microprocesseur commandant le dispositif, l'unité de traitement présentant une mémoire pour les données tonales et un calculateur à 16 bits pour des additions et des multiplications qui sont connectés à des lignes pour les données tonales numériques, caractérisé en ce que les convertisseurs (AD, DA) sont conçus pour le traitement de données tonales de 12 ou 14 bits et en ce que le microprocesseur de commande (MP) est connecté aux lignes (4) des données tonales numériques, est conçu pour un traitement interne à 16 bits et est utilisé comme calculateur pour calculs à toutes les fréquences, qui effectue, par décalage, des multiplications de valeurs numériques, qui sont limitées à des valeurs déterminées, ces dernières étant obtenues à partir de très peu d'incréments, comme 0,5; 0,625; 0,75; 0,875, et, éventuellement, des additions de valeurs numériques.
2. Dispositif suivant la revendication 1, caractérisé en ce que le microprocesseur (MP) présente des connexions pour 8 lignes de données tonales.
3. Dispositif suivant l'une ou l'autre des revendications 1 et 2, caractérisé en ce que le microprocesseur (MP) est pourvu, pour l'appel de différents programmes de réverbération depuis une mémoire de programmes (MP), d'un dispositif d'avancement (7) qui présente une connexion de rappel (R) servant à la sélection du premier programme, et une connexion de progression (I) servant à la sélection du programme suivant éventuel.
4. Dispositif suivant l'une des revendications 1 à 3, caractérisé en ce qu'un montage de compresseur (CO) pour l'adaptation physiologique du signal de réverbération est prévu dans le circuit d'entrée des signaux tonals analogiques.
5. Dispositif suivant l'une des revendications 1 à 4, caractérisé en ce qu'un circuit d'exagération (EM) est prévu dans le circuit d'entrée des signaux tonals analogiques et un circuit d'atténuation (DE) compensant cette exagération dans le circuit de sortie des signaux tonals analogiques.
6. Dispositif suivant l'une des revendications 1 à 5, caractérisé en ce qu'un montage de filtre d'arrêt du bruit (SC) est prévu dans le circuit de sortie des signaux tonals analogiques pour la suppression des plus petites amplitudes.
7. Procédé pour la mise en oeuvre d'un dispositif de réverbération du son, dans lequel, par l'utilisation du dispositif suivant l'une des revendications 1 à 6, plusieurs calculs par filtres à toutes les fréquences ont lieu sous la forme d'une multiplication par un facteur d'amplification inférieur à 1, caractérisé en ce que toutes les multiplications se font par le même facteur d'amplification (K).
8. Procédé suivant la revendication 7, caractérisé en ce que les multiplications se font par le facteur d'amplification 0,75.
9. Procédé suivant l'une ou l'autre des revendications 7 et 8, caractérisé en ce que quatre calculs par filtres à toutes les fréquences se font consécutivement.
10. Procédé suivant l'une des revendications 7 à 9, caractérisé en ce que les données tonales numériques apparaissant consécutivement sur le convertisseur analogique-numérique sont lues dans la mémoire de données tonales à des adresses revenant cycliquement, en ce que les adresses des données tonales à appeler pour les différents calculs par filtres à toutes les fréquences sont déterminées par un nombre de base pouvant être avancé, respectivement par des nombres auxiliaires se différenciant de celui-ci par des valeurs soustractives introduites une fois pour toutes, en ce que le nombre de base est avancé cycliquement jusqu'au double du nombre d'adresses de la mémoire de données tonales et en ce que des nombres de base, et respectivement des nombres auxiliaires, tronqués vers le premier bit, sont utilisés comme adresses (décodage incomplet).
EP83107156A 1982-08-27 1983-07-21 Dispositif et procédé pour générer la réverbération des signaux tonales analogues Expired EP0101895B1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AT83107156T ATE41714T1 (de) 1982-08-27 1983-07-21 Vorrichtung zur erzeugung von hall fuer analoge tonsignale und verfahren zu deren betrieb.

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3231925A DE3231925C2 (de) 1982-08-27 1982-08-27 Vorrichtung zur Erzeugung von Hall für analoge Tonsignale und Verfahren zu deren Betrieb
DE3231925 1982-08-27

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EP0101895A2 EP0101895A2 (fr) 1984-03-07
EP0101895A3 EP0101895A3 (en) 1985-06-19
EP0101895B1 true EP0101895B1 (fr) 1989-03-22

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AT (1) ATE41714T1 (fr)
DE (1) DE3231925C2 (fr)

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Publication number Priority date Publication date Assignee Title
DE19733300C2 (de) * 1997-08-01 2001-04-19 Joachim Hecht Verfahren zur elektronischen Nachbildung der Übertragungseigenschaften eines ein Band-Echohall-Gerät umfassendes Klang-Effekt-Gerätes mittels eines programmgesteuerten digitalen oder analogen Signalprozessors

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Publication number Priority date Publication date Assignee Title
DE2431989A1 (de) * 1974-07-03 1976-01-22 Polygram Gmbh Verfahren und einrichtung zur erzeugung kuenstlichen nachhalls

Non-Patent Citations (1)

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Title
STUDIO (Sonderdruck Sept. 80), AUDIO Export Georg NEUMANN & Co., GmbH (LEXIKON 224 DIGITALES HALLGERÄT) *

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Publication number Publication date
EP0101895A3 (en) 1985-06-19
ATE41714T1 (de) 1989-04-15
DE3231925A1 (de) 1984-03-01
EP0101895A2 (fr) 1984-03-07
DE3231925C2 (de) 1986-04-17

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