EA199900275A1 - Способ изготовления и схема соединения элементов платы для интегральной схемы - Google Patents

Способ изготовления и схема соединения элементов платы для интегральной схемы

Info

Publication number
EA199900275A1
EA199900275A1 EA199900275A EA199900275A EA199900275A1 EA 199900275 A1 EA199900275 A1 EA 199900275A1 EA 199900275 A EA199900275 A EA 199900275A EA 199900275 A EA199900275 A EA 199900275A EA 199900275 A1 EA199900275 A1 EA 199900275A1
Authority
EA
Eurasian Patent Office
Prior art keywords
scheme
board
holder
manufacturing
connection
Prior art date
Application number
EA199900275A
Other languages
English (en)
Inventor
Роберт Вильм
Детлеф Худо
Роберт Райнер
Райнер Реттиг
Original Assignee
Пав Кард Гмбх
Сименс АГ
Евс Ригид Филм Гмбх
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Пав Кард Гмбх, Сименс АГ, Евс Ригид Филм Гмбх filed Critical Пав Кард Гмбх
Priority claimed from PCT/EP1997/005197 external-priority patent/WO1998015916A1/de
Publication of EA199900275A1 publication Critical patent/EA199900275A1/ru

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • G06K19/07747—Mounting details of integrated circuit chips at least one of the integrated circuit chips being mounted as a module
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/07773—Antenna details
    • G06K19/07775—Antenna details the antenna being on-chip
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/07773—Antenna details
    • G06K19/07777—Antenna details the antenna being of the inductive type
    • G06K19/07779—Antenna details the antenna being of the inductive type the inductive antenna being a coil
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Credit Cards Or The Like (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

Изобретение относится к способу изготовления и к схеме соединения элементов платы для интегральной схемы, в котором находящийся на держателе полупроводниковый чип вставляют в отверстие в подложке платы с получением соответствующего электрического и механического подсоединения. Согласно изобретению, взамен ранее необходимых средств соединения посредством соединения материалов и/или силовых соединений используется индуктивная связь между держателем и платой для интегральной схемы. Для этой цели на держателе и на плате имеются соответствующие катушки индуктивности для передачи сигнала.Международная заявка была опубликована вместе с отчетом о международном поиске.
EA199900275A 1996-10-09 1997-09-22 Способ изготовления и схема соединения элементов платы для интегральной схемы EA199900275A1 (ru)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE19641650 1996-10-09
DE19645067A DE19645067C2 (de) 1996-10-09 1996-10-31 Verbindungsanordnung zum Herstellen einer Chipkarte
PCT/EP1997/005197 WO1998015916A1 (de) 1996-10-09 1997-09-22 Verfahren und verbindungsanordnung zum herstellen einer chipkarte

Publications (1)

Publication Number Publication Date
EA199900275A1 true EA199900275A1 (ru) 1999-12-29

Family

ID=7808288

Family Applications (1)

Application Number Title Priority Date Filing Date
EA199900275A EA199900275A1 (ru) 1996-10-09 1997-09-22 Способ изготовления и схема соединения элементов платы для интегральной схемы

Country Status (2)

Country Link
DE (2) DE19645067C2 (ru)
EA (1) EA199900275A1 (ru)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19820234A1 (de) * 1998-05-06 1999-11-11 Giesecke & Devrient Gmbh Anordnung zur Übertragung von Signalen zwischen einem Bauelement eines tragbaren Datenträgers und einer dem Bauelement fest zugeordneten Zuleitung
FR2781588B1 (fr) * 1998-07-21 2003-04-25 Solaic Sa Carte sans contact et procede de realisation d'une telle carte
DE10107179C2 (de) * 2001-02-15 2003-02-27 Infineon Technologies Ag Chipkartenmodul
DE10221214A1 (de) * 2002-05-13 2003-11-27 Orga Kartensysteme Gmbh Chipmodul
JP4096315B2 (ja) 2004-08-04 2008-06-04 セイコーエプソン株式会社 表示システム
EP2204882B1 (en) * 2006-01-19 2020-04-22 Murata Manufacturing Co., Ltd. Wireless IC device
US7519328B2 (en) 2006-01-19 2009-04-14 Murata Manufacturing Co., Ltd. Wireless IC device and component for wireless IC device
DE102006021023A1 (de) * 2006-04-28 2007-10-31 Würth Elektronik Rot am See GmbH & Co. KG Baugruppenaufbau
DE102006032821B4 (de) * 2006-07-14 2008-04-10 Mühlbauer Ag Verfahren und Vorrichtung zur Herstellung einer Vielzahl von Chipkarten mit einer klebstofffreien Fixierung der Chipmodule
DE102013102718A1 (de) 2013-03-18 2014-09-18 Infineon Technologies Ag Chipkartenmodulanordnung
DE102018112476B4 (de) 2017-06-02 2022-01-27 Ulrich Lang Verfahren und Fertigungsanlage zum Herstellen eines Foliensubstrats
WO2019224364A1 (de) * 2018-05-24 2019-11-28 Ulrich Lang Verfahren und fertigungsanlage zum herstellen eines foliensubstrats

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL9100176A (nl) * 1991-02-01 1992-03-02 Nedap Nv Antenne met transformator voor contactloze informatieoverdracht vanuit integrated circuit-kaart.
NL9100347A (nl) * 1991-02-26 1992-03-02 Nedap Nv Geintegreerde transformator voor een contactloze identificatiekaart.
DE19500925C2 (de) * 1995-01-16 1999-04-08 Orga Kartensysteme Gmbh Verfahren zur Herstellung einer kontaktlosen Chipkarte
DE19516227C2 (de) * 1995-05-03 2002-02-07 Infineon Technologies Ag Datenträgeranordnung, insbesondere Chipkarte

Also Published As

Publication number Publication date
DE19645067A1 (de) 1998-05-07
DE19645067C2 (de) 2002-01-10
DE59705802D1 (de) 2002-01-24

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