DK132995A - Fremgangsmåde til frembringelse af et udgangssignal, i afhængighed af et eksternt signal og et første referencesignal, samt digitalt faselåskredsløb med en spændingsstyret oscillator - Google Patents
Fremgangsmåde til frembringelse af et udgangssignal, i afhængighed af et eksternt signal og et første referencesignal, samt digitalt faselåskredsløb med en spændingsstyret oscillator Download PDFInfo
- Publication number
- DK132995A DK132995A DK132995A DK132995A DK132995A DK 132995 A DK132995 A DK 132995A DK 132995 A DK132995 A DK 132995A DK 132995 A DK132995 A DK 132995A DK 132995 A DK132995 A DK 132995A
- Authority
- DK
- Denmark
- Prior art keywords
- signal
- dependent
- generating
- well
- controlled oscillator
- Prior art date
Links
- 230000001419 dependent effect Effects 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/14—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted
- H03L7/143—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted by switching the reference signal of the phase-locked loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/181—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a numerical count result being used for locking the loop, the counter counting during fixed time intervals
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0079—Receiver details
- H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DK132995A DK132995A (da) | 1995-11-24 | 1995-11-24 | Fremgangsmåde til frembringelse af et udgangssignal, i afhængighed af et eksternt signal og et første referencesignal, samt digitalt faselåskredsløb med en spændingsstyret oscillator |
| AU10655/97A AU1065597A (en) | 1995-11-24 | 1996-11-22 | A method of generating an output signal in response to an external signal and a first reference signal, as well as digital phase-locked circuit having a voltage-controlled oscillator |
| PCT/DK1996/000481 WO1997020393A1 (fr) | 1995-11-24 | 1996-11-22 | Procede de generation d'un signal de sortie en reponse a un signal externe et a un premier signal de reference ainsi que circuit numerique a verrouillage de phase dote d'un oscillateur commande en tension |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DK132995A DK132995A (da) | 1995-11-24 | 1995-11-24 | Fremgangsmåde til frembringelse af et udgangssignal, i afhængighed af et eksternt signal og et første referencesignal, samt digitalt faselåskredsløb med en spændingsstyret oscillator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DK132995A true DK132995A (da) | 1997-05-25 |
Family
ID=8103642
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DK132995A DK132995A (da) | 1995-11-24 | 1995-11-24 | Fremgangsmåde til frembringelse af et udgangssignal, i afhængighed af et eksternt signal og et første referencesignal, samt digitalt faselåskredsløb med en spændingsstyret oscillator |
Country Status (3)
| Country | Link |
|---|---|
| AU (1) | AU1065597A (fr) |
| DK (1) | DK132995A (fr) |
| WO (1) | WO1997020393A1 (fr) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE10150536B4 (de) * | 2001-10-12 | 2010-04-29 | Infineon Technologies Ag | Vorrichtung zur Rekonstruktion von Daten aus einem empfangenen Datensignal sowie entsprechende Sende- und Empfangsvorrichtung |
| JP2008053832A (ja) | 2006-08-22 | 2008-03-06 | Nec Corp | クロック供給回路およびクロック供給方法 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0530393B1 (fr) * | 1991-09-02 | 1994-12-07 | Siemens Aktiengesellschaft | Méthode et dispositif pour la synchronisation d'un générateur d'horloge d'un système de commutation de communication |
| AU677832B2 (en) * | 1993-06-07 | 1997-05-08 | Alcatel N.V. | Hitless switch arrangement |
| DE4336239A1 (de) * | 1993-10-23 | 1995-04-27 | Sel Alcatel Ag | Schaltungsanordnung für einen Taktgenerator |
| CA2130871C (fr) * | 1993-11-05 | 1999-09-28 | John M. Alder | Circuit a boucle a asservissement de phase a mode de retenue |
-
1995
- 1995-11-24 DK DK132995A patent/DK132995A/da not_active Application Discontinuation
-
1996
- 1996-11-22 WO PCT/DK1996/000481 patent/WO1997020393A1/fr active Application Filing
- 1996-11-22 AU AU10655/97A patent/AU1065597A/en not_active Abandoned
Also Published As
| Publication number | Publication date |
|---|---|
| WO1997020393A1 (fr) | 1997-06-05 |
| AU1065597A (en) | 1997-06-19 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| AHB | Application shelved due to non-payment |