ATE202253T1 - Vorrichtung zur ableitung eines taktsignals aus einem synchronsignal und videoaufzeichnungsgerät ausgestattet mit der vorrichtung - Google Patents

Vorrichtung zur ableitung eines taktsignals aus einem synchronsignal und videoaufzeichnungsgerät ausgestattet mit der vorrichtung

Info

Publication number
ATE202253T1
ATE202253T1 AT96900415T AT96900415T ATE202253T1 AT E202253 T1 ATE202253 T1 AT E202253T1 AT 96900415 T AT96900415 T AT 96900415T AT 96900415 T AT96900415 T AT 96900415T AT E202253 T1 ATE202253 T1 AT E202253T1
Authority
AT
Austria
Prior art keywords
input
output
control signal
preset control
coupled
Prior art date
Application number
AT96900415T
Other languages
English (en)
Inventor
Jurgen Holger Titus Geerlings
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Application granted granted Critical
Publication of ATE202253T1 publication Critical patent/ATE202253T1/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/76—Television signal recording
    • H04N5/91—Television signal processing therefor
    • H04N5/93—Regeneration of the television signal or of selected parts thereof
    • H04N5/95—Time-base error compensation
    • H04N5/956—Time-base error compensation by using a digital memory with independent write-in and read-out clock generators
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/191—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using at least two different signals from the frequency divider or the counter for determining the time difference
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/199—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division with reset of the frequency divider or the counter, e.g. for assuring initial synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/04—Synchronising
    • H04N5/12—Devices in which the synchronising signals are only operative if a phase difference occurs between synchronising and synchronised scanning devices, e.g. flywheel synchronising
    • H04N5/126—Devices in which the synchronising signals are only operative if a phase difference occurs between synchronising and synchronised scanning devices, e.g. flywheel synchronising whereby the synchronisation signal indirectly commands a frequency generator
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/76—Television signal recording
    • H04N5/91—Television signal processing therefor
    • H04N5/93—Regeneration of the television signal or of selected parts thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Signal Processing For Recording (AREA)
  • Synchronizing For Television (AREA)
AT96900415T 1995-02-20 1996-01-29 Vorrichtung zur ableitung eines taktsignals aus einem synchronsignal und videoaufzeichnungsgerät ausgestattet mit der vorrichtung ATE202253T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP95200403 1995-02-20
PCT/IB1996/000078 WO1996026604A2 (en) 1995-02-20 1996-01-29 Device for deriving a clock signal from a synchronizing signal and a video recorder provided with the device

Publications (1)

Publication Number Publication Date
ATE202253T1 true ATE202253T1 (de) 2001-06-15

Family

ID=8220032

Family Applications (1)

Application Number Title Priority Date Filing Date
AT96900415T ATE202253T1 (de) 1995-02-20 1996-01-29 Vorrichtung zur ableitung eines taktsignals aus einem synchronsignal und videoaufzeichnungsgerät ausgestattet mit der vorrichtung

Country Status (6)

Country Link
US (1) US5877640A (de)
EP (1) EP0756799B1 (de)
JP (1) JPH09512415A (de)
AT (1) ATE202253T1 (de)
DE (1) DE69613282T2 (de)
WO (1) WO1996026604A2 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19737326A1 (de) 1997-08-27 1999-03-04 Thomson Brandt Gmbh Verfahren zur Gewinnung von Zeilensynchronisationsinformationen aus einem Videosignal und Vorrichtung zur Durchführung des Verfahrens
WO1999013582A1 (en) * 1997-09-09 1999-03-18 Advanced Fibre Communications, Inc. Perturbation tolerant digital phase-locked loop employing phase-frequency detector
US6556249B1 (en) * 1999-09-07 2003-04-29 Fairchild Semiconductors, Inc. Jitter cancellation technique for video clock recovery circuitry
US6741289B1 (en) 2000-10-31 2004-05-25 Fairchild Semiconductors, Inc. Technique to stabilize the chrominance subcarrier generation in a line-locked digital video system
US6472913B2 (en) * 2001-01-26 2002-10-29 Oki Electric Industry Co., Ltd Method and apparatus for data sampling
FR2831756B1 (fr) * 2001-10-26 2004-01-30 St Microelectronics Sa Procede et dispositif de synchronisation d'un signal de reference sur un signal video
FR2868891B1 (fr) * 2004-04-08 2006-07-07 Eads Telecom Soc Par Actions S Boucle a asservissement de phase a demi-pas
DE102018100692B4 (de) * 2018-01-12 2019-08-22 Infineon Technologies Ag Verfahren zum Überwachen einer Batterie, Überwachungssystem und Überwachungsschaltung

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3573634A (en) * 1968-09-04 1971-04-06 Bell Telephone Labor Inc Timing of regenerator and receiver apparatus for an unrestricted digital communication signal
US3701953A (en) * 1970-11-16 1972-10-31 Telecommunications Technology Digital phase lock loop circuit employing oscillator triggered at zero voltage crossing of input signal
NL8801340A (nl) * 1988-05-25 1989-12-18 Philips Nv Inrichting voor het afleiden van een variabele bemonsteringsfrekwentie.
JPH0292021A (ja) * 1988-09-29 1990-03-30 Mitsubishi Rayon Co Ltd ディジタルｐｌｌ回路
JPH071423B2 (ja) * 1988-12-20 1995-01-11 株式会社山下電子設計 パルス発生回路
DE69216578D1 (de) * 1992-02-11 1997-02-20 Ibm Vorrichtung für Signalverarbeitung
JPH0799446A (ja) * 1993-03-02 1995-04-11 Mitsubishi Electric Corp Ｐｌｌ回路
US5457428A (en) * 1993-12-09 1995-10-10 At&T Corp. Method and apparatus for the reduction of time interval error in a phase locked loop circuit

Also Published As

Publication number Publication date
US5877640A (en) 1999-03-02
WO1996026604A3 (en) 1996-10-31
WO1996026604A2 (en) 1996-08-29
DE69613282D1 (de) 2001-07-19
EP0756799A1 (de) 1997-02-05
DE69613282T2 (de) 2002-05-02
EP0756799B1 (de) 2001-06-13
JPH09512415A (ja) 1997-12-09

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Legal Events

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