DE69940237D1 - Harzverkapselte elektronische Bauteile und deren Herstellungsverfahren - Google Patents

Harzverkapselte elektronische Bauteile und deren Herstellungsverfahren

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Publication number
DE69940237D1
DE69940237D1 DE69940237T DE69940237T DE69940237D1 DE 69940237 D1 DE69940237 D1 DE 69940237D1 DE 69940237 T DE69940237 T DE 69940237T DE 69940237 T DE69940237 T DE 69940237T DE 69940237 D1 DE69940237 D1 DE 69940237D1
Authority
DE
Germany
Prior art keywords
resin
electronic components
manufacturing processes
encapsulated electronic
encapsulated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69940237T
Other languages
English (en)
Inventor
Isamu Fujimoto
Tohru Yaso
Tetsuo Tatsumi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Application granted granted Critical
Publication of DE69940237D1 publication Critical patent/DE69940237D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
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    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
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    • H01L2924/3511—Warping
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/403—Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
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    • Y10T29/00—Metal working
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    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49146—Assembling to base an electrical component, e.g., capacitor, etc. with encapsulating, e.g., potting, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49169—Assembling electrical component directly to terminal or elongated conductor
    • Y10T29/49171—Assembling electrical component directly to terminal or elongated conductor with encapsulating
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49789—Obtaining plural product pieces from unitary workpiece
DE69940237T 1998-07-02 1999-06-24 Harzverkapselte elektronische Bauteile und deren Herstellungsverfahren Expired - Lifetime DE69940237D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP18724298 1998-07-02
JP35295198A JP3391282B2 (ja) 1998-07-02 1998-12-11 電子部品の製造方法

Publications (1)

Publication Number Publication Date
DE69940237D1 true DE69940237D1 (de) 2009-02-26

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US (2) US6243945B1 (de)
EP (1) EP0969502B1 (de)
JP (1) JP3391282B2 (de)
DE (1) DE69940237D1 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6523254B1 (en) * 2000-04-19 2003-02-25 Micron Technology, Inc. Method for gate blocking x-outs during a molding process
US20020130444A1 (en) * 2001-03-15 2002-09-19 Gareth Hougham Post cure hardening of siloxane stamps for microcontact printing
JP3789410B2 (ja) * 2002-08-29 2006-06-21 富士通メディアデバイス株式会社 表面実装型電子部品モジュールおよびその製造方法
US20070289129A1 (en) * 2004-08-06 2007-12-20 Wing Kenneth E Selective Encapsulation of Electronic Components
JP2007207921A (ja) * 2006-01-31 2007-08-16 Stanley Electric Co Ltd 表面実装型光半導体デバイスの製造方法
JP5113627B2 (ja) * 2007-06-12 2013-01-09 日本電波工業株式会社 電子部品及びその製造方法
JP2009109472A (ja) * 2007-10-10 2009-05-21 Epson Toyocom Corp 電子デバイス及び電子モジュール並びにこれらの製造方法
WO2009047542A1 (en) * 2007-10-12 2009-04-16 Ineos Fluor Holdings Limited Heat transfer compositions
TW200941599A (en) * 2008-03-18 2009-10-01 Lingsen Precision Ind Ltd Method for fabricating a stack-type IC chip package
US7666711B2 (en) * 2008-05-27 2010-02-23 Stats Chippac, Ltd. Semiconductor device and method of forming double-sided through vias in saw streets
JP5317548B2 (ja) * 2008-06-23 2013-10-16 スパンション エルエルシー 半導体装置、及びその製造方法
TWI483418B (zh) * 2009-04-09 2015-05-01 Lextar Electronics Corp 發光二極體封裝方法
US8362368B2 (en) * 2009-04-27 2013-01-29 Ultrasource, Inc. Method and apparatus for an improved filled via
DE102014202830B4 (de) * 2014-02-17 2022-10-06 Robert Bosch Gmbh Herstellungsverfahren für einen mit transparenten Platten bestückten Wafer
KR102368069B1 (ko) * 2014-10-22 2022-02-25 삼성전자주식회사 반도체 패키지의 제조 방법

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3263304A (en) * 1963-01-03 1966-08-02 Western Electric Co Method for mounting electrical circuitry
FR2490917A1 (fr) * 1980-09-02 1982-03-26 Motorola Semiconducteurs Boitier pour circuit electrique et procede de fabrication
JPH0229406B2 (ja) * 1982-06-25 1990-06-29 Sanei Kinzoku Kogyo Kk Ichimainogenbanyorikibantobotantoodojiniseikeisuruhohooyobisochi
US4846032A (en) * 1988-05-31 1989-07-11 American Telephone And Telegraph Company Device and method for separating printed circuit boards
JPH0393119A (ja) * 1989-09-05 1991-04-18 Fujitsu Ltd キーボードの製造方法
JP2994219B2 (ja) * 1994-05-24 1999-12-27 シャープ株式会社 半導体デバイスの製造方法
JP3541491B2 (ja) * 1994-06-22 2004-07-14 セイコーエプソン株式会社 電子部品
JPH0883866A (ja) * 1994-07-15 1996-03-26 Shinko Electric Ind Co Ltd 片面樹脂封止型半導体装置の製造方法及びこれに用いるキャリアフレーム
US5640746A (en) * 1995-08-15 1997-06-24 Motorola, Inc. Method of hermetically encapsulating a crystal oscillator using a thermoplastic shell
US5612513A (en) * 1995-09-19 1997-03-18 Micron Communications, Inc. Article and method of manufacturing an enclosed electrical circuit using an encapsulant
US5776798A (en) * 1996-09-04 1998-07-07 Motorola, Inc. Semiconductor package and method thereof

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US6243945B1 (en) 2001-06-12
US20010006456A1 (en) 2001-07-05
JP3391282B2 (ja) 2003-03-31
EP0969502A2 (de) 2000-01-05
EP0969502B1 (de) 2009-01-07
EP0969502A3 (de) 2006-03-01
JP2000082714A (ja) 2000-03-21

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