DE69938084D1 - Datenprozessor mit geschützten nichtmaskierbaren Unterbrechungen - Google Patents
Datenprozessor mit geschützten nichtmaskierbaren UnterbrechungenInfo
- Publication number
- DE69938084D1 DE69938084D1 DE69938084T DE69938084T DE69938084D1 DE 69938084 D1 DE69938084 D1 DE 69938084D1 DE 69938084 T DE69938084 T DE 69938084T DE 69938084 T DE69938084 T DE 69938084T DE 69938084 D1 DE69938084 D1 DE 69938084D1
- Authority
- DE
- Germany
- Prior art keywords
- data processor
- maskable interrupts
- protected non
- protected
- maskable
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
- G06F9/3875—Pipelining a single stage, e.g. superpipelining
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US17364 | 1998-02-02 | ||
US09/017,364 US5987559A (en) | 1998-02-02 | 1998-02-02 | Data processor with protected non-maskable interrupt |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69938084D1 true DE69938084D1 (de) | 2008-03-20 |
DE69938084T2 DE69938084T2 (de) | 2009-01-29 |
Family
ID=21782166
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69938084T Expired - Lifetime DE69938084T2 (de) | 1998-02-02 | 1999-02-02 | Datenprozessor mit geschützten nichtmaskierbaren Unterbrechungen |
Country Status (4)
Country | Link |
---|---|
US (1) | US5987559A (de) |
EP (1) | EP0933704B1 (de) |
JP (1) | JPH11288378A (de) |
DE (1) | DE69938084T2 (de) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102005009874B4 (de) * | 2005-03-01 | 2010-04-15 | Infineon Technologies Ag | Verfahren zur Signalisierung eines Zustandes oder Ereignisses |
JP2015072624A (ja) * | 2013-10-03 | 2015-04-16 | 株式会社エルイーテック | Nmi制御 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2968289B2 (ja) * | 1989-11-08 | 1999-10-25 | 株式会社リコー | 中央演算処理装置 |
JPH04306735A (ja) * | 1991-04-04 | 1992-10-29 | Toshiba Corp | 非同期割込み禁止機構 |
US5551033A (en) * | 1991-05-17 | 1996-08-27 | Zenith Data Systems Corporation | Apparatus for maintaining one interrupt mask register in conformity with another in a manner invisible to an executing program |
EP0545581B1 (de) * | 1991-12-06 | 1999-04-21 | National Semiconductor Corporation | Integriertes Datenverarbeitungssystem mit CPU-Kern und unabhängigem parallelen, digitalen Signalprozessormodul |
JP3171925B2 (ja) * | 1992-04-30 | 2001-06-04 | 株式会社日立製作所 | データ処理装置 |
JPH06230979A (ja) * | 1992-06-17 | 1994-08-19 | Cyrix Corp | 改良されたシステム管理方法および装置 |
US5659759A (en) * | 1992-09-21 | 1997-08-19 | Kabushiki Kaisha Toshiba | Data processing device having improved interrupt controller to process interrupts of different priority levels |
US5758170A (en) * | 1995-03-20 | 1998-05-26 | Dell Usa, L.P. | System for preventing corruption during CPU reset |
JPH08305585A (ja) * | 1995-05-11 | 1996-11-22 | Matsushita Electric Ind Co Ltd | 割込制御装置 |
JP2625402B2 (ja) * | 1995-05-24 | 1997-07-02 | 日本電気株式会社 | マイクロプロセッサ |
US5764999A (en) * | 1995-10-10 | 1998-06-09 | Cyrix Corporation | Enhanced system management mode with nesting |
US5875342A (en) * | 1997-06-03 | 1999-02-23 | International Business Machines Corporation | User programmable interrupt mask with timeout |
-
1998
- 1998-02-02 US US09/017,364 patent/US5987559A/en not_active Expired - Lifetime
-
1999
- 1999-02-02 JP JP11062118A patent/JPH11288378A/ja active Pending
- 1999-02-02 EP EP99200273A patent/EP0933704B1/de not_active Expired - Lifetime
- 1999-02-02 DE DE69938084T patent/DE69938084T2/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE69938084T2 (de) | 2009-01-29 |
US5987559A (en) | 1999-11-16 |
EP0933704A2 (de) | 1999-08-04 |
EP0933704A3 (de) | 2002-12-04 |
JPH11288378A (ja) | 1999-10-19 |
EP0933704B1 (de) | 2008-02-06 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |