DE69934048D1 - Hochspannungstolerante und -angepaßte Treiberschaltung - Google Patents
Hochspannungstolerante und -angepaßte TreiberschaltungInfo
- Publication number
- DE69934048D1 DE69934048D1 DE69934048T DE69934048T DE69934048D1 DE 69934048 D1 DE69934048 D1 DE 69934048D1 DE 69934048 T DE69934048 T DE 69934048T DE 69934048 T DE69934048 T DE 69934048T DE 69934048 D1 DE69934048 D1 DE 69934048D1
- Authority
- DE
- Germany
- Prior art keywords
- high voltage
- driver circuit
- voltage tolerant
- matched driver
- matched
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00315—Modifications for increasing the reliability for protection in field-effect transistor circuits
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
- G06F13/4072—Drivers or receivers
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- General Physics & Mathematics (AREA)
- Logic Circuits (AREA)
- Electronic Switches (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/084,670 US6118301A (en) | 1998-05-26 | 1998-05-26 | High voltage tolerant and compliant driver circuit |
US84670 | 1998-05-26 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69934048D1 true DE69934048D1 (de) | 2007-01-04 |
DE69934048T2 DE69934048T2 (de) | 2007-05-10 |
Family
ID=22186474
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69934048T Expired - Lifetime DE69934048T2 (de) | 1998-05-26 | 1999-05-17 | Hochspannungstolerante und -angepaßte Treiberschaltung |
Country Status (4)
Country | Link |
---|---|
US (1) | US6118301A (de) |
EP (1) | EP0961206B1 (de) |
JP (2) | JP3478992B2 (de) |
DE (1) | DE69934048T2 (de) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6373282B1 (en) | 1999-08-20 | 2002-04-16 | Ati International Srl | Single gate oxide cascaded output buffer stage and method |
US6326832B1 (en) * | 2000-03-29 | 2001-12-04 | National Semiconductor Corporation | Full swing power down buffer with multiple power supply isolation for standard CMOS processes |
US6580291B1 (en) | 2000-12-18 | 2003-06-17 | Cypress Semiconductor Corp. | High voltage output buffer using low voltage transistors |
US6611046B2 (en) | 2001-06-05 | 2003-08-26 | 3M Innovative Properties Company | Flexible polyimide circuits having predetermined via angles |
GB0121013D0 (en) * | 2001-08-30 | 2001-10-24 | Micron Technology Inc | Combined dynamic logic gate and level shifter and method employing same |
TWI275247B (en) * | 2001-12-07 | 2007-03-01 | Brilliance Semiconductor Inc | Variable voltage tolerant input/output circuit |
FR2839829B1 (fr) * | 2002-05-14 | 2005-07-08 | St Microelectronics Sa | Buffer pour circuit a contact |
US7199612B2 (en) * | 2002-08-12 | 2007-04-03 | Broadcom Corporation | Method and circuit for reducing HCI stress |
US6856168B2 (en) * | 2002-08-12 | 2005-02-15 | Broadcom Corporation | 5 Volt tolerant IO scheme using low-voltage devices |
JP2004222119A (ja) * | 2003-01-17 | 2004-08-05 | Renesas Technology Corp | 半導体集積回路 |
US7982499B2 (en) * | 2006-07-25 | 2011-07-19 | Atmel Corporation | Capacitive node isolation for electrostatic discharge circuit |
JP4557046B2 (ja) * | 2008-05-19 | 2010-10-06 | ソニー株式会社 | 出力バッファ回路および集積回路 |
US8344760B2 (en) | 2008-07-17 | 2013-01-01 | Ati Technologies Ulc | Input/output buffer circuit |
JP5190335B2 (ja) * | 2008-11-28 | 2013-04-24 | パナソニック株式会社 | トレラントバッファ回路及びインターフェース |
GB2469636B8 (en) * | 2009-04-20 | 2017-08-02 | Advanced Risc Mach Ltd | Protecting lower voltage domain devices during operation in a higher voltage domain |
JP5842720B2 (ja) * | 2012-04-19 | 2016-01-13 | 株式会社ソシオネクスト | 出力回路 |
JP2022116735A (ja) * | 2021-01-29 | 2022-08-10 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US11575259B2 (en) * | 2021-07-08 | 2023-02-07 | Qualcomm Incorporated | Interface circuit with robust electrostatic discharge |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3079515B2 (ja) * | 1991-01-29 | 2000-08-21 | 株式会社東芝 | ゲ−トアレイ装置及び入力回路及び出力回路及び降圧回路 |
US5160855A (en) * | 1991-06-28 | 1992-11-03 | Digital Equipment Corporation | Floating-well CMOS output driver |
US5387826A (en) * | 1993-02-10 | 1995-02-07 | National Semiconductor Corporation | Overvoltage protection against charge leakage in an output driver |
JP3311133B2 (ja) * | 1994-02-16 | 2002-08-05 | 株式会社東芝 | 出力回路 |
US5614859A (en) * | 1995-08-04 | 1997-03-25 | Micron Technology, Inc. | Two stage voltage level translator |
US5574389A (en) * | 1995-08-09 | 1996-11-12 | Taiwan Semiconductor Manufacturing Company Ltd. | CMOS 3.3 volt output buffer with 5 volt protection |
KR100405814B1 (ko) * | 1995-09-21 | 2004-03-26 | 마츠시타 덴끼 산교 가부시키가이샤 | 출력회로 |
US5952847A (en) * | 1996-06-25 | 1999-09-14 | Actel Corporation | Multiple logic family compatible output driver |
US5917361A (en) * | 1996-12-20 | 1999-06-29 | Vlsi, Technology | Method and apparatus for reducing noise in an output buffer |
-
1998
- 1998-05-26 US US09/084,670 patent/US6118301A/en not_active Expired - Lifetime
-
1999
- 1999-05-17 EP EP99303807A patent/EP0961206B1/de not_active Expired - Lifetime
- 1999-05-17 DE DE69934048T patent/DE69934048T2/de not_active Expired - Lifetime
- 1999-05-26 JP JP14619499A patent/JP3478992B2/ja not_active Expired - Fee Related
-
2001
- 2001-09-06 JP JP2001270596A patent/JP3538400B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US6118301A (en) | 2000-09-12 |
JP3478992B2 (ja) | 2003-12-15 |
EP0961206A2 (de) | 1999-12-01 |
JP2000138578A (ja) | 2000-05-16 |
DE69934048T2 (de) | 2007-05-10 |
EP0961206B1 (de) | 2006-11-22 |
EP0961206A3 (de) | 2001-11-21 |
JP3538400B2 (ja) | 2004-06-14 |
JP2002141793A (ja) | 2002-05-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |