DE69900293D1 - Taktgenerator mit digitalen Phasenregelkreisen - Google Patents
Taktgenerator mit digitalen PhasenregelkreisenInfo
- Publication number
- DE69900293D1 DE69900293D1 DE69900293T DE69900293T DE69900293D1 DE 69900293 D1 DE69900293 D1 DE 69900293D1 DE 69900293 T DE69900293 T DE 69900293T DE 69900293 T DE69900293 T DE 69900293T DE 69900293 D1 DE69900293 D1 DE 69900293D1
- Authority
- DE
- Germany
- Prior art keywords
- clock generator
- phase locked
- digital phase
- locked loops
- loops
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/07—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9807118A FR2779588B1 (fr) | 1998-06-05 | 1998-06-05 | Dispositif de generation d'un signal de commande dephase par rapport a un signal de synchronisation externe |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69900293D1 true DE69900293D1 (de) | 2001-10-25 |
DE69900293T2 DE69900293T2 (de) | 2002-04-18 |
Family
ID=9527077
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69900293T Expired - Fee Related DE69900293T2 (de) | 1998-06-05 | 1999-06-04 | Taktgenerator mit digitalen Phasenregelkreisen |
Country Status (4)
Country | Link |
---|---|
US (1) | US6198321B1 (de) |
EP (1) | EP0963045B1 (de) |
DE (1) | DE69900293T2 (de) |
FR (1) | FR2779588B1 (de) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2008118659A1 (en) * | 2007-03-23 | 2008-10-02 | Rambus Inc. | Hardware and method to test phase linearity of phase synthesizer |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4019153A (en) * | 1974-10-07 | 1977-04-19 | The Charles Stark Draper Laboratory, Inc. | Digital phase-locked loop filter |
US4633193A (en) * | 1985-12-02 | 1986-12-30 | At&T Bell Laboratories | Clock circuit synchronizer using a frequency synthesizer controlled by a frequency estimator |
US4694326A (en) * | 1986-03-28 | 1987-09-15 | Rca Corporation | Digital phase locked loop stabilization circuitry including a secondary digital phase locked loop which may be locked at an indeterminate frequency |
US5295079A (en) * | 1991-07-18 | 1994-03-15 | National Semiconductor Corporation | Digital testing techniques for very high frequency phase-locked loops |
US5477181A (en) * | 1994-10-13 | 1995-12-19 | National Semiconductor Corporation | Programmable multiphase clock divider |
US5477177A (en) * | 1995-01-11 | 1995-12-19 | National Semiconductor Corporation | Phase error processor circuit with a comparator input swapping technique |
US5502711A (en) * | 1995-03-20 | 1996-03-26 | International Business Machines Corporation | Dual digital phase locked loop clock channel for optical recording |
-
1998
- 1998-06-05 FR FR9807118A patent/FR2779588B1/fr not_active Expired - Fee Related
-
1999
- 1999-06-04 US US09/326,438 patent/US6198321B1/en not_active Expired - Fee Related
- 1999-06-04 DE DE69900293T patent/DE69900293T2/de not_active Expired - Fee Related
- 1999-06-04 EP EP99401346A patent/EP0963045B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
FR2779588A1 (fr) | 1999-12-10 |
EP0963045B1 (de) | 2001-09-19 |
EP0963045A1 (de) | 1999-12-08 |
US6198321B1 (en) | 2001-03-06 |
FR2779588B1 (fr) | 2000-07-13 |
DE69900293T2 (de) | 2002-04-18 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
FI954624A0 (fi) | Digitaalinen vaihelukittu sisäsilmukka | |
ATE467949T1 (de) | Phasenregelkreisschaltung | |
GB9828196D0 (en) | Phase locked loop clock extraction | |
DE60008203D1 (de) | Phasenregelschleife mit digital gesteuertem frequenzvervielfachendem Oszillator | |
DE69613660T2 (de) | Energiesparende Phasenregelkreisschaltung | |
DE69829014D1 (de) | Phasenregelschleife | |
DE69415378D1 (de) | Digitaler Phasenregelkreis | |
DE69629147D1 (de) | Digitaler Phasenregelkreis | |
DE69737801D1 (de) | Phasenregelkreisschaltung | |
DE69510577T2 (de) | Phasenregelkreis | |
DE69629545D1 (de) | Digitale Phasenregelkreisschaltung | |
DE59702398D1 (de) | Phasenregelkreis mit Technologiekompensation | |
DE69811171T2 (de) | Oszillator für Phasenregelkreis | |
DE69512121D1 (de) | Phasenregelkreisschaltung | |
DE60114733D1 (de) | Phasenregelschleife mit verringerter Verriegelungszeit | |
DE69832239D1 (de) | Phasenregelkreisschaltung | |
DE69519663T2 (de) | Voll-Integrierbarer Phasenregelkreis mit geringem Jitter | |
FI982780A0 (fi) | Varauspumppuun perustuva vaihelukittu silmukka | |
DE69900293T2 (de) | Taktgenerator mit digitalen Phasenregelkreisen | |
FR2770704B1 (fr) | Circuit verrouille en phase | |
GB2330258B (en) | Phase locked loop circuit | |
DE69817897D1 (de) | Phasenregelkreis | |
GB9930812D0 (en) | Delayed locked loop clock generator using delay-pulse-delay | |
DE69934281D1 (de) | Phasenregelkreis mit wählbarer Antwort | |
DE69835118D1 (de) | Integrierte Schaltung mit Phasenregelschleife |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |