DE69900258T2 - Verfahren zum Mehrpegelprogrammieren von einem nichtflüchtigen Halbleiterspeicher - Google Patents

Verfahren zum Mehrpegelprogrammieren von einem nichtflüchtigen Halbleiterspeicher

Info

Publication number
DE69900258T2
DE69900258T2 DE69900258T DE69900258T DE69900258T2 DE 69900258 T2 DE69900258 T2 DE 69900258T2 DE 69900258 T DE69900258 T DE 69900258T DE 69900258 T DE69900258 T DE 69900258T DE 69900258 T2 DE69900258 T2 DE 69900258T2
Authority
DE
Germany
Prior art keywords
semiconductor memory
volatile semiconductor
level programming
programming
level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69900258T
Other languages
English (en)
Other versions
DE69900258D1 (de
Inventor
Yasuaki Hirano
Yoshiji Ohta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Publication of DE69900258D1 publication Critical patent/DE69900258D1/de
Application granted granted Critical
Publication of DE69900258T2 publication Critical patent/DE69900258T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G11C11/5635—Erasing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0491—Virtual ground arrays
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/562—Multilevel memory programming aspects
    • G11C2211/5621—Multilevel programming verification

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
DE69900258T 1998-06-30 1999-04-23 Verfahren zum Mehrpegelprogrammieren von einem nichtflüchtigen Halbleiterspeicher Expired - Lifetime DE69900258T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18401598A JP2000021185A (ja) 1998-06-30 1998-06-30 不揮発性半導体メモリの書込み方法

Publications (2)

Publication Number Publication Date
DE69900258D1 DE69900258D1 (de) 2001-10-11
DE69900258T2 true DE69900258T2 (de) 2002-06-27

Family

ID=16145854

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69900258T Expired - Lifetime DE69900258T2 (de) 1998-06-30 1999-04-23 Verfahren zum Mehrpegelprogrammieren von einem nichtflüchtigen Halbleiterspeicher

Country Status (4)

Country Link
US (1) US6172912B1 (de)
EP (1) EP0969478B1 (de)
JP (1) JP2000021185A (de)
DE (1) DE69900258T2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6219276B1 (en) * 2000-02-25 2001-04-17 Advanced Micro Devices, Inc. Multilevel cell programming
US6466476B1 (en) 2001-01-18 2002-10-15 Multi Level Memory Technology Data coding for multi-bit-per-cell memories having variable numbers of bits per memory cell
JP4907011B2 (ja) * 2001-04-27 2012-03-28 株式会社半導体エネルギー研究所 不揮発性メモリとその駆動方法、及び半導体装置
KR100390959B1 (ko) * 2001-06-29 2003-07-12 주식회사 하이닉스반도체 센싱회로를 이용한 멀티레벨 플래시 메모리 프로그램/리드방법
TW565889B (en) * 2002-07-02 2003-12-11 Winbond Electronics Corp Method for batchwise etching semiconductor
US7272040B2 (en) * 2005-04-29 2007-09-18 Infineon Technologies Ag Multi-bit virtual-ground NAND memory device
US7760552B2 (en) * 2006-03-31 2010-07-20 Semiconductor Energy Laboratory Co., Ltd. Verification method for nonvolatile semiconductor memory device
KR100818717B1 (ko) * 2007-01-18 2008-04-02 삼성전자주식회사 비휘발성 반도체 메모리 장치 및 상기 비휘발성 반도체메모리 장치의 프로그램 방법
US11527291B2 (en) 2020-02-14 2022-12-13 Micron Technology, Inc Performing a program operation based on a high voltage pulse to securely erase data

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5218569A (en) * 1991-02-08 1993-06-08 Banks Gerald J Electrically alterable non-volatile memory with n-bits per memory cell
JP3095918B2 (ja) 1992-12-07 2000-10-10 新日本製鐵株式会社 不揮発性半導体メモリ
JPH08316343A (ja) * 1995-05-17 1996-11-29 Toshiba Corp 不揮発性半導体記憶装置
KR0157342B1 (ko) 1995-06-09 1998-12-01 김광호 불휘발성 반도체 메모리의 전압 센싱 방법
KR0172408B1 (ko) * 1995-12-11 1999-03-30 김광호 다수상태 불휘발성 반도체 메모리 및 그의 구동방법
US5737265A (en) * 1995-12-14 1998-04-07 Intel Corporation Programming flash memory using data stream analysis
JP3740212B2 (ja) * 1996-05-01 2006-02-01 株式会社ルネサステクノロジ 不揮発性半導体記憶装置
US5754469A (en) * 1996-06-14 1998-05-19 Macronix International Co., Ltd. Page mode floating gate memory device storing multiple bits per cell
EP0907954B1 (de) * 1996-06-24 2000-06-07 Advanced Micro Devices, Inc. Verfahren für einen merhfachen, bits pro zelle flash eeprom, speicher mit seitenprogrammierungsmodus und leseverfahren
JP3062730B2 (ja) * 1996-07-10 2000-07-12 株式会社日立製作所 不揮発性半導体記憶装置および書込み方法

Also Published As

Publication number Publication date
EP0969478B1 (de) 2001-09-05
DE69900258D1 (de) 2001-10-11
JP2000021185A (ja) 2000-01-21
EP0969478A1 (de) 2000-01-05
US6172912B1 (en) 2001-01-09

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