DE69810426D1 - Takttreibervorrichtung mit programmierbaren Ausgangseingensschaften - Google Patents

Takttreibervorrichtung mit programmierbaren Ausgangseingensschaften

Info

Publication number
DE69810426D1
DE69810426D1 DE69810426T DE69810426T DE69810426D1 DE 69810426 D1 DE69810426 D1 DE 69810426D1 DE 69810426 T DE69810426 T DE 69810426T DE 69810426 T DE69810426 T DE 69810426T DE 69810426 D1 DE69810426 D1 DE 69810426D1
Authority
DE
Germany
Prior art keywords
driver device
clock driver
output features
programmable output
programmable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69810426T
Other languages
English (en)
Other versions
DE69810426T2 (de
Inventor
Charles S Stephens
Raymond A Davis
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Avago Technologies International Sales Pte Ltd
Original Assignee
Agilent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agilent Technologies Inc filed Critical Agilent Technologies Inc
Publication of DE69810426D1 publication Critical patent/DE69810426D1/de
Application granted granted Critical
Publication of DE69810426T2 publication Critical patent/DE69810426T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018585—Coupling arrangements; Interface arrangements using field effect transistors only programmable

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Manipulation Of Pulses (AREA)
DE1998610426 1997-10-29 1998-10-15 Takttreibervorrichtung mit programmierbaren Ausgangseingensschaften Expired - Fee Related DE69810426T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US96040897A 1997-10-29 1997-10-29
US8697398A 1998-05-29 1998-05-29

Publications (2)

Publication Number Publication Date
DE69810426D1 true DE69810426D1 (de) 2003-02-06
DE69810426T2 DE69810426T2 (de) 2003-09-25

Family

ID=26775370

Family Applications (1)

Application Number Title Priority Date Filing Date
DE1998610426 Expired - Fee Related DE69810426T2 (de) 1997-10-29 1998-10-15 Takttreibervorrichtung mit programmierbaren Ausgangseingensschaften

Country Status (3)

Country Link
EP (1) EP0913937B1 (de)
JP (1) JPH11242531A (de)
DE (1) DE69810426T2 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2787640A1 (de) * 2013-04-05 2014-10-08 Technische Universität Darmstadt Programmierbare Weitbereichs-Arbeitszykluskorrektur
JP7099841B2 (ja) * 2018-03-23 2022-07-12 ルネサスエレクトロニクス株式会社 半導体装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03117020A (ja) * 1989-09-28 1991-05-17 Nec Corp 集積回路の出力バッファ回路
JPH04306017A (ja) * 1991-03-13 1992-10-28 Mitsubishi Electric Corp 参照電位発生回路
JPH0555891A (ja) * 1991-08-28 1993-03-05 Seiko Epson Corp 半導体装置及び電子機器
US5220216A (en) * 1992-01-02 1993-06-15 Woo Ann K Programmable driving power of a CMOS gate

Also Published As

Publication number Publication date
JPH11242531A (ja) 1999-09-07
EP0913937A3 (de) 2000-02-02
EP0913937B1 (de) 2003-01-02
DE69810426T2 (de) 2003-09-25
EP0913937A2 (de) 1999-05-06

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: AVAGO TECHNOLOGIES GENERAL IP ( SINGAPORE) PTE. LT

8339 Ceased/non-payment of the annual fee