DE69724751D1 - Verbesserungen an oder bezüglich elektronischen Systemen - Google Patents

Verbesserungen an oder bezüglich elektronischen Systemen

Info

Publication number
DE69724751D1
DE69724751D1 DE69724751T DE69724751T DE69724751D1 DE 69724751 D1 DE69724751 D1 DE 69724751D1 DE 69724751 T DE69724751 T DE 69724751T DE 69724751 T DE69724751 T DE 69724751T DE 69724751 D1 DE69724751 D1 DE 69724751D1
Authority
DE
Germany
Prior art keywords
electronic systems
regarding electronic
regarding
systems
electronic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69724751T
Other languages
English (en)
Other versions
DE69724751T2 (de
Inventor
Wilbur C Vogley
Robert L Ward
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of DE69724751D1 publication Critical patent/DE69724751D1/de
Application granted granted Critical
Publication of DE69724751T2 publication Critical patent/DE69724751T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/06Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • G06F13/4239Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with asynchronous protocol
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/06Address interface arrangements, e.g. address buffers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/12Group selection circuits, e.g. for memory block selection, chip selection, array selection

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Dram (AREA)
  • Memory System (AREA)
  • Static Random-Access Memory (AREA)
DE69724751T 1996-12-19 1997-12-19 Verbesserungen an oder bezüglich elektronischen Systemen Expired - Lifetime DE69724751T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US3244696P 1996-12-19 1996-12-19
US32446P 1996-12-19

Publications (2)

Publication Number Publication Date
DE69724751D1 true DE69724751D1 (de) 2003-10-16
DE69724751T2 DE69724751T2 (de) 2004-07-01

Family

ID=21865004

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69724751T Expired - Lifetime DE69724751T2 (de) 1996-12-19 1997-12-19 Verbesserungen an oder bezüglich elektronischen Systemen

Country Status (4)

Country Link
EP (1) EP0849737B1 (de)
JP (1) JPH10301888A (de)
KR (1) KR100647189B1 (de)
DE (1) DE69724751T2 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5953215A (en) * 1997-12-01 1999-09-14 Karabatsos; Chris Apparatus and method for improving computer memory speed and capacity
US6142830A (en) * 1998-03-06 2000-11-07 Siemens Aktiengesellschaft Signaling improvement using extended transmission lines on high speed DIMMS
JP4205553B2 (ja) 2003-11-06 2009-01-07 エルピーダメモリ株式会社 メモリモジュール及びメモリシステム
KR101618150B1 (ko) 2011-02-15 2016-05-19 삼성전자 주식회사 버블발생장치 및 이를 갖춘 세탁기

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5216637A (en) * 1990-12-07 1993-06-01 Trw Inc. Hierarchical busing architecture for a very large semiconductor memory
DE4423567C2 (de) * 1994-07-05 1998-09-03 Siemens Ag Modulkarte

Also Published As

Publication number Publication date
EP0849737A2 (de) 1998-06-24
DE69724751T2 (de) 2004-07-01
EP0849737B1 (de) 2003-09-10
KR19980064029A (ko) 1998-10-07
JPH10301888A (ja) 1998-11-13
KR100647189B1 (ko) 2007-08-16
EP0849737A3 (de) 1999-04-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition