DE69706639T2 - Datenprozessor und Verfahren zur Datenverarbeitung - Google Patents
Datenprozessor und Verfahren zur DatenverarbeitungInfo
- Publication number
- DE69706639T2 DE69706639T2 DE69706639T DE69706639T DE69706639T2 DE 69706639 T2 DE69706639 T2 DE 69706639T2 DE 69706639 T DE69706639 T DE 69706639T DE 69706639 T DE69706639 T DE 69706639T DE 69706639 T2 DE69706639 T2 DE 69706639T2
- Authority
- DE
- Germany
- Prior art keywords
- data
- processing method
- data processing
- processor
- data processor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6569—Implementation on processors, e.g. DSPs, or software implementations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
- H03M13/4107—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing add, compare, select [ACS] operations
Landscapes
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP34296396 | 1996-12-24 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69706639D1 DE69706639D1 (de) | 2001-10-18 |
DE69706639T2 true DE69706639T2 (de) | 2002-02-07 |
Family
ID=18357872
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69706639T Expired - Lifetime DE69706639T2 (de) | 1996-12-24 | 1997-12-22 | Datenprozessor und Verfahren zur Datenverarbeitung |
Country Status (3)
Country | Link |
---|---|
US (1) | US6125153A (de) |
EP (1) | EP0851591B1 (de) |
DE (1) | DE69706639T2 (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3338374B2 (ja) | 1997-06-30 | 2002-10-28 | 松下電器産業株式会社 | 演算処理方法および装置 |
US6848074B2 (en) * | 2001-06-21 | 2005-01-25 | Arc International | Method and apparatus for implementing a single cycle operation in a data processing system |
WO2019234903A1 (ja) * | 2018-06-08 | 2019-12-12 | 日本電気株式会社 | 復号装置、復号方法、及び非一時的なコンピュータ可読媒体 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FI82871C (fi) * | 1989-05-17 | 1991-04-25 | Nokia Mobira Oy | Kretsanordning foer foerverkligande av en viterbi-algoritm. |
US5295142A (en) * | 1989-07-18 | 1994-03-15 | Sony Corporation | Viterbi decoder |
US5327440A (en) * | 1991-10-15 | 1994-07-05 | International Business Machines Corporation | Viterbi trellis coding methods and apparatus for a direct access storage device |
US5432803A (en) * | 1992-04-30 | 1995-07-11 | Novatel Communications, Ltd. | Maximum likelihood convolutional decoder |
JP2792812B2 (ja) * | 1993-07-02 | 1998-09-03 | 沖電気工業株式会社 | 最尤系列推定器 |
JPH07245567A (ja) * | 1994-03-02 | 1995-09-19 | Fujitsu Ltd | ビタビ復号演算装置 |
US5530707A (en) * | 1994-03-09 | 1996-06-25 | At&T Corp. | Area-efficient decoders for rate-k/n convolutional codes and other high rate trellis codes |
JPH08287608A (ja) * | 1995-04-18 | 1996-11-01 | Fujitsu Ltd | 情報再生装置及び最尤等化検出方法 |
JP3316724B2 (ja) * | 1995-06-13 | 2002-08-19 | 日本電気エンジニアリング株式会社 | ビタビ復号器 |
JP3171772B2 (ja) * | 1995-08-23 | 2001-06-04 | 沖電気工業株式会社 | ビタビ復号方法及びビタビ復号装置 |
JP3233847B2 (ja) * | 1996-02-23 | 2001-12-04 | 沖電気工業株式会社 | ビタビ復号方法及びビタビ復号回路 |
JPH09232972A (ja) * | 1996-02-28 | 1997-09-05 | Sony Corp | ビタビ復号器 |
FR2745448B1 (fr) * | 1996-02-28 | 1998-05-15 | Sgs Thomson Microelectronics | Structure integree d'un decodeur convolutif de viterbi |
KR100195745B1 (ko) * | 1996-08-23 | 1999-06-15 | 전주범 | 비터비 복호화기의 가산 비교 선택 장치 |
-
1997
- 1997-12-22 EP EP97122665A patent/EP0851591B1/de not_active Expired - Lifetime
- 1997-12-22 DE DE69706639T patent/DE69706639T2/de not_active Expired - Lifetime
- 1997-12-23 US US08/997,378 patent/US6125153A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE69706639D1 (de) | 2001-10-18 |
EP0851591A1 (de) | 1998-07-01 |
US6125153A (en) | 2000-09-26 |
EP0851591B1 (de) | 2001-09-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: PANASONIC CORP., KADOMA, OSAKA, JP |