DE69637225D1 - BiCMOS-Bauteil und Verfahren zur Herstellung desselben - Google Patents

BiCMOS-Bauteil und Verfahren zur Herstellung desselben

Info

Publication number
DE69637225D1
DE69637225D1 DE69637225T DE69637225T DE69637225D1 DE 69637225 D1 DE69637225 D1 DE 69637225D1 DE 69637225 T DE69637225 T DE 69637225T DE 69637225 T DE69637225 T DE 69637225T DE 69637225 D1 DE69637225 D1 DE 69637225D1
Authority
DE
Germany
Prior art keywords
making same
bicmos device
bicmos
making
same
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69637225T
Other languages
English (en)
Other versions
DE69637225T2 (de
Inventor
Taizo Fujii
Takehiro Hirai
Sugao Fujinaga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of DE69637225D1 publication Critical patent/DE69637225D1/de
Application granted granted Critical
Publication of DE69637225T2 publication Critical patent/DE69637225T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8248—Combination of bipolar and field-effect technology
    • H01L21/8249—Bipolar and MOS technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0623—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE69637225T 1995-04-07 1996-04-09 BiCMOS-Bauteil und Verfahren zur Herstellung desselben Expired - Lifetime DE69637225T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP8224395 1995-04-07
JP8224395 1995-04-07

Publications (2)

Publication Number Publication Date
DE69637225D1 true DE69637225D1 (de) 2007-10-11
DE69637225T2 DE69637225T2 (de) 2008-01-03

Family

ID=13768987

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69637225T Expired - Lifetime DE69637225T2 (de) 1995-04-07 1996-04-09 BiCMOS-Bauteil und Verfahren zur Herstellung desselben

Country Status (3)

Country Link
US (1) US5851863A (de)
EP (1) EP0736898B1 (de)
DE (1) DE69637225T2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2762137B1 (fr) * 1997-04-15 1999-07-02 Sgs Thomson Microelectronics Procede de fabrication d'un transistor bipolaire et de son contact d'emetteur
US6102528A (en) * 1997-10-17 2000-08-15 Xerox Corporation Drive transistor for an ink jet printhead
US6268250B1 (en) * 1999-05-14 2001-07-31 Micron Technology, Inc. Efficient fabrication process for dual well type structures
US6303420B1 (en) * 1999-08-13 2001-10-16 Texas Instruments Incorporated Integrated bipolar junction transistor for mixed signal circuits
US6399465B1 (en) * 2000-02-24 2002-06-04 United Microelectronics Corp. Method for forming a triple well structure
US8859361B1 (en) * 2013-04-05 2014-10-14 Alpha And Omega Semiconductor Incorporated Symmetric blocking transient voltage suppressor (TVS) using bipolar NPN and PNP transistor base snatch
JP6641958B2 (ja) * 2015-12-11 2020-02-05 セイコーエプソン株式会社 半導体装置及びその製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4480375A (en) * 1982-12-09 1984-11-06 International Business Machines Corporation Simple process for making complementary transistors
JPS63175463A (ja) * 1987-01-14 1988-07-19 Nec Corp バイｍｏｓ集積回路の製造方法
JPH03129874A (ja) * 1989-10-16 1991-06-03 Nec Yamagata Ltd Ｂｉ―ＣＭＯＳ集積回路
JPH03165522A (ja) * 1989-11-25 1991-07-17 Seiko Epson Corp 半導体装置
JPH0613557A (ja) * 1992-06-24 1994-01-21 Nec Corp 半導体装置の製造方法
US5342794A (en) * 1992-09-10 1994-08-30 Vlsi Technology, Inc. Method for forming laterally graded deposit-type emitter for bipolar transistor
US5422508A (en) * 1992-09-21 1995-06-06 Siliconix Incorporated BiCDMOS structure

Also Published As

Publication number Publication date
EP0736898A3 (de) 1999-11-03
EP0736898A2 (de) 1996-10-09
US5851863A (en) 1998-12-22
EP0736898B1 (de) 2007-08-29
DE69637225T2 (de) 2008-01-03

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: PANASONIC CORP., KADOMA, OSAKA, JP