DE69625961D1 - Schaltung zur Bestimmung des Justierbits - Google Patents

Schaltung zur Bestimmung des Justierbits

Info

Publication number
DE69625961D1
DE69625961D1 DE69625961T DE69625961T DE69625961D1 DE 69625961 D1 DE69625961 D1 DE 69625961D1 DE 69625961 T DE69625961 T DE 69625961T DE 69625961 T DE69625961 T DE 69625961T DE 69625961 D1 DE69625961 D1 DE 69625961D1
Authority
DE
Germany
Prior art keywords
determining
circuit
adjustment bit
bit
adjustment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69625961T
Other languages
English (en)
Other versions
DE69625961T2 (de
Inventor
Masayuki Ishiguro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Semiconductor Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE69625961D1 publication Critical patent/DE69625961D1/de
Application granted granted Critical
Publication of DE69625961T2 publication Critical patent/DE69625961T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4902—Pulse width modulation; Pulse position modulation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • G11B20/1426—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/46—Conversion to or from run-length codes, i.e. by representing the number of consecutive digits, or groups of digits, of the same kind by a code word and a digit indicative of that kind
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
    • H04L25/4908—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Theoretical Computer Science (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
DE69625961T 1995-06-30 1996-03-29 Schaltung zur Bestimmung des Justierbits Expired - Fee Related DE69625961T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7166612A JPH0917129A (ja) 1995-06-30 1995-06-30 ライトデータの調整ビット決定方法、調整ビット決定回路、ライトデータ作成回路及びディスク装置

Publications (2)

Publication Number Publication Date
DE69625961D1 true DE69625961D1 (de) 2003-03-06
DE69625961T2 DE69625961T2 (de) 2003-08-07

Family

ID=15834543

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69633529T Expired - Fee Related DE69633529T2 (de) 1995-06-30 1996-03-29 Bestimmung des Justierbits
DE69625961T Expired - Fee Related DE69625961T2 (de) 1995-06-30 1996-03-29 Schaltung zur Bestimmung des Justierbits

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE69633529T Expired - Fee Related DE69633529T2 (de) 1995-06-30 1996-03-29 Bestimmung des Justierbits

Country Status (5)

Country Link
US (2) US5682153A (de)
EP (2) EP0751518B1 (de)
JP (1) JPH0917129A (de)
KR (1) KR100269907B1 (de)
DE (2) DE69633529T2 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10134519A (ja) * 1996-10-31 1998-05-22 Sony Corp 変調装置および復調装置とそれらの方法
US5963152A (en) * 1997-12-09 1999-10-05 International Business Machines Corporation Resolving block method for synchronization correction in run-length limited codes
US5969649A (en) * 1998-02-17 1999-10-19 International Business Machines Corporation Run length limited encoding/decoding with robust resync
US6741738B2 (en) * 2000-03-13 2004-05-25 Tms, Inc. Method of optical mark recognition
JP2002100134A (ja) * 2000-09-21 2002-04-05 Toshiba Corp 垂直磁気記録方式の磁気ディスク装置
KR100724354B1 (ko) * 2001-03-24 2007-06-04 엘지전자 주식회사 디지털 데이터 변조 방법 및 그 장치
CN100456640C (zh) 2001-06-07 2009-01-28 日本胜利株式会社 调制和解调方法与装置、信息传输方法和装置
TWI260611B (en) * 2003-12-26 2006-08-21 Ind Tech Res Inst Encoding method of recording media

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62283719A (ja) * 1986-05-31 1987-12-09 Nec Home Electronics Ltd Ｅｆｍ変調器
EP0310041A3 (de) * 1987-09-28 1990-08-22 Nec Home Electronics, Ltd. 8-Bit zu 9-Bit Codeumsetzungssystem und 8/9-Konverter
JPH01181330A (ja) 1988-01-14 1989-07-19 Nec Home Electron Ltd ８／９符号変換方式
JP2974678B2 (ja) * 1988-06-23 1999-11-10 ソニー株式会社 データ誤り検出方式
US4988999A (en) * 1989-04-12 1991-01-29 Nippon Hoso Kyokai Digital modulation method
NL9002772A (nl) * 1990-09-21 1992-04-16 Philips Nv Inrichting voor het optekenen van een digitaal informatiesignaal in een registratiedrager.
JPH04225625A (ja) * 1990-12-27 1992-08-14 Sony Corp ディジタル変調方式
JP3083011B2 (ja) * 1992-12-28 2000-09-04 キヤノン株式会社 データ記録方法及び装置
KR100310217B1 (ko) * 1993-12-21 2002-06-20 이데이 노부유끼 디지탈데이타처리장치및그방법
JP2786810B2 (ja) 1994-03-16 1998-08-13 株式会社東芝 光ディスクおよびその信号記録装置ならびに信号再生装置

Also Published As

Publication number Publication date
EP1168332A3 (de) 2002-04-10
US5682153A (en) 1997-10-28
USRE38719E1 (en) 2005-04-05
JPH0917129A (ja) 1997-01-17
KR970007703A (ko) 1997-02-21
EP0751518A2 (de) 1997-01-02
DE69633529D1 (de) 2004-11-04
EP1168332B1 (de) 2004-09-29
EP1168332A2 (de) 2002-01-02
DE69625961T2 (de) 2003-08-07
KR100269907B1 (ko) 2000-10-16
DE69633529T2 (de) 2005-03-03
EP0751518B1 (de) 2003-01-29
EP0751518A3 (de) 1999-06-09

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: FUJITSU MICROELECTRONICS LTD., TOKYO, JP

8339 Ceased/non-payment of the annual fee