DE69619316D1 - Verbesserte Maskierungsverfahren während der Herstellung einer Halbleiteranordnung - Google Patents

Verbesserte Maskierungsverfahren während der Herstellung einer Halbleiteranordnung

Info

Publication number
DE69619316D1
DE69619316D1 DE69619316T DE69619316T DE69619316D1 DE 69619316 D1 DE69619316 D1 DE 69619316D1 DE 69619316 T DE69619316 T DE 69619316T DE 69619316 T DE69619316 T DE 69619316T DE 69619316 D1 DE69619316 D1 DE 69619316D1
Authority
DE
Germany
Prior art keywords
manufacture
semiconductor device
process during
masking process
improved masking
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69619316T
Other languages
English (en)
Other versions
DE69619316T2 (de
Inventor
Kumar Shiralagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Application granted granted Critical
Publication of DE69619316D1 publication Critical patent/DE69619316D1/de
Publication of DE69619316T2 publication Critical patent/DE69619316T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0332—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their composition, e.g. multilayer masks, materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02387—Group 13/15 materials
    • H01L21/02389—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02387—Group 13/15 materials
    • H01L21/02395—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/0242—Crystalline insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02529—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/02543—Phosphides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/02546—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639—Preparation of substrate for selective deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02647—Lateral overgrowth
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Recrystallisation Techniques (AREA)
DE69619316T 1995-08-07 1996-07-25 Verbesserte Maskierungsverfahren während der Herstellung einer Halbleiteranordnung Expired - Fee Related DE69619316T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/511,772 US5730798A (en) 1995-08-07 1995-08-07 Masking methods during semiconductor device fabrication

Publications (2)

Publication Number Publication Date
DE69619316D1 true DE69619316D1 (de) 2002-03-28
DE69619316T2 DE69619316T2 (de) 2002-07-18

Family

ID=24036372

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69619316T Expired - Fee Related DE69619316T2 (de) 1995-08-07 1996-07-25 Verbesserte Maskierungsverfahren während der Herstellung einer Halbleiteranordnung

Country Status (4)

Country Link
US (2) US5730798A (de)
EP (1) EP0758143B1 (de)
JP (1) JP3152877B2 (de)
DE (1) DE69619316T2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5709744A (en) * 1996-03-01 1998-01-20 Motorola Masking methods during semiconductor device fabrication
FR2761811B1 (fr) * 1997-04-03 1999-07-16 France Telecom Technologie sans gravure pour integration de composants
US6001722A (en) * 1997-06-20 1999-12-14 Motorola, Inc. Selective metallization/deposition for semiconductor devices
US20110163323A1 (en) * 1997-10-30 2011-07-07 Sumitomo Electric Industires, Ltd. GaN SINGLE CRYSTAL SUBSTRATE AND METHOD OF MAKING THE SAME
CN100344004C (zh) * 1997-10-30 2007-10-17 住友电气工业株式会社 GaN单晶衬底及其制造方法
US6091085A (en) * 1998-02-19 2000-07-18 Agilent Technologies, Inc. GaN LEDs with improved output coupling efficiency
DE19922167A1 (de) * 1999-05-12 2000-11-16 Wacker Siltronic Halbleitermat Verfahren zur Herstellung einer Halbleiterscheibe
US20010019135A1 (en) * 1999-06-28 2001-09-06 Tsui Raymond K. Sparse-carrier devices and method of fabrication
US7440666B2 (en) * 2004-02-25 2008-10-21 Avago Technologies Fiber Ip (Singapore) Pte. Ltd. Buried heterostucture device having integrated waveguide grating fabricated by single step MOCVD

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1428769A (en) * 1972-02-28 1976-03-17 Nippon Sheet Glass Co Ltd Surface protective coating on an article
US4472459A (en) * 1983-10-24 1984-09-18 Rca Corporation Local oxidation of silicon substrate using LPCVD silicon nitride
US5571471A (en) * 1984-08-08 1996-11-05 3D Systems, Inc. Method of production of three-dimensional objects by stereolithography
US4717681A (en) * 1986-05-19 1988-01-05 Texas Instruments Incorporated Method of making a heterojunction bipolar transistor with SIPOS
JPH06124892A (ja) * 1992-09-28 1994-05-06 Hikari Gijutsu Kenkyu Kaihatsu Kk ＧａＡｓ酸化膜のパターニング方法
US5451425A (en) * 1994-09-13 1995-09-19 The United States Of America As Represented By The Secretary Of The Army Process for setting the frequency of a silicon microresonator

Also Published As

Publication number Publication date
JP3152877B2 (ja) 2001-04-03
US5730798A (en) 1998-03-24
JPH0950962A (ja) 1997-02-18
EP0758143B1 (de) 2002-02-20
EP0758143A1 (de) 1997-02-12
DE69619316T2 (de) 2002-07-18
US5846609A (en) 1998-12-08

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Legal Events

Date Code Title Description
8328 Change in the person/name/address of the agent

Free format text: SCHUMACHER & WILLSAU, PATENTANWALTSSOZIETAET, 80335 MUENCHEN

8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee