DE69616465T2 - Cachespeicher mit Datenvorausladung - Google Patents
Cachespeicher mit DatenvorausladungInfo
- Publication number
- DE69616465T2 DE69616465T2 DE69616465T DE69616465T DE69616465T2 DE 69616465 T2 DE69616465 T2 DE 69616465T2 DE 69616465 T DE69616465 T DE 69616465T DE 69616465 T DE69616465 T DE 69616465T DE 69616465 T2 DE69616465 T2 DE 69616465T2
- Authority
- DE
- Germany
- Prior art keywords
- cache memory
- data preload
- preload
- data
- cache
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000036316 preload Effects 0.000 title 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0893—Caches characterised by their organisation or structure
- G06F12/0897—Caches characterised by their organisation or structure with two or more cache hierarchy levels
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3824—Operand accessing
- G06F9/383—Operand prefetching
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/60—Details of cache memory
- G06F2212/6022—Using a prefetch buffer or dedicated prefetch cache
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/60—Details of cache memory
- G06F2212/6026—Prefetching based on access pattern detection, e.g. stride based prefetch
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/519,031 US5664147A (en) | 1995-08-24 | 1995-08-24 | System and method that progressively prefetches additional lines to a distributed stream buffer as the sequentiality of the memory accessing is demonstrated |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69616465D1 DE69616465D1 (de) | 2001-12-06 |
DE69616465T2 true DE69616465T2 (de) | 2002-05-02 |
Family
ID=24066484
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69616465T Expired - Lifetime DE69616465T2 (de) | 1995-08-24 | 1996-07-24 | Cachespeicher mit Datenvorausladung |
Country Status (5)
Country | Link |
---|---|
US (1) | US5664147A (de) |
EP (1) | EP0762288B1 (de) |
JP (1) | JP3541998B2 (de) |
KR (1) | KR100240911B1 (de) |
DE (1) | DE69616465T2 (de) |
Families Citing this family (40)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2290395B (en) | 1994-06-10 | 1997-05-28 | Advanced Risc Mach Ltd | Interoperability with multiple instruction sets |
US5897654A (en) * | 1995-02-10 | 1999-04-27 | International Business Machines Corporation | Method and system for efficiently fetching from cache during a cache fill operation |
US5809529A (en) * | 1995-08-23 | 1998-09-15 | International Business Machines Corporation | Prefetching of committed instructions from a memory to an instruction cache |
US6085291A (en) * | 1995-11-06 | 2000-07-04 | International Business Machines Corporation | System and method for selectively controlling fetching and prefetching of data to a processor |
US5829028A (en) * | 1996-05-06 | 1998-10-27 | Advanced Micro Devices, Inc. | Data cache configured to store data in a use-once manner |
US5805839A (en) * | 1996-07-02 | 1998-09-08 | Advanced Micro Devices, Inc. | Efficient technique for implementing broadcasts on a system of hierarchical buses |
US5796605A (en) * | 1996-07-02 | 1998-08-18 | Sun Microsystems, Inc. | Extended symmetrical multiprocessor address mapping |
US6092149A (en) * | 1997-05-28 | 2000-07-18 | Western Digital Corporation | Disk drive cache system using a dynamic priority sequential stream of data segments continuously adapted according to prefetched sequential random, and repeating types of accesses |
US5958040A (en) * | 1997-05-28 | 1999-09-28 | Digital Equipment Corporation | Adaptive stream buffers |
US5909694A (en) * | 1997-06-12 | 1999-06-01 | International Business Machines Corporation | Multiway associative external microprocessor cache |
US6260116B1 (en) | 1998-07-01 | 2001-07-10 | International Business Machines Corporation | System and method for prefetching data |
EP1133731A1 (de) * | 1998-11-25 | 2001-09-19 | Fujitsu Siemens Computers GmbH | Cache-speichereinrichtung |
JP3506024B2 (ja) * | 1998-12-10 | 2004-03-15 | 日本電気株式会社 | 情報処理装置 |
US6542968B1 (en) * | 1999-01-15 | 2003-04-01 | Hewlett-Packard Company | System and method for managing data in an I/O cache |
US6473864B1 (en) * | 1999-07-29 | 2002-10-29 | Picoturbo, Inc. | Method and system for providing power management to a processing system |
US6446167B1 (en) * | 1999-11-08 | 2002-09-03 | International Business Machines Corporation | Cache prefetching of L2 and L3 |
US6535962B1 (en) * | 1999-11-08 | 2003-03-18 | International Business Machines Corporation | System and method for prefetching data using a hardware prefetch mechanism |
US6567894B1 (en) * | 1999-12-08 | 2003-05-20 | International Business Machines Corporation | Method and apparatus to prefetch sequential pages in a multi-stream environment |
US6901500B1 (en) * | 2000-07-28 | 2005-05-31 | Silicon Graphics, Inc. | Method and apparatus for prefetching information and storing the information in a stream buffer |
US6662273B1 (en) | 2000-09-29 | 2003-12-09 | Intel Corporation | Least critical used replacement with critical cache |
US6782469B1 (en) | 2000-09-29 | 2004-08-24 | Intel Corporation | Runtime critical load/data ordering |
US6760816B1 (en) * | 2000-09-29 | 2004-07-06 | Intel Corporation | Critical loads guided data prefetching |
US7039766B1 (en) * | 2000-10-12 | 2006-05-02 | International Business Machines Corporation | Prescheduling sequential data prefetches in a preexisting LRU cache |
US6883066B2 (en) * | 2001-09-14 | 2005-04-19 | Seagate Technology Llc | Method and system for cache management algorithm selection |
US7093077B2 (en) | 2001-11-30 | 2006-08-15 | Intel Corporation | Method and apparatus for next-line prefetching from a predicted memory address |
US6675280B2 (en) | 2001-11-30 | 2004-01-06 | Intel Corporation | Method and apparatus for identifying candidate virtual addresses in a content-aware prefetcher |
US6954840B2 (en) | 2001-11-30 | 2005-10-11 | Intel Corporation | Method and apparatus for content-aware prefetching |
US7260704B2 (en) | 2001-11-30 | 2007-08-21 | Intel Corporation | Method and apparatus for reinforcing a prefetch chain |
US7162588B2 (en) | 2002-08-23 | 2007-01-09 | Koninklijke Philips Electronics N.V. | Processor prefetch to match memory bus protocol characteristics |
US7190367B2 (en) * | 2003-03-25 | 2007-03-13 | Mitsubishi Electric Research Laboratories, Inc. | Method, apparatus, and system for rendering using a progressive cache |
US7055005B2 (en) * | 2003-04-07 | 2006-05-30 | Hewlett-Packard Development Company, L.P. | Methods and apparatus used to retrieve data from memory into a RAM controller before such data is requested |
US7051162B2 (en) * | 2003-04-07 | 2006-05-23 | Hewlett-Packard Development Company, L.P. | Methods and apparatus used to retrieve data from memory before such data is requested |
US7487296B1 (en) * | 2004-02-19 | 2009-02-03 | Sun Microsystems, Inc. | Multi-stride prefetcher with a recurring prefetch table |
US20070186050A1 (en) * | 2006-02-03 | 2007-08-09 | International Business Machines Corporation | Self prefetching L2 cache mechanism for data lines |
WO2007099582A1 (ja) * | 2006-02-28 | 2007-09-07 | Fujitsu Limited | プリフェッチ制御装置 |
US20070239939A1 (en) * | 2006-04-06 | 2007-10-11 | Goodman Benjiman L | Apparatus for Performing Stream Prefetch within a Multiprocessor System |
US8756404B2 (en) | 2006-12-11 | 2014-06-17 | International Business Machines Corporation | Cascaded delayed float/vector execution pipeline |
US7917701B2 (en) * | 2007-03-12 | 2011-03-29 | Arm Limited | Cache circuitry, data processing apparatus and method for prefetching data by selecting one of a first prefetch linefill operation and a second prefetch linefill operation |
US9390018B2 (en) * | 2012-08-17 | 2016-07-12 | Advanced Micro Devices, Inc. | Data cache prefetch hints |
US9348753B2 (en) | 2012-10-10 | 2016-05-24 | Advanced Micro Devices, Inc. | Controlling prefetch aggressiveness based on thrash events |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4980823A (en) * | 1987-06-22 | 1990-12-25 | International Business Machines Corporation | Sequential prefetching with deconfirmation |
US5146578A (en) * | 1989-05-01 | 1992-09-08 | Zenith Data Systems Corporation | Method of varying the amount of data prefetched to a cache memory in dependence on the history of data requests |
US5317718A (en) * | 1990-03-27 | 1994-05-31 | Digital Equipment Corporation | Data processing system and method with prefetch buffers |
DE69128741T2 (de) * | 1990-05-18 | 1998-07-16 | Koninkl Philips Electronics Nv | Mehrstufiger Befehlscachespeicher und Verwendungsverfahren dafür |
SE469402B (sv) * | 1991-05-02 | 1993-06-28 | Swedish Inst Of Computer Scien | Foerfarande foer att haemta data till ett cache-minne |
JP2881049B2 (ja) * | 1991-07-30 | 1999-04-12 | 株式会社日立製作所 | プリフェッチバッファ |
US5353419A (en) * | 1992-01-09 | 1994-10-04 | Trustees Of The University Of Pennsylvania | Memory-side driven anticipatory instruction transfer interface with processor-side instruction selection |
US5371870A (en) * | 1992-04-24 | 1994-12-06 | Digital Equipment Corporation | Stream buffer memory having a multiple-entry address history buffer for detecting sequential reads to initiate prefetching |
IL102083A (en) * | 1992-06-03 | 1997-01-10 | Laser Ind Ltd | Laser beam delivery system |
US5381539A (en) * | 1992-06-04 | 1995-01-10 | Emc Corporation | System and method for dynamically controlling cache management |
US5410653A (en) * | 1992-06-16 | 1995-04-25 | International Business Machines Corporation | Asynchronous read-ahead disk caching using multiple disk I/O processes and dynamically variable prefetch length |
US5566324A (en) * | 1992-12-24 | 1996-10-15 | Ncr Corporation | Computer apparatus including a main memory prefetch cache and method of operation thereof |
EP0795820B1 (de) * | 1993-01-21 | 2000-03-01 | Advanced Micro Devices Inc. | Kombinierte Speicheranordnung mit einem Vorausholungspuffer und einem Cachespeicher und Verfahren zur Befehlenversorgung für eine Prozessoreinheit, das diese Anordnung benutzt. |
US5586294A (en) * | 1993-03-26 | 1996-12-17 | Digital Equipment Corporation | Method for increased performance from a memory stream buffer by eliminating read-modify-write streams from history buffer |
US5588128A (en) * | 1993-04-02 | 1996-12-24 | Vlsi Technology, Inc. | Dynamic direction look ahead read buffer |
US5388247A (en) * | 1993-05-14 | 1995-02-07 | Digital Equipment Corporation | History buffer control to reduce unnecessary allocations in a memory stream buffer |
US5490113A (en) * | 1994-06-15 | 1996-02-06 | Digital Equipment Corporation | Memory stream buffer |
-
1995
- 1995-08-24 US US08/519,031 patent/US5664147A/en not_active Expired - Lifetime
-
1996
- 1996-07-16 JP JP18580696A patent/JP3541998B2/ja not_active Expired - Fee Related
- 1996-07-24 EP EP96305419A patent/EP0762288B1/de not_active Expired - Lifetime
- 1996-07-24 KR KR1019960029939A patent/KR100240911B1/ko not_active IP Right Cessation
- 1996-07-24 DE DE69616465T patent/DE69616465T2/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US5664147A (en) | 1997-09-02 |
JPH0962573A (ja) | 1997-03-07 |
EP0762288A2 (de) | 1997-03-12 |
EP0762288A3 (de) | 1997-03-19 |
JP3541998B2 (ja) | 2004-07-14 |
EP0762288B1 (de) | 2001-10-31 |
DE69616465D1 (de) | 2001-12-06 |
KR970012167A (ko) | 1997-03-29 |
KR100240911B1 (ko) | 2000-01-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8320 | Willingness to grant licences declared (paragraph 23) |