DE69523387D1 - Unterbrechungssteuerungsvorrichtung - Google Patents

Unterbrechungssteuerungsvorrichtung

Info

Publication number
DE69523387D1
DE69523387D1 DE69523387T DE69523387T DE69523387D1 DE 69523387 D1 DE69523387 D1 DE 69523387D1 DE 69523387 T DE69523387 T DE 69523387T DE 69523387 T DE69523387 T DE 69523387T DE 69523387 D1 DE69523387 D1 DE 69523387D1
Authority
DE
Germany
Prior art keywords
control device
interrupt control
interrupt
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69523387T
Other languages
English (en)
Other versions
DE69523387T2 (de
Inventor
Masako Ideta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE69523387D1 publication Critical patent/DE69523387D1/de
Publication of DE69523387T2 publication Critical patent/DE69523387T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Preventing errors by testing or debugging software
    • G06F11/362—Software debugging
    • G06F11/3648—Software debugging using additional hardware
    • G06F11/3652—Software debugging using additional hardware in-circuit-emulation [ICE] arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Debugging And Monitoring (AREA)
  • Microcomputers (AREA)
DE69523387T 1994-07-25 1995-07-24 Unterbrechungssteuerungsvorrichtung Expired - Fee Related DE69523387T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6172541A JP2734992B2 (ja) 1994-07-25 1994-07-25 情報処理装置

Publications (2)

Publication Number Publication Date
DE69523387D1 true DE69523387D1 (de) 2001-11-29
DE69523387T2 DE69523387T2 (de) 2002-06-27

Family

ID=15943806

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69523387T Expired - Fee Related DE69523387T2 (de) 1994-07-25 1995-07-24 Unterbrechungssteuerungsvorrichtung

Country Status (5)

Country Link
US (1) US5797021A (de)
EP (1) EP0694841B1 (de)
JP (1) JP2734992B2 (de)
KR (1) KR100206679B1 (de)
DE (1) DE69523387T2 (de)

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4031517A (en) * 1974-04-24 1977-06-21 Honeywell Information Systems, Inc. Emulation of target system interrupts through the use of counters
US4514805A (en) * 1982-02-22 1985-04-30 Texas Instruments Incorporated Interrupt operation in systems emulator mode for microcomputer
DE3587643T2 (de) * 1984-03-02 1994-03-24 Nec Corp Informationsverarbeitungseinheit mit Unterbrechungsfunktion.
US4727480A (en) * 1984-07-09 1988-02-23 Wang Laboratories, Inc. Emulation of a data processing system
JPH0795277B2 (ja) * 1988-11-25 1995-10-11 日本電気株式会社 データ処理装置
US5093776A (en) * 1989-06-15 1992-03-03 Wang Laboratories, Inc. Information processing system emulation apparatus and method
US5261107A (en) * 1989-11-03 1993-11-09 International Business Machines Corp. Programable interrupt controller
JP2900627B2 (ja) * 1991-03-29 1999-06-02 日本電気株式会社 割り込み制御装置
GB2266605B (en) * 1992-04-27 1995-10-11 Intel Corp Microprocessor having a run/stop pin for accessing an idle mode
JP2876909B2 (ja) * 1992-08-06 1999-03-31 日本電気株式会社 割込みエミュレータ
JPH0773046A (ja) * 1992-12-07 1995-03-17 Intel Corp コンピュータシステムで回路をエミュレートする 方法及び装置
JPH0713772A (ja) * 1993-06-29 1995-01-17 Mitsubishi Electric Corp データ処理装置
US5555413A (en) * 1995-02-17 1996-09-10 International Business Machines Corporation Computer system and method with integrated level and edge interrupt requests at the same interrupt priority
US5708815A (en) * 1995-05-05 1998-01-13 Intel Corporation DMA emulation via interrupt muxing

Also Published As

Publication number Publication date
KR100206679B1 (ko) 1999-07-01
DE69523387T2 (de) 2002-06-27
JP2734992B2 (ja) 1998-04-02
EP0694841B1 (de) 2001-10-24
EP0694841A1 (de) 1996-01-31
US5797021A (en) 1998-08-18
JPH0836506A (ja) 1996-02-06

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8339 Ceased/non-payment of the annual fee