DE69521066T2 - Halbleiterspeicheranordnung - Google Patents

Halbleiterspeicheranordnung

Info

Publication number
DE69521066T2
DE69521066T2 DE69521066T DE69521066T DE69521066T2 DE 69521066 T2 DE69521066 T2 DE 69521066T2 DE 69521066 T DE69521066 T DE 69521066T DE 69521066 T DE69521066 T DE 69521066T DE 69521066 T2 DE69521066 T2 DE 69521066T2
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69521066T
Other languages
English (en)
Other versions
DE69521066D1 (de
Inventor
Yasuhiro Tanaka
Tetsuya Tanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Publication of DE69521066D1 publication Critical patent/DE69521066D1/de
Application granted granted Critical
Publication of DE69521066T2 publication Critical patent/DE69521066T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4094—Bit-line management or control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
DE69521066T 1994-01-11 1995-01-04 Halbleiterspeicheranordnung Expired - Fee Related DE69521066T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP06001299A JP3088232B2 (ja) 1994-01-11 1994-01-11 半導体記憶回路

Publications (2)

Publication Number Publication Date
DE69521066D1 DE69521066D1 (de) 2001-07-05
DE69521066T2 true DE69521066T2 (de) 2002-03-21

Family

ID=11497601

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69521066T Expired - Fee Related DE69521066T2 (de) 1994-01-11 1995-01-04 Halbleiterspeicheranordnung
DE69528001T Expired - Lifetime DE69528001T2 (de) 1994-01-11 1995-01-04 Halbleiterspeicheranordnung

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE69528001T Expired - Lifetime DE69528001T2 (de) 1994-01-11 1995-01-04 Halbleiterspeicheranordnung

Country Status (5)

Country Link
US (3) US5477496A (de)
EP (2) EP0662689B1 (de)
JP (1) JP3088232B2 (de)
KR (1) KR100313777B1 (de)
DE (2) DE69521066T2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3088232B2 (ja) * 1994-01-11 2000-09-18 沖電気工業株式会社 半導体記憶回路
JP2836495B2 (ja) * 1994-08-24 1998-12-14 日本電気株式会社 半導体記憶装置
US5729495A (en) * 1995-09-29 1998-03-17 Altera Corporation Dynamic nonvolatile memory cell
US5896334A (en) * 1997-08-14 1999-04-20 Micron Technology, Inc. Circuit and method for memory device with defect current isolation
KR100388318B1 (ko) 1998-12-24 2003-10-10 주식회사 하이닉스반도체 비트라인디커플링방법
US6108257A (en) * 1999-09-30 2000-08-22 Philips Electronics North America Corporation Zero power SRAM precharge
KR100430369B1 (ko) * 2002-05-03 2004-05-04 (주) 텔트론 초고주파 디프랜셜 스위치회로
US7218564B2 (en) * 2004-07-16 2007-05-15 Promos Technologies Inc. Dual equalization devices for long data line pairs
FR2910168B1 (fr) * 2006-12-14 2009-03-20 St Microelectronics Sa Dispositif de memoire de type sram

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5835795A (ja) * 1981-08-24 1983-03-02 Hitachi Ltd メモリのデ−タ線プリチヤ−ジ回路
US4494221A (en) * 1982-03-03 1985-01-15 Inmos Corporation Bit line precharging and equilibrating circuit
JP2615011B2 (ja) * 1986-06-13 1997-05-28 株式会社日立製作所 半導体記憶回路
JPS63304491A (ja) * 1987-06-04 1988-12-12 Mitsubishi Electric Corp 半導体メモリ
JPH07118196B2 (ja) * 1988-12-28 1995-12-18 株式会社東芝 スタティック型半導体メモリ
US5036492A (en) * 1990-02-15 1991-07-30 Advanced Micro Devices, Inc. CMOS precharge and equalization circuit
US5155702A (en) * 1990-11-30 1992-10-13 Samsung Electronics Co., Ltd. Semiconductor memory device
KR940007000B1 (ko) * 1991-05-24 1994-08-03 삼성전자 주식회사 개선된 라이트 동작을 가지는 반도체 메모리 장치
US5325335A (en) * 1991-05-30 1994-06-28 Integrated Device Technology, Inc. Memories and amplifiers suitable for low voltage power supplies
KR950009234B1 (ko) * 1992-02-19 1995-08-18 삼성전자주식회사 반도체 메모리장치의 비트라인 분리클럭 발생장치
JPH05342873A (ja) * 1992-06-10 1993-12-24 Nec Corp 半導体記憶装置
JP3088232B2 (ja) * 1994-01-11 2000-09-18 沖電気工業株式会社 半導体記憶回路

Also Published As

Publication number Publication date
DE69521066D1 (de) 2001-07-05
DE69528001D1 (de) 2002-10-02
EP1043728A1 (de) 2000-10-11
EP0662689B1 (de) 2001-05-30
DE69528001T2 (de) 2003-05-08
US5477496A (en) 1995-12-19
KR100313777B1 (ko) 2001-12-28
EP0662689A2 (de) 1995-07-12
US5652727A (en) 1997-07-29
JP3088232B2 (ja) 2000-09-18
JPH07211071A (ja) 1995-08-11
EP0662689A3 (de) 1995-11-22
KR950024213A (ko) 1995-08-21
US5566115A (en) 1996-10-15
EP1043728B1 (de) 2002-08-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee