DE69516675T2 - Programmierungsverfahren einer einzigen eprom- oder flash- speicherzelle zur speicherung von mehreren datenpegeln - Google Patents

Programmierungsverfahren einer einzigen eprom- oder flash- speicherzelle zur speicherung von mehreren datenpegeln

Info

Publication number
DE69516675T2
DE69516675T2 DE69516675T DE69516675T DE69516675T2 DE 69516675 T2 DE69516675 T2 DE 69516675T2 DE 69516675 T DE69516675 T DE 69516675T DE 69516675 T DE69516675 T DE 69516675T DE 69516675 T2 DE69516675 T2 DE 69516675T2
Authority
DE
Germany
Prior art keywords
multiple data
storage cell
flash storage
programming method
storing multiple
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69516675T
Other languages
English (en)
Other versions
DE69516675D1 (de
Inventor
Albert Bergemont
Min-Hwa Chi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Semiconductor Corp
Original Assignee
National Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Semiconductor Corp filed Critical National Semiconductor Corp
Publication of DE69516675D1 publication Critical patent/DE69516675D1/de
Application granted granted Critical
Publication of DE69516675T2 publication Critical patent/DE69516675T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G11C11/5635—Erasing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/562—Multilevel memory programming aspects
    • G11C2211/5625—Self-converging multilevel programming

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Read Only Memory (AREA)
DE69516675T 1994-12-16 1995-12-08 Programmierungsverfahren einer einzigen eprom- oder flash- speicherzelle zur speicherung von mehreren datenpegeln Expired - Lifetime DE69516675T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US35711594A 1994-12-16 1994-12-16
PCT/US1995/016177 WO1996018998A1 (en) 1994-12-16 1995-12-08 A method for programming a single eprom or flash memory cell to store multiple levels of data

Publications (2)

Publication Number Publication Date
DE69516675D1 DE69516675D1 (de) 2000-06-08
DE69516675T2 true DE69516675T2 (de) 2000-12-28

Family

ID=23404354

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69516675T Expired - Lifetime DE69516675T2 (de) 1994-12-16 1995-12-08 Programmierungsverfahren einer einzigen eprom- oder flash- speicherzelle zur speicherung von mehreren datenpegeln

Country Status (4)

Country Link
US (1) US5594685A (de)
EP (1) EP0745257B1 (de)
DE (1) DE69516675T2 (de)
WO (1) WO1996018998A1 (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5808937A (en) * 1994-12-16 1998-09-15 National Semiconductor Corporation Self-convergent method for programming FLASH and EEPROM memory cells that moves the threshold voltage from an erased threshold voltage range to one of a plurality of programmed threshold voltage ranges
JP3547245B2 (ja) * 1996-02-01 2004-07-28 シャープ株式会社 不揮発性メモリの多値書き込み方法
US5703808A (en) * 1996-02-21 1997-12-30 Motorola, Inc. Non-volatile memory cell and method of programming
US5908311A (en) * 1996-07-25 1999-06-01 National Semiconductor Corporation Method for forming a mixed-signal CMOS circuit that includes non-volatile memory cells
KR100295135B1 (ko) * 1997-12-31 2001-07-12 윤종용 멀티-비트 셀 구조를 갖는 비휘발성 메모리 장치
US6141246A (en) * 1998-04-01 2000-10-31 National Semiconductor Corporation Memory device with sense amplifier that sets the voltage drop across the cells of the device
US6055185A (en) 1998-04-01 2000-04-25 National Semiconductor Corporation Single-poly EPROM cell with CMOS compatible programming voltages
US6081451A (en) * 1998-04-01 2000-06-27 National Semiconductor Corporation Memory device that utilizes single-poly EPROM cells with CMOS compatible programming voltages
US6157574A (en) * 1998-04-01 2000-12-05 National Semiconductor Corporation Erasable frohmann-bentchkowsky memory transistor that stores multiple bits of data
US6118691A (en) * 1998-04-01 2000-09-12 National Semiconductor Corporation Memory cell with a Frohmann-Bentchkowsky EPROM memory transistor that reduces the voltage across an unprogrammed memory transistor during a read
US20030092236A1 (en) * 2000-01-31 2003-05-15 Danny Shum Flash memory cell and method to achieve multiple bits per cell
US6456536B1 (en) * 2000-06-23 2002-09-24 Advanced Micro Devices, Inc. Method of programming a non-volatile memory cell using a substrate bias
US6456531B1 (en) * 2000-06-23 2002-09-24 Advanced Micro Devices, Inc. Method of drain avalanche programming of a non-volatile memory cell
US6522584B1 (en) 2001-08-02 2003-02-18 Micron Technology, Inc. Programming methods for multi-level flash EEPROMs
JP3616367B2 (ja) * 2001-10-24 2005-02-02 三菱電機株式会社 電子制御装置
US7038248B2 (en) * 2002-02-15 2006-05-02 Sandisk Corporation Diverse band gap energy level semiconductor device
US6887758B2 (en) * 2002-10-09 2005-05-03 Freescale Semiconductor, Inc. Non-volatile memory device and method for forming
US6980471B1 (en) * 2004-12-23 2005-12-27 Sandisk Corporation Substrate electron injection techniques for programming non-volatile charge storage memory cells
US20230114966A1 (en) * 2020-01-28 2023-04-13 Micron Technology, Inc. Analog storage using memory device

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4181980A (en) * 1978-05-15 1980-01-01 Electronic Arrays, Inc. Acquisition and storage of analog signals
DE2828855C2 (de) * 1978-06-30 1982-11-18 Siemens AG, 1000 Berlin und 8000 München Wortweise elektrisch umprogrammierbarer, nichtflüchtiger Speicher sowie Verfahren zum Löschen bzw. Einschreiben eines bzw. in einen solchen Speicher(s)
IT1224062B (it) * 1979-09-28 1990-09-26 Ates Componenti Elettron Metodo di programmazione per una memoria a semiconduttore non volatile elettricamente alterabile
JPS59161873A (ja) * 1983-03-07 1984-09-12 Agency Of Ind Science & Technol 半導体不揮発性メモリ
JPS6038881A (ja) * 1983-08-11 1985-02-28 Agency Of Ind Science & Technol 半導体不揮発性メモリ
US4698787A (en) * 1984-11-21 1987-10-06 Exel Microelectronics, Inc. Single transistor electrically programmable memory device and method
JPS63172471A (ja) * 1987-01-12 1988-07-16 Agency Of Ind Science & Technol 不揮発性メモリへの書き込み方法
JPH07120720B2 (ja) * 1987-12-17 1995-12-20 三菱電機株式会社 不揮発性半導体記憶装置
US5043940A (en) * 1988-06-08 1991-08-27 Eliyahou Harari Flash EEPROM memory systems having multistate storage cells
US5204835A (en) * 1990-06-13 1993-04-20 Waferscale Integration Inc. Eprom virtual ground array
US5187683A (en) * 1990-08-31 1993-02-16 Texas Instruments Incorporated Method for programming EEPROM memory arrays
US5218569A (en) * 1991-02-08 1993-06-08 Banks Gerald J Electrically alterable non-volatile memory with n-bits per memory cell
US5346842A (en) * 1992-02-04 1994-09-13 National Semiconductor Corporation Method of making alternate metal/source virtual ground flash EPROM cell array
US5418743A (en) * 1992-12-07 1995-05-23 Nippon Steel Corporation Method of writing into non-volatile semiconductor memory

Also Published As

Publication number Publication date
EP0745257B1 (de) 2000-05-03
US5594685A (en) 1997-01-14
EP0745257A1 (de) 1996-12-04
WO1996018998A1 (en) 1996-06-20
DE69516675D1 (de) 2000-06-08

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Legal Events

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8364 No opposition during term of opposition