DE69433638D1 - BiCMOS-Verfahren - Google Patents

BiCMOS-Verfahren

Info

Publication number
DE69433638D1
DE69433638D1 DE69433638T DE69433638T DE69433638D1 DE 69433638 D1 DE69433638 D1 DE 69433638D1 DE 69433638 T DE69433638 T DE 69433638T DE 69433638 T DE69433638 T DE 69433638T DE 69433638 D1 DE69433638 D1 DE 69433638D1
Authority
DE
Germany
Prior art keywords
bicmos process
bicmos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69433638T
Other languages
English (en)
Other versions
DE69433638T2 (de
Inventor
Robert H Eklund
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of DE69433638D1 publication Critical patent/DE69433638D1/de
Application granted granted Critical
Publication of DE69433638T2 publication Critical patent/DE69433638T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8248Combination of bipolar and field-effect technology
    • H01L21/8249Bipolar and MOS technology
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/07Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
    • H01L27/0705Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type
    • H01L27/0711Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with bipolar transistors and diodes, or capacitors, or resistors
    • H01L27/0716Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with bipolar transistors and diodes, or capacitors, or resistors in combination with vertical bipolar transistors and diodes, or capacitors, or resistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/009Bi-MOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
DE69433638T 1993-12-03 1994-12-02 BiCMOS-Verfahren Expired - Lifetime DE69433638T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/161,960 US5441903A (en) 1993-12-03 1993-12-03 BiCMOS process for supporting merged devices
US161960 1993-12-03

Publications (2)

Publication Number Publication Date
DE69433638D1 true DE69433638D1 (de) 2004-04-29
DE69433638T2 DE69433638T2 (de) 2004-08-05

Family

ID=22583555

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69433638T Expired - Lifetime DE69433638T2 (de) 1993-12-03 1994-12-02 BiCMOS-Verfahren

Country Status (6)

Country Link
US (2) US5441903A (de)
EP (1) EP0656660B1 (de)
JP (1) JP3594346B2 (de)
KR (1) KR100360640B1 (de)
DE (1) DE69433638T2 (de)
TW (1) TW258830B (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07335773A (ja) * 1994-06-10 1995-12-22 Hitachi Ltd 半導体集積回路装置の製造方法
US5620908A (en) * 1994-09-19 1997-04-15 Kabushiki Kaisha Toshiba Manufacturing method of semiconductor device comprising BiCMOS transistor
KR100223600B1 (ko) * 1997-01-23 1999-10-15 김덕중 반도체 장치 및 그 제조 방법
GB2340243A (en) * 1998-07-30 2000-02-16 P Shaw Trailer apparatus for measuring ground density
JP4003438B2 (ja) * 2001-11-07 2007-11-07 株式会社デンソー 半導体装置の製造方法および半導体装置
JP4342579B2 (ja) * 2006-08-31 2009-10-14 三洋電機株式会社 半導体装置
SE537230C2 (sv) * 2013-05-16 2015-03-10 Klas Håkan Eklund Med K Eklund Innovation F Bipolär transistorförstärkarkrets med isolerad gate
US11094806B2 (en) 2017-12-29 2021-08-17 Texas Instruments Incorporated Fabricating transistors with implanting dopants at first and second dosages in the collector region to form the base region

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4855244A (en) * 1987-07-02 1989-08-08 Texas Instruments Incorporated Method of making vertical PNP transistor in merged bipolar/CMOS technology
SE461428B (sv) * 1988-06-16 1990-02-12 Ericsson Telefon Ab L M Foerfarande foer att paa ett underlag av halvledarmaterial framstaella en bipolaer transistor eller en bipolaer transistor och en faelteffekttransistor eller en bipolaer transistor och en faelteffekttransistor med en komplementaer faelteffekttransistor och anordningar framstaellda enligt foerfarandena
JPH02101747A (ja) * 1988-10-11 1990-04-13 Toshiba Corp 半導体集積回路とその製造方法
US4868135A (en) * 1988-12-21 1989-09-19 International Business Machines Corporation Method for manufacturing a Bi-CMOS device
US5281544A (en) * 1990-07-23 1994-01-25 Seiko Epson Corporation Method of manufacturing planar type polar transistors and combination bipolar/MIS type transistors
US5101257A (en) * 1991-07-01 1992-03-31 Motorola, Inc. Semiconductor device having merged bipolar and MOS transistors and process for making the same
US5334549A (en) * 1993-08-13 1994-08-02 Texas Instruments Incorporated BiCMOS process that supports merged devices

Also Published As

Publication number Publication date
EP0656660A2 (de) 1995-06-07
EP0656660B1 (de) 2004-03-24
EP0656660A3 (de) 1998-01-07
TW258830B (de) 1995-10-01
KR950021503A (ko) 1995-07-26
JPH07321240A (ja) 1995-12-08
US5441903A (en) 1995-08-15
DE69433638T2 (de) 2004-08-05
US5811860A (en) 1998-09-22
JP3594346B2 (ja) 2004-11-24
KR100360640B1 (ko) 2003-01-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition