DE69432005D1 - Rechnersystem mit Interruptsteuerung und Leistungsverwaltungseinheit - Google Patents
Rechnersystem mit Interruptsteuerung und LeistungsverwaltungseinheitInfo
- Publication number
- DE69432005D1 DE69432005D1 DE69432005T DE69432005T DE69432005D1 DE 69432005 D1 DE69432005 D1 DE 69432005D1 DE 69432005 T DE69432005 T DE 69432005T DE 69432005 T DE69432005 T DE 69432005T DE 69432005 D1 DE69432005 D1 DE 69432005D1
- Authority
- DE
- Germany
- Prior art keywords
- computer system
- management unit
- power management
- interrupt control
- interrupt
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
- G06F1/3215—Monitoring of peripheral devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3237—Power saving characterised by the action undertaken by disabling clock generation or distribution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/325—Power saving in peripheral device
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
- G06F13/26—Handling requests for interconnection or transfer for access to input/output bus using interrupt with priority control
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/50—Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- Bus Control (AREA)
- Power Sources (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/125,336 US5894577A (en) | 1993-09-22 | 1993-09-22 | Interrupt controller with external in-service indication for power management within a computer system |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69432005D1 true DE69432005D1 (de) | 2003-02-20 |
DE69432005T2 DE69432005T2 (de) | 2003-10-16 |
Family
ID=22419276
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69432005T Expired - Lifetime DE69432005T2 (de) | 1993-09-22 | 1994-07-25 | Rechnersystem mit Interruptsteuerung und Leistungsverwaltungseinheit |
Country Status (4)
Country | Link |
---|---|
US (2) | US5894577A (de) |
EP (1) | EP0645690B1 (de) |
JP (1) | JP4070824B2 (de) |
DE (1) | DE69432005T2 (de) |
Families Citing this family (61)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10240371A (ja) * | 1997-02-27 | 1998-09-11 | Mitsubishi Electric Corp | ディジタル信号処理プロセッサのクロック速度制御装置 |
US5878264A (en) * | 1997-07-17 | 1999-03-02 | Sun Microsystems, Inc. | Power sequence controller with wakeup logic for enabling a wakeup interrupt handler procedure |
US5925134A (en) * | 1997-09-30 | 1999-07-20 | Intel Corporation | Method and apparatus for power management |
JPH11184712A (ja) * | 1997-12-24 | 1999-07-09 | Toshiba Corp | 情報処理装置 |
US6065122A (en) * | 1998-03-13 | 2000-05-16 | Compaq Computer Corporation | Smart battery power management in a computer system |
US6202104B1 (en) * | 1998-07-28 | 2001-03-13 | Siemens Aktiengesellschaft | Processor having a clock driven CPU with static design |
US7100061B2 (en) | 2000-01-18 | 2006-08-29 | Transmeta Corporation | Adaptive power control |
KR100342842B1 (ko) * | 2000-03-30 | 2002-07-02 | 김진영 | 전원 통합 제어 장치 및 그 방법 |
US6968469B1 (en) | 2000-06-16 | 2005-11-22 | Transmeta Corporation | System and method for preserving internal processor context when the processor is powered down and restoring the internal processor context when processor is restored |
US7260731B1 (en) * | 2000-10-23 | 2007-08-21 | Transmeta Corporation | Saving power when in or transitioning to a static mode of a processor |
US6842812B1 (en) | 2000-11-02 | 2005-01-11 | Intel Corporation | Event handling |
FR2817058B1 (fr) * | 2000-11-21 | 2003-01-24 | St Microelectronics Sa | Dispositif et procede de traitement des interruptions dans une transmission d'informations sur un bus |
US7069367B2 (en) * | 2000-12-29 | 2006-06-27 | Intel Corporation | Method and apparatus for avoiding race condition with edge-triggered interrupts |
US7058834B2 (en) * | 2001-04-26 | 2006-06-06 | Paul Richard Woods | Scan-based state save and restore method and system for inactive state power reduction |
US6694398B1 (en) * | 2001-04-30 | 2004-02-17 | Nokia Corporation | Circuit for selecting interrupt requests in RISC microprocessors |
US6807595B2 (en) * | 2001-05-10 | 2004-10-19 | Qualcomm Incorporated | Mobile communication device having a prioritized interrupt controller |
US7941675B2 (en) * | 2002-12-31 | 2011-05-10 | Burr James B | Adaptive power control |
US7180322B1 (en) | 2002-04-16 | 2007-02-20 | Transmeta Corporation | Closed loop feedback control of integrated circuits |
US7336090B1 (en) | 2002-04-16 | 2008-02-26 | Transmeta Corporation | Frequency specific closed loop feedback control of integrated circuits |
US20030204655A1 (en) * | 2002-04-24 | 2003-10-30 | Schmisseur Mark A. | Prioritizing vector generation in interrupt controllers |
US6685334B2 (en) | 2002-04-30 | 2004-02-03 | G-5 Electronics | System and method of power management for a solar powered device |
US7882369B1 (en) | 2002-11-14 | 2011-02-01 | Nvidia Corporation | Processor performance adjustment system and method |
US7849332B1 (en) | 2002-11-14 | 2010-12-07 | Nvidia Corporation | Processor voltage adjustment system and method |
US7886164B1 (en) | 2002-11-14 | 2011-02-08 | Nvidia Corporation | Processor temperature adjustment system and method |
US7205758B1 (en) | 2004-02-02 | 2007-04-17 | Transmeta Corporation | Systems and methods for adjusting threshold voltage |
US7949864B1 (en) | 2002-12-31 | 2011-05-24 | Vjekoslav Svilan | Balanced adaptive body bias control |
US7953990B2 (en) * | 2002-12-31 | 2011-05-31 | Stewart Thomas E | Adaptive power control based on post package characterization of integrated circuits |
US7786756B1 (en) | 2002-12-31 | 2010-08-31 | Vjekoslav Svilan | Method and system for latchup suppression |
US7642835B1 (en) | 2003-11-12 | 2010-01-05 | Robert Fu | System for substrate potential regulation during power-up in integrated circuits |
US7228242B2 (en) | 2002-12-31 | 2007-06-05 | Transmeta Corporation | Adaptive power control based on pre package characterization of integrated circuits |
DE60315127D1 (de) * | 2003-02-21 | 2007-09-06 | St Microelectronics Srl | Mikrokontroller und Unterbrechungsverarbeitungsverfahren zur Verwaltung von komplexen Prozeduren |
CN100369283C (zh) * | 2003-07-15 | 2008-02-13 | 西北工业大学 | 磁致伸缩材料体的箝位方法 |
US7808895B2 (en) * | 2003-10-30 | 2010-10-05 | Intel Corporation | Isochronous device communication management |
US7012461B1 (en) | 2003-12-23 | 2006-03-14 | Transmeta Corporation | Stabilization component for a substrate potential regulation circuit |
US7649402B1 (en) * | 2003-12-23 | 2010-01-19 | Tien-Min Chen | Feedback-controlled body-bias voltage source |
US7692477B1 (en) | 2003-12-23 | 2010-04-06 | Tien-Min Chen | Precise control component for a substrate potential regulation circuit |
US7129771B1 (en) | 2003-12-23 | 2006-10-31 | Transmeta Corporation | Servo loop for well bias voltage source |
US7816742B1 (en) | 2004-09-30 | 2010-10-19 | Koniaris Kleanthes G | Systems and methods for integrated circuits comprising multiple body biasing domains |
US7859062B1 (en) * | 2004-02-02 | 2010-12-28 | Koniaris Kleanthes G | Systems and methods for integrated circuits comprising multiple body biasing domains |
US7774625B1 (en) | 2004-06-22 | 2010-08-10 | Eric Chien-Li Sheng | Adaptive voltage control by accessing information stored within and specific to a microprocessor |
US7562233B1 (en) | 2004-06-22 | 2009-07-14 | Transmeta Corporation | Adaptive control of operating and body bias voltages |
US7281145B2 (en) * | 2004-06-24 | 2007-10-09 | International Business Machiness Corporation | Method for managing resources in a CPU by allocating a specified percentage of CPU resources to high priority applications |
US7739531B1 (en) | 2005-03-04 | 2010-06-15 | Nvidia Corporation | Dynamic voltage scaling |
US20070083688A1 (en) * | 2005-10-06 | 2007-04-12 | Matsushita Electric Industrial Co., Ltd. | Common memory transfer control circuit and common memory transfer control system |
JP2007156926A (ja) * | 2005-12-06 | 2007-06-21 | Matsushita Electric Ind Co Ltd | 割込制御装置 |
US7802073B1 (en) | 2006-03-29 | 2010-09-21 | Oracle America, Inc. | Virtual core management |
JP2008130056A (ja) * | 2006-11-27 | 2008-06-05 | Renesas Technology Corp | 半導体回路 |
US9134782B2 (en) | 2007-05-07 | 2015-09-15 | Nvidia Corporation | Maintaining optimum voltage supply to match performance of an integrated circuit |
JP4353990B2 (ja) * | 2007-05-18 | 2009-10-28 | 株式会社半導体理工学研究センター | マルチプロセッサ制御装置 |
US8225315B1 (en) | 2007-07-23 | 2012-07-17 | Oracle America, Inc. | Virtual core management |
US8725488B2 (en) * | 2007-07-26 | 2014-05-13 | Qualcomm Incorporated | Method and apparatus for adaptive voltage scaling based on instruction usage |
US8370663B2 (en) | 2008-02-11 | 2013-02-05 | Nvidia Corporation | Power management with dynamic frequency adjustments |
US8244947B2 (en) * | 2009-02-20 | 2012-08-14 | Qualcomm Incorporated | Methods and apparatus for resource sharing in a programmable interrupt controller |
US9256265B2 (en) | 2009-12-30 | 2016-02-09 | Nvidia Corporation | Method and system for artificially and dynamically limiting the framerate of a graphics processing unit |
US9830889B2 (en) | 2009-12-31 | 2017-11-28 | Nvidia Corporation | Methods and system for artifically and dynamically limiting the display resolution of an application |
US8839006B2 (en) | 2010-05-28 | 2014-09-16 | Nvidia Corporation | Power consumption reduction systems and methods |
KR101841930B1 (ko) * | 2012-01-30 | 2018-03-26 | 삼성전자주식회사 | 인터럽트 스프레드 방법, 인터럽트 스프레드 장치 및 이를 구비하는 시스템 온-칩 |
DE102012112363A1 (de) * | 2012-01-30 | 2013-08-01 | Samsung Electronics Co., Ltd. | Verfahren zum Verbreiten einer Mehrzahl von Interrupts, Interrupt-Anforderungssignal-Verbreitungsschaltungen und Ein-Chip-Systeme, welche dieselben aufweisen |
US9696789B2 (en) * | 2014-08-18 | 2017-07-04 | Xilinx, Inc. | Sub-system power management control |
JP6509616B2 (ja) * | 2015-04-10 | 2019-05-08 | 株式会社東芝 | センサデータ収集装置 |
US10101795B2 (en) * | 2015-11-10 | 2018-10-16 | Wipro Limited | System-on-chip (SoC) and method for dynamically optimizing power consumption in the SoC |
Family Cites Families (23)
Publication number | Priority date | Publication date | Assignee | Title |
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GB1397438A (en) * | 1971-10-27 | 1975-06-11 | Ibm | Data processing system |
US3999165A (en) * | 1973-08-27 | 1976-12-21 | Hitachi, Ltd. | Interrupt information interface system |
US4161787A (en) * | 1977-11-04 | 1979-07-17 | Motorola, Inc. | Programmable timer module coupled to microprocessor system |
JPS5775335A (en) * | 1980-10-27 | 1982-05-11 | Hitachi Ltd | Data processor |
US4851987A (en) * | 1986-01-17 | 1989-07-25 | International Business Machines Corporation | System for reducing processor power consumption by stopping processor clock supply if a desired event does not occur |
US5218703A (en) * | 1988-07-07 | 1993-06-08 | Siemens Aktiengesellschaft | Circuit configuration and method for priority selection of interrupts for a microprocessor |
US5101497A (en) * | 1988-09-09 | 1992-03-31 | Compaq Computer Corporation | Programmable interrupt controller |
CA1319441C (en) * | 1988-09-09 | 1993-06-22 | Paul R. Culley | Programmable interrupt controller |
US5163146A (en) * | 1988-10-14 | 1992-11-10 | International Business Machines Corporation | System responsive to interrupt levels for changing and restoring clock speed by changing and restoring a register value |
DE68925615T2 (de) * | 1988-11-10 | 1996-09-12 | Motorola Inc | Digitalrechnersystem mit Niederstromverbrauchmodus |
US5214767A (en) * | 1989-02-07 | 1993-05-25 | Compaq Computer Corp. | Full address and odd boundary direct memory access controller which determines address size by counting the input address bytes |
AU629019B2 (en) * | 1989-09-08 | 1992-09-24 | Apple Computer, Inc. | Power management for a laptop computer |
US5167024A (en) * | 1989-09-08 | 1992-11-24 | Apple Computer, Inc. | Power management for a laptop computer with slow and sleep modes |
JPH03123919A (ja) * | 1989-10-06 | 1991-05-27 | Toshiba Corp | コンピュータシステム |
KR940001878B1 (ko) * | 1990-03-08 | 1994-03-10 | 가부시끼가이샤 히다찌세이사꾸쇼 | 멀티 프로세서시스템 및 인터럽션 제어장치 |
JPH0743653B2 (ja) * | 1990-07-25 | 1995-05-15 | 株式会社東芝 | 割込みコントローラ |
US5237692A (en) * | 1990-11-09 | 1993-08-17 | Ast Research Inc. | Internal interrupt controller for a peripheral controller |
JP2855298B2 (ja) * | 1990-12-21 | 1999-02-10 | インテル・コーポレーション | 割込み要求の仲裁方法およびマルチプロセッサシステム |
JP2507833B2 (ja) * | 1990-12-25 | 1996-06-19 | 三菱電機株式会社 | マイクロコンピュ−タ |
JPH0776894B2 (ja) * | 1991-02-25 | 1995-08-16 | インターナショナル・ビジネス・マシーンズ・コーポレイション | プロセッサ用クロック信号の制御方法及び情報処理システム |
JP3176093B2 (ja) * | 1991-09-05 | 2001-06-11 | 日本電気株式会社 | マイクロプロセッサの割込み制御装置 |
US5506997A (en) * | 1994-01-28 | 1996-04-09 | Compaq Computer Corp. | Device for mapping a set of interrupt signals generated on a first type bus to a set of interrupt signals defined by a second type bus and combing the mapped interrupt signals with a set of interrupt signals of the second type bus |
US5530891A (en) * | 1994-05-31 | 1996-06-25 | Advanced Micro Devices | System management interrupt mechanism within a symmetrical multiprocessing system |
-
1993
- 1993-09-22 US US08/125,336 patent/US5894577A/en not_active Expired - Lifetime
-
1994
- 1994-07-25 EP EP94305471A patent/EP0645690B1/de not_active Expired - Lifetime
- 1994-07-25 DE DE69432005T patent/DE69432005T2/de not_active Expired - Lifetime
- 1994-09-20 JP JP22433594A patent/JP4070824B2/ja not_active Expired - Fee Related
-
1996
- 1996-10-09 US US08/671,831 patent/US5765003A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US5765003A (en) | 1998-06-09 |
US5894577A (en) | 1999-04-13 |
JP4070824B2 (ja) | 2008-04-02 |
DE69432005T2 (de) | 2003-10-16 |
JPH07152584A (ja) | 1995-06-16 |
EP0645690A1 (de) | 1995-03-29 |
EP0645690B1 (de) | 2003-01-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: GLOBALFOUNDRIES INC. MAPLES CORPORATE SERVICES, KY |