DE69425797T2 - Verfahren zur herstellung eines nichtflüchtigen speicherbauteils mit zwei poly-schichten mittels einer dritten polysilizium-schicht - Google Patents

Verfahren zur herstellung eines nichtflüchtigen speicherbauteils mit zwei poly-schichten mittels einer dritten polysilizium-schicht

Info

Publication number
DE69425797T2
DE69425797T2 DE69425797T DE69425797T DE69425797T2 DE 69425797 T2 DE69425797 T2 DE 69425797T2 DE 69425797 T DE69425797 T DE 69425797T DE 69425797 T DE69425797 T DE 69425797T DE 69425797 T2 DE69425797 T2 DE 69425797T2
Authority
DE
Germany
Prior art keywords
polysilicum
producing
layer
volatile memory
memory component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69425797T
Other languages
English (en)
Other versions
DE69425797D1 (de
Inventor
J Larsen
A Randazzo
A Erickson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Atmel Corp
Original Assignee
Atmel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Corp filed Critical Atmel Corp
Publication of DE69425797D1 publication Critical patent/DE69425797D1/de
Application granted granted Critical
Publication of DE69425797T2 publication Critical patent/DE69425797T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
DE69425797T 1993-02-19 1994-01-26 Verfahren zur herstellung eines nichtflüchtigen speicherbauteils mit zwei poly-schichten mittels einer dritten polysilizium-schicht Expired - Lifetime DE69425797T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/020,291 US5340764A (en) 1993-02-19 1993-02-19 Integration of high performance submicron CMOS and dual-poly non-volatile memory devices using a third polysilicon layer
PCT/US1994/000890 WO1994019823A1 (en) 1993-02-19 1994-01-26 Method of making a dual-poly non-volatile memory device using a third polysilicon layer

Publications (2)

Publication Number Publication Date
DE69425797D1 DE69425797D1 (de) 2000-10-12
DE69425797T2 true DE69425797T2 (de) 2001-04-05

Family

ID=21797787

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69425797T Expired - Lifetime DE69425797T2 (de) 1993-02-19 1994-01-26 Verfahren zur herstellung eines nichtflüchtigen speicherbauteils mit zwei poly-schichten mittels einer dritten polysilizium-schicht

Country Status (6)

Country Link
US (2) US5340764A (de)
EP (1) EP0637402B1 (de)
JP (1) JP3563403B2 (de)
KR (1) KR100284107B1 (de)
DE (1) DE69425797T2 (de)
WO (1) WO1994019823A1 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69528971D1 (de) * 1995-06-30 2003-01-09 St Microelectronics Srl Herstellungsverfahren eines Schaltkreises, der nichtflüchtige Speicherzellen und Randtransistoren von mindestens zwei unterschiedlichen Typen enthält, und entsprechender IC
DE19614010C2 (de) * 1996-04-09 2002-09-19 Infineon Technologies Ag Halbleiterbauelement mit einstellbarer, auf einem tunnelstromgesteuerten Lawinendurchbruch basierender Stromverstärkung und Verfahren zu dessen Herstellung
US5937310A (en) * 1996-04-29 1999-08-10 Advanced Micro Devices, Inc. Reduced bird's beak field oxidation process using nitrogen implanted into active region
US5882993A (en) 1996-08-19 1999-03-16 Advanced Micro Devices, Inc. Integrated circuit with differing gate oxide thickness and process for making same
US6033943A (en) * 1996-08-23 2000-03-07 Advanced Micro Devices, Inc. Dual gate oxide thickness integrated circuit and process for making same
JPH10247725A (ja) * 1997-03-05 1998-09-14 Mitsubishi Electric Corp 半導体装置およびその製造方法
US5872376A (en) * 1997-03-06 1999-02-16 Advanced Micro Devices, Inc. Oxide formation technique using thin film silicon deposition
US5962914A (en) * 1998-01-14 1999-10-05 Advanced Micro Devices, Inc. Reduced bird's beak field oxidation process using nitrogen implanted into active region
KR100258881B1 (ko) * 1998-02-27 2000-06-15 김영환 반도체 소자의 제조 방법
US6531364B1 (en) 1998-08-05 2003-03-11 Advanced Micro Devices, Inc. Advanced fabrication technique to form ultra thin gate dielectric using a sacrificial polysilicon seed layer
TW449919B (en) 1998-12-18 2001-08-11 Koninkl Philips Electronics Nv A method of manufacturing a semiconductor device
DE69942862D1 (de) * 1999-12-06 2010-11-25 St Microelectronics Srl Herstellungsverfahren für nicht-flüchtige Schwebegatespeicherzellen und Kontrollschaltkreis
TW587314B (en) * 2003-02-19 2004-05-11 Winbond Electronics Corp Method of fabricating flash memory

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58184768A (ja) * 1982-04-23 1983-10-28 Oki Electric Ind Co Ltd 半導体装置の製造方法
US5194924A (en) * 1984-05-23 1993-03-16 Hitachi, Ltd. Semiconductor device of an LDD structure having a floating gate
JPS62150781A (ja) * 1985-12-25 1987-07-04 Hitachi Ltd 半導体集積回路装置の製造方法
IT1237894B (it) * 1989-12-14 1993-06-18 Sgs Thomson Microelectronics Processo per la fabbricazione di circuiti integrati comprendenti componenti elettronici di due tipi diversi aventi ciascuno coppie di elettrodi ricavati dagli stessi strati di silicio policristallino e separati da dielettrici diversi
US5188976A (en) * 1990-07-13 1993-02-23 Hitachi, Ltd. Manufacturing method of non-volatile semiconductor memory device
JP3168617B2 (ja) * 1990-07-13 2001-05-21 株式会社日立製作所 不揮発性半導体記憶装置の製造方法
US5175120A (en) * 1991-10-11 1992-12-29 Micron Technology, Inc. Method of processing a semiconductor wafer to form an array of nonvolatile memory devices employing floating gate transistors and peripheral area having CMOS transistors

Also Published As

Publication number Publication date
USRE36777E (en) 2000-07-11
DE69425797D1 (de) 2000-10-12
KR100284107B1 (ko) 2001-04-02
JPH07506226A (ja) 1995-07-06
EP0637402A1 (de) 1995-02-08
WO1994019823A1 (en) 1994-09-01
JP3563403B2 (ja) 2004-09-08
EP0637402B1 (de) 2000-09-06
EP0637402A4 (de) 1995-07-19
US5340764A (en) 1994-08-23
KR950701141A (ko) 1995-02-20

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