DE69425126D1 - Digitale Signalverarbeitungsschaltung - Google Patents

Digitale Signalverarbeitungsschaltung

Info

Publication number
DE69425126D1
DE69425126D1 DE69425126T DE69425126T DE69425126D1 DE 69425126 D1 DE69425126 D1 DE 69425126D1 DE 69425126 T DE69425126 T DE 69425126T DE 69425126 T DE69425126 T DE 69425126T DE 69425126 D1 DE69425126 D1 DE 69425126D1
Authority
DE
Germany
Prior art keywords
signal processing
digital signal
processing circuit
circuit
digital
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69425126T
Other languages
English (en)
Other versions
DE69425126T2 (de
Inventor
Yuji Ikegaya
Shinichi Muramatsu
Toru Shirayanagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yamaha Corp
Original Assignee
Yamaha Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yamaha Corp filed Critical Yamaha Corp
Publication of DE69425126D1 publication Critical patent/DE69425126D1/de
Application granted granted Critical
Publication of DE69425126T2 publication Critical patent/DE69425126T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/15—Correlation function computation including computation of convolution operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Data Mining & Analysis (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Algebra (AREA)
  • Databases & Information Systems (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Complex Calculations (AREA)
  • Reverberation, Karaoke And Other Acoustics (AREA)
DE69425126T 1993-12-29 1994-12-28 Digitale Signalverarbeitungsschaltung Expired - Fee Related DE69425126T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5352248A JP2845115B2 (ja) 1993-12-29 1993-12-29 デジタル信号処理回路

Publications (2)

Publication Number Publication Date
DE69425126D1 true DE69425126D1 (de) 2000-08-10
DE69425126T2 DE69425126T2 (de) 2001-03-22

Family

ID=18422773

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69425126T Expired - Fee Related DE69425126T2 (de) 1993-12-29 1994-12-28 Digitale Signalverarbeitungsschaltung

Country Status (4)

Country Link
US (1) US5708842A (de)
EP (1) EP0661648B1 (de)
JP (1) JP2845115B2 (de)
DE (1) DE69425126T2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3451576B2 (ja) 1996-09-20 2003-09-29 株式会社日立製作所 情報処理システム
DE19704044A1 (de) * 1997-02-04 1998-08-13 Pact Inf Tech Gmbh Verfahren zur automatischen Adressgenerierung von Bausteinen innerhalb Clustern aus einer Vielzahl dieser Bausteine
KR100237745B1 (ko) * 1997-05-23 2000-01-15 김영환 회전형 인터리버/디인터리버의 메모리 주소 발생장치 및 그 방법
US7096081B2 (en) * 2002-03-01 2006-08-22 Visteon Global Technologies, Inc. Method of implementing a variable number of filter sections for digital signal processing
JP4426344B2 (ja) * 2004-03-09 2010-03-03 Ｏｋｉセミコンダクタ株式会社 メモリデバイス制御方法および装置

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3969703A (en) * 1973-10-19 1976-07-13 Ball Corporation Programmable automatic controller
US4099230A (en) * 1975-08-04 1978-07-04 California Institute Of Technology High level control processor
SE408985B (sv) * 1977-12-27 1979-07-16 Philips Svenska Ab Pulsgenerator
JPS5835627A (ja) * 1981-08-26 1983-03-02 Toshiba Corp メモリデ−タ先取り制御方式
US4604695A (en) * 1983-09-30 1986-08-05 Honeywell Information Systems Inc. Nibble and word addressable memory arrangement
JPH01105611A (ja) * 1987-10-19 1989-04-24 Hitachi Shonan Denshi Co Ltd ディジタル・フィルタ
JPH0770961B2 (ja) * 1988-08-12 1995-07-31 日本電気株式会社 マイクロコンピュータ
JPH03217122A (ja) * 1990-01-23 1991-09-24 Matsushita Electric Ind Co Ltd 位相同期信号発生装置
JPH0767063B2 (ja) * 1990-01-23 1995-07-19 ヤマハ株式会社 デジタル信号処理回路
FR2664114A1 (fr) * 1990-07-02 1992-01-03 Alcatel Radiotelephone Module interface de transfert de donnees.
EP0474246A2 (de) * 1990-09-06 1992-03-11 Matsushita Electric Industrial Co., Ltd. Bildsignalverarbeitungsgerät

Also Published As

Publication number Publication date
JP2845115B2 (ja) 1999-01-13
JPH07199980A (ja) 1995-08-04
EP0661648A2 (de) 1995-07-05
EP0661648B1 (de) 2000-07-05
US5708842A (en) 1998-01-13
DE69425126T2 (de) 2001-03-22
EP0661648A3 (de) 1997-06-04

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee