DE69418860D1 - Verfahren und Vorrichtung zur Block Verschachtelung und Entschachtelung - Google Patents

Verfahren und Vorrichtung zur Block Verschachtelung und Entschachtelung

Info

Publication number
DE69418860D1
DE69418860D1 DE69418860T DE69418860T DE69418860D1 DE 69418860 D1 DE69418860 D1 DE 69418860D1 DE 69418860 T DE69418860 T DE 69418860T DE 69418860 T DE69418860 T DE 69418860T DE 69418860 D1 DE69418860 D1 DE 69418860D1
Authority
DE
Germany
Prior art keywords
deinterleaving
block interleaving
interleaving
block
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69418860T
Other languages
English (en)
Other versions
DE69418860T2 (de
Inventor
Charaf Hanna
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Technicolor SA
Original Assignee
Thomson Multimedia SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Multimedia SA filed Critical Thomson Multimedia SA
Publication of DE69418860D1 publication Critical patent/DE69418860D1/de
Application granted granted Critical
Publication of DE69418860T2 publication Critical patent/DE69418860T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2782—Interleaver implementations, which reduce the amount of required interleaving memory
    • H03M13/2785—Interleaver using in-place interleaving, i.e. writing to and reading from the memory is performed at the same memory location
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/276—Interleaving address generation
    • H03M13/2764—Circuits therefore

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
DE69418860T 1993-12-07 1994-12-06 Verfahren und Vorrichtung zur Block Verschachtelung und Entschachtelung Expired - Lifetime DE69418860T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9314646A FR2713845B1 (fr) 1993-12-07 1993-12-07 Procédé d'entrelacement et de désentrelacement en bloc et dispositif de mise en Óoeuvre.
PCT/FR1994/001417 WO1995016311A1 (fr) 1993-12-07 1994-12-06 Procede d'entrelacement et de desentrelacement en bloc et dispositif de mise en ×uvre

Publications (2)

Publication Number Publication Date
DE69418860D1 true DE69418860D1 (de) 1999-07-08
DE69418860T2 DE69418860T2 (de) 1999-10-07

Family

ID=9453634

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69418860T Expired - Lifetime DE69418860T2 (de) 1993-12-07 1994-12-06 Verfahren und Vorrichtung zur Block Verschachtelung und Entschachtelung

Country Status (6)

Country Link
US (1) US5978883A (de)
EP (1) EP0682828B1 (de)
JP (1) JP3361812B2 (de)
DE (1) DE69418860T2 (de)
FR (1) FR2713845B1 (de)
WO (1) WO1995016311A1 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2737363B1 (fr) * 1995-07-27 1997-09-05 France Telecom Entrelacement/desentrelacement d'elements de donnees
US5828671A (en) * 1996-04-10 1998-10-27 Motorola, Inc. Method and apparatus for deinterleaving an interleaved data stream
EP0952673B1 (de) 1997-11-10 2017-05-17 Ntt Mobile Communications Network Inc. Verschachtelungsverfahren und vorrichtung sowie aufziehungsträger auf welchem ein verschachtelungsmustererzeugungsprogramm aufgezeichnet ist
CA2297770C (en) 1998-05-27 2007-10-30 Ntt Mobile Communications Network Inc. Interleaving system
JP3359291B2 (ja) * 1998-07-17 2002-12-24 株式会社ケンウッド デインターリーブ回路
US6536001B1 (en) * 1999-03-11 2003-03-18 Globespanvirata, Inc. Circuit and method for convolutional interleaving using a single modulo operation
EP1170871A4 (de) * 1999-03-15 2004-04-28 Matsushita Electric Ind Co Ltd Verfahren und vorrichtung zur block verschachtelung und entschachtelung
US6694435B2 (en) * 2001-07-25 2004-02-17 Apple Computer, Inc. Method of obfuscating computer instruction streams
FR2839222B1 (fr) * 2002-04-26 2004-09-10 St Microelectronics Sa Procede et circuit d'entrelacement de donnnees numeriques pour la reduction d'erreurs de transmission
DE60322550D1 (de) * 2003-12-09 2008-09-11 St Microelectronics Nv Methode und Apparat zur Entschachtelung aufeinanderfolgender Sequenzen von verschachtelten Abtastdaten
DE102006026895B3 (de) * 2006-06-09 2007-11-08 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Interleaver-Vorrichtung, Empfänger für ein von der Interleaver-Vorrichtung erzeugtes Signal, Sender zum Erzeugen eines Sendesignals, Verfahren zum Verarbeiten eines Codeworts, Verfahren zum Empfangen eines Signals und Computer-Programm
GB2456292B (en) * 2007-11-07 2010-03-17 British Broadcasting Corp Interleaving or de-interleaving a stream of data received in successive frames
GB2465611B (en) * 2008-11-25 2011-04-27 British Broadcasting Corp Interleaving or de-interleaving of data of variable rate
WO2012008066A1 (ja) * 2010-07-12 2012-01-19 パナソニック株式会社 デインタリーブ装置および方法ならびにデータ伝送システムおよび方法
JP2013156929A (ja) * 2012-01-31 2013-08-15 Toshiba Corp 記憶装置とその制御方法
KR101558172B1 (ko) * 2014-10-14 2015-10-08 숭실대학교산학협력단 오류 분산을 위한 인터리빙 방법 및 장치, 이를 수행하기 위한 기록매체

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3652998A (en) * 1970-03-01 1972-03-28 Codex Corp Interleavers
JPS5862752A (ja) * 1981-10-08 1983-04-14 Nec Corp インタ−リ−ブ用メモリ制御回路
JPS60152130A (ja) * 1984-01-19 1985-08-10 Nec Home Electronics Ltd クロスインタリ−ブ回路
DE3539592A1 (de) * 1985-08-02 1987-06-19 Ant Nachrichtentech Verfahren zur gesicherten datenuebertragung
FR2639781B1 (fr) * 1988-11-25 1991-01-04 Alcatel Thomson Faisceaux Procede d'entrelacement pour dispositif de transmission numerique
NL8901631A (nl) * 1989-06-28 1991-01-16 Philips Nv Inrichting voor het bufferen van data voor de duur van cyclisch repeterende buffertijden.
EP0467717B1 (de) * 1990-07-20 1998-01-14 Matsushita Electric Industrial Co., Ltd. Datenmischendes Gerät
JP3043830B2 (ja) * 1991-05-10 2000-05-22 アイワ株式会社 Ｐｃｍ音声記録再生装置

Also Published As

Publication number Publication date
WO1995016311A1 (fr) 1995-06-15
JP3361812B2 (ja) 2003-01-07
FR2713845A1 (fr) 1995-06-16
DE69418860T2 (de) 1999-10-07
EP0682828B1 (de) 1999-06-02
FR2713845B1 (fr) 1996-01-19
EP0682828A1 (de) 1995-11-22
US5978883A (en) 1999-11-02
JPH08511393A (ja) 1996-11-26

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Legal Events

Date Code Title Description
8320 Willingness to grant licences declared (paragraph 23)
8364 No opposition during term of opposition