DE69413195D1 - Verfahren zur Passivierung einer integrierten Schaltung - Google Patents

Verfahren zur Passivierung einer integrierten Schaltung

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Publication number
DE69413195D1
DE69413195D1 DE69413195T DE69413195T DE69413195D1 DE 69413195 D1 DE69413195 D1 DE 69413195D1 DE 69413195 T DE69413195 T DE 69413195T DE 69413195 T DE69413195 T DE 69413195T DE 69413195 D1 DE69413195 D1 DE 69413195D1
Authority
DE
Germany
Prior art keywords
passivation
integrated circuit
integrated
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69413195T
Other languages
English (en)
Other versions
DE69413195T2 (de
Inventor
Keith Winton Michael
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dow Silicones Corp
Original Assignee
Dow Corning Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dow Corning Corp filed Critical Dow Corning Corp
Application granted granted Critical
Publication of DE69413195D1 publication Critical patent/DE69413195D1/de
Publication of DE69413195T2 publication Critical patent/DE69413195T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H01L2924/04944th Group
    • H01L2924/04941TiN
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/049Nitrides composed of metals from groups of the periodic table
    • H01L2924/050414th Group
    • H01L2924/05042Si3N4
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1203Rectifying Diode
    • H01L2924/12036PN diode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
DE69413195T 1993-12-29 1994-12-20 Verfahren zur Passivierung einer integrierten Schaltung Expired - Fee Related DE69413195T2 (de)

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JP2839007B2 (ja) * 1996-04-18 1998-12-16 日本電気株式会社 半導体装置及びその製造方法
US5693565A (en) * 1996-07-15 1997-12-02 Dow Corning Corporation Semiconductor chips suitable for known good die testing
US7759803B2 (en) 2001-07-25 2010-07-20 Rohm Co., Ltd. Semiconductor device and method of manufacturing the same
JP4740536B2 (ja) * 2003-11-26 2011-08-03 ローム株式会社 半導体装置およびその製造方法
CN109427692B (zh) * 2017-08-23 2020-11-20 Tcl科技集团股份有限公司 封装薄膜及其应用

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JPS61259557A (ja) * 1985-05-14 1986-11-17 Nec Corp 半導体装置
JPS6331138A (ja) * 1986-07-24 1988-02-09 Fujitsu Ltd 半導体装置の製造方法
US4756977A (en) * 1986-12-03 1988-07-12 Dow Corning Corporation Multilayer ceramics from hydrogen silsesquioxane
JPH02277242A (ja) * 1989-04-18 1990-11-13 Nec Corp 半導体装置の製造方法
US5136364A (en) * 1991-06-12 1992-08-04 National Semiconductor Corporation Semiconductor die sealing
JPH0582581A (ja) * 1991-09-20 1993-04-02 Fujitsu Ltd 半導体装置の製造方法

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EP0661742A1 (de) 1995-07-05
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DE69413195T2 (de) 1999-05-06
KR100335514B1 (ko) 2002-12-02
KR950021346A (ko) 1995-07-26

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