DE69332496D1 - Verfahren zur Dielektrikim-Entfernung - Google Patents

Verfahren zur Dielektrikim-Entfernung

Info

Publication number
DE69332496D1
DE69332496D1 DE69332496T DE69332496T DE69332496D1 DE 69332496 D1 DE69332496 D1 DE 69332496D1 DE 69332496 T DE69332496 T DE 69332496T DE 69332496 T DE69332496 T DE 69332496T DE 69332496 D1 DE69332496 D1 DE 69332496D1
Authority
DE
Germany
Prior art keywords
removal procedure
dielectric removal
dielectric
procedure
removal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69332496T
Other languages
English (en)
Other versions
DE69332496T2 (de
Inventor
Steven C Hall
Mark I Gardner
Fulford, Jr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of DE69332496D1 publication Critical patent/DE69332496D1/de
Publication of DE69332496T2 publication Critical patent/DE69332496T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/911—Differential oxidation and etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Inorganic Chemistry (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Weting (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Formation Of Insulating Films (AREA)
DE69332496T 1992-09-18 1993-07-01 Verfahren zur Dielektrikim-Entfernung Expired - Lifetime DE69332496T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/947,314 US5350492A (en) 1992-09-18 1992-09-18 Oxide removal method for improvement of subsequently grown oxides

Publications (2)

Publication Number Publication Date
DE69332496D1 true DE69332496D1 (de) 2003-01-02
DE69332496T2 DE69332496T2 (de) 2003-10-09

Family

ID=25485943

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69332496T Expired - Lifetime DE69332496T2 (de) 1992-09-18 1993-07-01 Verfahren zur Dielektrikim-Entfernung

Country Status (4)

Country Link
US (1) US5350492A (de)
EP (1) EP0592071B1 (de)
JP (1) JPH06204203A (de)
DE (1) DE69332496T2 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3006387B2 (ja) * 1993-12-15 2000-02-07 日本電気株式会社 半導体装置およびその製造方法
US5858843A (en) * 1996-09-27 1999-01-12 Intel Corporation Low temperature method of forming gate electrode and gate dielectric
US6613677B1 (en) * 1997-11-28 2003-09-02 Arizona Board Of Regents Long range ordered semiconductor interface phase and oxides
TW379404B (en) * 1997-12-31 2000-01-11 United Semiconductor Corp Manufacturing method of shallow trench isolation
US7273266B2 (en) * 2004-04-14 2007-09-25 Lexmark International, Inc. Micro-fluid ejection assemblies
US9159808B2 (en) * 2009-01-26 2015-10-13 Taiwan Semiconductor Manufacturing Company, Ltd. Selective etch-back process for semiconductor devices
US9018077B2 (en) 2009-04-30 2015-04-28 Arizona Board Of Regents, A Body Corporate Of The State Of Arizona, Acting For And On Behalf Of Arizona State University Methods for wafer bonding, and for nucleating bonding nanophases
WO2013066977A1 (en) 2011-10-31 2013-05-10 Arizona Board Of Regents, A Body Corporate Of The State Of Arizona, Acting For And On Behalf Of Arizona State University Methods for wafer bonding and for nucleating bonding nanophases using wet and steam pressurization
WO2014052476A2 (en) 2012-09-25 2014-04-03 Arizona Board Of Regents, A Body Corporate Of The State Of Arizona, Acting For And On... Methods for wafer bonding, and for nucleating bonding nanophases
CN110323134A (zh) * 2019-07-11 2019-10-11 上海遂泰科技有限公司 一种功率器件的生产工艺方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4472240A (en) * 1981-08-21 1984-09-18 Tokyo Shibaura Denki Kabushiki Kaisha Method for manufacturing semiconductor device
US4539744A (en) * 1984-02-03 1985-09-10 Fairchild Camera & Instrument Corporation Semiconductor planarization process and structures made thereby
US4713329A (en) * 1985-07-22 1987-12-15 Data General Corporation Well mask for CMOS process
US4713307A (en) * 1986-04-11 1987-12-15 Xerox Corporation Organic azo photoconductor imaging members
JPH0272661A (ja) * 1988-09-07 1990-03-12 Mitsubishi Electric Corp 半導体装置の製造方法
JPH088298B2 (ja) * 1988-10-04 1996-01-29 沖電気工業株式会社 半導体素子の製造方法

Also Published As

Publication number Publication date
US5350492A (en) 1994-09-27
EP0592071A2 (de) 1994-04-13
EP0592071A3 (en) 1997-10-08
DE69332496T2 (de) 2003-10-09
JPH06204203A (ja) 1994-07-22
EP0592071B1 (de) 2002-11-20

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Legal Events

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