DE69332059D1 - Datenübertragung zwischen Prozessoren in Mehrprozessorsystemen - Google Patents

Datenübertragung zwischen Prozessoren in Mehrprozessorsystemen

Info

Publication number
DE69332059D1
DE69332059D1 DE69332059T DE69332059T DE69332059D1 DE 69332059 D1 DE69332059 D1 DE 69332059D1 DE 69332059 T DE69332059 T DE 69332059T DE 69332059 T DE69332059 T DE 69332059T DE 69332059 D1 DE69332059 D1 DE 69332059D1
Authority
DE
Germany
Prior art keywords
processors
data transfer
multiprocessor systems
multiprocessor
systems
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69332059T
Other languages
English (en)
Other versions
DE69332059T2 (de
Inventor
Masayuki Ikeda
Shigeru Nagasawa
Naoki Shinjo
Teruo Utsumi
Masami Dewa
Haruhiko Ueno
Kazushige Kobayakawa
Kenichi Ishizaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE69332059D1 publication Critical patent/DE69332059D1/de
Application granted granted Critical
Publication of DE69332059T2 publication Critical patent/DE69332059T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
DE69332059T 1992-12-18 1993-08-24 Datenübertragung zwischen Prozessoren in Mehrprozessorsystemen Expired - Fee Related DE69332059T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4338503A JP2977688B2 (ja) 1992-12-18 1992-12-18 マルチプロセッシング装置、方法、及びこれらに使用するプロセッサ

Publications (2)

Publication Number Publication Date
DE69332059D1 true DE69332059D1 (de) 2002-08-01
DE69332059T2 DE69332059T2 (de) 2002-10-17

Family

ID=18318775

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69332059T Expired - Fee Related DE69332059T2 (de) 1992-12-18 1993-08-24 Datenübertragung zwischen Prozessoren in Mehrprozessorsystemen

Country Status (4)

Country Link
US (1) US5572680A (de)
EP (1) EP0602773B1 (de)
JP (1) JP2977688B2 (de)
DE (1) DE69332059T2 (de)

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JP3560662B2 (ja) * 1994-12-06 2004-09-02 富士通株式会社 並列プロセッサ装置
US5640584A (en) * 1994-12-12 1997-06-17 Ncr Corporation Virtual processor method and apparatus for enhancing parallelism and availability in computer systems
US5764969A (en) * 1995-02-10 1998-06-09 International Business Machines Corporation Method and system for enhanced management operation utilizing intermixed user level and supervisory level instructions with partial concept synchronization
JPH08235141A (ja) * 1995-02-28 1996-09-13 Kofu Nippon Denki Kk 情報処理システム
US5978894A (en) * 1995-11-27 1999-11-02 Hitachi, Ltd. Method of interprocessor data transfer using a network, virtual addresses and paging, a buffer, flags, data transfer status information and user accessible storage areas in main memory
US6615279B1 (en) * 1997-01-29 2003-09-02 Iq Systems Central and distributed script servers in an object oriented processor array
US6567837B1 (en) * 1997-01-29 2003-05-20 Iq Systems Object oriented processor arrays
US6321279B1 (en) * 1998-09-14 2001-11-20 Compaq Computer Corporation System for implementing intelligent I/O processing in a multi-processor system by redirecting I/O messages to a target central processor selected from the multi-processor system
US6466996B1 (en) * 1998-09-14 2002-10-15 Compaq Information Technologies Group, L.P. Method and system for implementing intelligent distributed input-output processing as a software process in a host operating system environment
JP3091184B2 (ja) * 1999-03-03 2000-09-25 株式会社神戸製鋼所 通信システム及び通信装置
AU5805300A (en) 1999-06-10 2001-01-02 Pact Informationstechnologie Gmbh Sequence partitioning in cell structures
US6976258B1 (en) 1999-11-30 2005-12-13 Ensim Corporation Providing quality of service guarantees to virtual hosts
US6754716B1 (en) 2000-02-11 2004-06-22 Ensim Corporation Restricting communication between network devices on a common network
US7343421B1 (en) 2000-02-14 2008-03-11 Digital Asset Enterprises Llc Restricting communication of selected processes to a set of specific network addresses
US6948003B1 (en) 2000-03-15 2005-09-20 Ensim Corporation Enabling a service provider to provide intranet services
US6985937B1 (en) 2000-05-11 2006-01-10 Ensim Corporation Dynamically modifying the resources of a virtual server
US6907421B1 (en) 2000-05-16 2005-06-14 Ensim Corporation Regulating file access rates according to file type
US7143024B1 (en) * 2000-07-07 2006-11-28 Ensim Corporation Associating identifiers with virtual processes
US6909691B1 (en) 2000-08-07 2005-06-21 Ensim Corporation Fairly partitioning resources while limiting the maximum fair share
US8058899B2 (en) 2000-10-06 2011-11-15 Martin Vorbach Logic cell array and bus system
US7219354B1 (en) 2000-12-22 2007-05-15 Ensim Corporation Virtualizing super-user privileges for multiple virtual processes
US9436631B2 (en) 2001-03-05 2016-09-06 Pact Xpp Technologies Ag Chip including memory element storing higher level memory data on a page by page basis
US9250908B2 (en) 2001-03-05 2016-02-02 Pact Xpp Technologies Ag Multi-processor bus and cache interconnection system
US9552047B2 (en) 2001-03-05 2017-01-24 Pact Xpp Technologies Ag Multiprocessor having runtime adjustable clock and clock dependent power supply
US9411532B2 (en) 2001-09-07 2016-08-09 Pact Xpp Technologies Ag Methods and systems for transferring data between a processing device and external devices
US9141390B2 (en) * 2001-03-05 2015-09-22 Pact Xpp Technologies Ag Method of processing data with an array of data processors according to application ID
US10031733B2 (en) 2001-06-20 2018-07-24 Scientia Sol Mentis Ag Method for processing data
US9170812B2 (en) 2002-03-21 2015-10-27 Pact Xpp Technologies Ag Data processing system having integrated pipelined array data processor
EP1537486A1 (de) 2002-09-06 2005-06-08 PACT XPP Technologies AG Rekonfigurierbare sequenzerstruktur
US7584476B2 (en) * 2004-03-04 2009-09-01 International Business Machines Corporation Mechanism for reducing remote memory accesses to shared data in a multi-nodal computer system
CN100382034C (zh) * 2004-09-29 2008-04-16 索尼株式会社 信息处理设备和处理控制方法
JP4982971B2 (ja) * 2004-09-29 2012-07-25 ソニー株式会社 情報処理装置、プロセス制御方法、並びにコンピュータ・プログラム
JP4732823B2 (ja) * 2005-07-26 2011-07-27 株式会社日立産機システム モジュール間通信装置
CN101553780A (zh) * 2006-12-11 2009-10-07 Nxp股份有限公司 Vliw处理器的虚拟功能单元
JP5182792B2 (ja) * 2007-10-07 2013-04-17 アルパイン株式会社 マルチコアプロセッサ制御方法及び装置
US8874786B2 (en) * 2011-10-25 2014-10-28 Dell Products L.P. Network traffic control by association of network packets and processes
WO2015089839A1 (zh) * 2013-12-20 2015-06-25 华为技术有限公司 一种共享队列中的消息处理方法、装置及接收核
KR102509986B1 (ko) 2016-03-28 2023-03-14 삼성전자주식회사 다중 코어 프로세서 및 다중 코어 프로세서를 제어하는 방법

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0814795B2 (ja) * 1986-01-14 1996-02-14 株式会社日立製作所 マルチプロセッサ仮想計算機システム
CA1293819C (en) * 1986-08-29 1991-12-31 Thinking Machines Corporation Very large scale computer
FR2606186B1 (fr) * 1986-10-31 1991-11-29 Thomson Csf Processeur de calcul comportant une pluralite d'etages relies en serie, calculateur et procede de calcul mettant en oeuvre ledit procede
JPH0291747A (ja) * 1988-09-29 1990-03-30 Hitachi Ltd 情報処理装置
JPH02123455A (ja) * 1988-11-02 1990-05-10 Hitachi Ltd マルチプロセッサシステムの再構成方法
US5193202A (en) * 1990-05-29 1993-03-09 Wavetracer, Inc. Processor array with relocated operand physical address generator capable of data transfer to distant physical processor for each virtual processor while simulating dimensionally larger array processor
JPH0478933A (ja) * 1990-07-20 1992-03-12 Fujitsu Ltd 仮想プロセッサによるプログラム処理方式
JPH04367963A (ja) * 1991-06-15 1992-12-21 Hitachi Ltd 共有記憶通信方法
JP3080457B2 (ja) * 1991-12-26 2000-08-28 富士通株式会社 分散アドレス変換方式
US5408647A (en) * 1992-10-02 1995-04-18 Compaq Computer Corporation Automatic logical CPU assignment of physical CPUs

Also Published As

Publication number Publication date
EP0602773A1 (de) 1994-06-22
DE69332059T2 (de) 2002-10-17
JP2977688B2 (ja) 1999-11-15
US5572680A (en) 1996-11-05
EP0602773B1 (de) 2002-06-26
JPH06187301A (ja) 1994-07-08

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee