JP2774734B2
(ja)
*
|
1992-05-26 |
1998-07-09 |
株式会社東芝 |
半導体記憶装置およびその製造方法
|
EP0573728B1
(de)
*
|
1992-06-01 |
1996-01-03 |
STMicroelectronics S.r.l. |
Verfahren zur Herstellung hochintegrierter kontaktloser EPROM's
|
WO1994014196A1
(en)
*
|
1992-12-08 |
1994-06-23 |
National Semiconductor Corporation |
High density contactless flash eprom array using channel erase
|
JPH0745730A
(ja)
*
|
1993-02-19 |
1995-02-14 |
Sgs Thomson Microelettronica Spa |
2レベルのポリシリコンeepromメモリ・セル並びにそのプログラミング方法及び製造方法、集積されたeeprom記憶回路、eepromメモリ・セル及びそのプログラミング方法
|
US6110833A
(en)
*
|
1998-03-03 |
2000-08-29 |
Advanced Micro Devices, Inc. |
Elimination of oxynitride (ONO) etch residue and polysilicon stringers through isolation of floating gates on adjacent bitlines by polysilicon oxidation
|
US5623443A
(en)
*
|
1994-03-11 |
1997-04-22 |
Waferscale Integration, Inc. |
Scalable EPROM array with thick and thin non-field oxide gate insulators
|
US5496754A
(en)
*
|
1994-03-15 |
1996-03-05 |
National Semiconductor Corporation |
Method for preventing bit line-to-bit line leakage in the access transistor region of an AMG EPROM
|
US5409854A
(en)
*
|
1994-03-15 |
1995-04-25 |
National Semiconductor Corporation |
Method for forming a virtual-ground flash EPROM array with floating gates that are self aligned to the field oxide regions of the array
|
US5536670A
(en)
*
|
1994-08-09 |
1996-07-16 |
United Microelectronics Corporation |
Process for making a buried bit line memory cell
|
US5574685A
(en)
*
|
1994-09-01 |
1996-11-12 |
Advanced Micro Devices, Inc. |
Self-aligned buried channel/junction stacked gate flash memory cell
|
US5594685A
(en)
*
|
1994-12-16 |
1997-01-14 |
National Semiconductor Corporation |
Method for programming a single EPROM or flash memory cell to store multiple bits of data that utilizes a punchthrough current
|
US5808937A
(en)
*
|
1994-12-16 |
1998-09-15 |
National Semiconductor Corporation |
Self-convergent method for programming FLASH and EEPROM memory cells that moves the threshold voltage from an erased threshold voltage range to one of a plurality of programmed threshold voltage ranges
|
US5550772A
(en)
*
|
1995-02-13 |
1996-08-27 |
National Semiconductor Corporation |
Memory array utilizing multi-state memory cells
|
US5511021A
(en)
*
|
1995-02-22 |
1996-04-23 |
National Semiconductor Corporation |
Method for programming a single EPROM or flash memory cell to store multiple levels of data that utilizes a forward-biased source-to-substrate junction
|
US5557567A
(en)
*
|
1995-04-06 |
1996-09-17 |
National Semiconductor Corp. |
Method for programming an AMG EPROM or flash memory when cells of the array are formed to store multiple bits of data
|
US5587949A
(en)
*
|
1995-04-27 |
1996-12-24 |
National Semiconductor Corporation |
Method for programming an ETOX EPROM or flash memory when cells of the array are formed to store multiple bits of data
|
US5576233A
(en)
*
|
1995-06-21 |
1996-11-19 |
Texas Instruments Incorporated |
Method for making an EEPROM with thermal oxide isolated floating gate
|
JP2850879B2
(ja)
*
|
1995-09-18 |
1999-01-27 |
現代電子産業株式会社 |
半導体素子のワード線製造方法
|
US5753525A
(en)
*
|
1995-12-19 |
1998-05-19 |
International Business Machines Corporation |
Method of making EEPROM cell with improved coupling ratio
|
US5780893A
(en)
*
|
1995-12-28 |
1998-07-14 |
Nippon Steel Corporation |
Non-volatile semiconductor memory device including memory transistor with a composite gate structure
|
JP3075211B2
(ja)
*
|
1996-07-30 |
2000-08-14 |
日本電気株式会社 |
半導体装置およびその製造方法
|
US5861069A
(en)
*
|
1996-08-31 |
1999-01-19 |
Skm Limited |
Method for forming an indium antimonide layer
|
KR100242723B1
(ko)
*
|
1997-08-12 |
2000-02-01 |
윤종용 |
불휘발성 반도체 메모리 장치의 셀 어레이 구조 및 그 제조방법
|
US5899713A
(en)
*
|
1997-10-28 |
1999-05-04 |
International Business Machines Corporation |
Method of making NVRAM cell with planar control gate
|
US5939750A
(en)
|
1998-01-21 |
1999-08-17 |
Advanced Micro Devices |
Use of implanted ions to reduce oxide-nitride-oxide (ONO) etch residue and polystringers
|
US6043120A
(en)
*
|
1998-03-03 |
2000-03-28 |
Advanced Micro Devices, Inc. |
Elimination of oxynitride (ONO) etch residue and polysilicon stringers through isolation of floating gates on adjacent bitlines by polysilicon oxidation
|
US6030868A
(en)
*
|
1998-03-03 |
2000-02-29 |
Advanced Micro Devices, Inc. |
Elimination of oxynitride (ONO) etch residue and polysilicon stringers through isolation of floating gates on adjacent bitlines by polysilicon oxidation
|
US6051451A
(en)
*
|
1998-04-21 |
2000-04-18 |
Advanced Micro Devices, Inc. |
Heavy ion implant process to eliminate polystringers in high density type flash memory devices
|
US6011289A
(en)
*
|
1998-09-16 |
2000-01-04 |
Advanced Micro Devices, Inc. |
Metal oxide stack for flash memory application
|
US6272050B1
(en)
|
1999-05-28 |
2001-08-07 |
Vlsi Technology, Inc. |
Method and apparatus for providing an embedded flash-EEPROM technology
|
US6177703B1
(en)
|
1999-05-28 |
2001-01-23 |
Vlsi Technology, Inc. |
Method and apparatus for producing a single polysilicon flash EEPROM having a select transistor and a floating gate transistor
|
US6225162B1
(en)
|
1999-07-06 |
2001-05-01 |
Taiwan Semiconductor Manufacturing Company |
Step-shaped floating poly-si gate to improve gate coupling ratio for flash memory application
|
US6084262A
(en)
*
|
1999-08-19 |
2000-07-04 |
Worldwide Semiconductor Mfg |
Etox cell programmed by band-to-band tunneling induced substrate hot electron and read by gate induced drain leakage current
|
US6850440B2
(en)
|
1999-12-27 |
2005-02-01 |
Winbond Electronics Corporation |
Method for improved programming efficiency in flash memory cells
|
US6363012B1
(en)
|
1999-12-27 |
2002-03-26 |
Winbond Electronics Corporation |
Method for improved programming efficiency in flash memory cells
|
US6222761B1
(en)
*
|
2000-07-17 |
2001-04-24 |
Microchip Technology Incorporated |
Method for minimizing program disturb in a memory cell
|
JP4819215B2
(ja)
*
|
2000-07-24 |
2011-11-24 |
ルネサスエレクトロニクス株式会社 |
不揮発性半導体記憶装置およびその製造方法
|
US6511882B1
(en)
*
|
2001-11-23 |
2003-01-28 |
Macronix International Co., Ltd. |
Method for preventing the leakage path in embedded non-volatile memory
|
US6716698B1
(en)
*
|
2002-09-10 |
2004-04-06 |
Advanced Micro Devices, Inc. |
Virtual ground silicide bit line process for floating gate flash memory
|
TW591761B
(en)
*
|
2003-07-11 |
2004-06-11 |
Macronix Int Co Ltd |
NAND type binary nitride read only memory and the manufacturing method
|
US7042767B2
(en)
|
2004-08-02 |
2006-05-09 |
Spansion, Llc |
Flash memory unit and method of programming a flash memory device
|
US7416956B2
(en)
*
|
2004-11-23 |
2008-08-26 |
Sandisk Corporation |
Self-aligned trench filling for narrow gap isolation regions
|
US7381615B2
(en)
*
|
2004-11-23 |
2008-06-03 |
Sandisk Corporation |
Methods for self-aligned trench filling with grown dielectric for high coupling ratio in semiconductor devices
|
US20080157169A1
(en)
*
|
2006-12-28 |
2008-07-03 |
Yuan Jack H |
Shield plates for reduced field coupling in nonvolatile memory
|
US20080160680A1
(en)
*
|
2006-12-28 |
2008-07-03 |
Yuan Jack H |
Methods of fabricating shield plates for reduced field coupling in nonvolatile memory
|