DE69315192D1 - Datenverarbeitungssystem und -Verfahren mit einem erweitbaren Register - Google Patents
Datenverarbeitungssystem und -Verfahren mit einem erweitbaren RegisterInfo
- Publication number
- DE69315192D1 DE69315192D1 DE69315192T DE69315192T DE69315192D1 DE 69315192 D1 DE69315192 D1 DE 69315192D1 DE 69315192 T DE69315192 T DE 69315192T DE 69315192 T DE69315192 T DE 69315192T DE 69315192 D1 DE69315192 D1 DE 69315192D1
- Authority
- DE
- Germany
- Prior art keywords
- expandable
- register
- data processing
- processing system
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
- G06F9/342—Extension of operand address space
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30101—Special purpose registers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30105—Register structure
- G06F9/30112—Register structure comprising data of variable length
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Executing Machine-Instructions (AREA)
- Memory System (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/996,744 US5680632A (en) | 1992-12-24 | 1992-12-24 | Method for providing an extensible register in the first and second data processing systems |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69315192D1 true DE69315192D1 (de) | 1997-12-18 |
DE69315192T2 DE69315192T2 (de) | 1998-04-02 |
Family
ID=25543253
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69315192T Expired - Fee Related DE69315192T2 (de) | 1992-12-24 | 1993-11-11 | Datenverarbeitungssystem und -Verfahren mit einem erweitbaren Register |
Country Status (6)
Country | Link |
---|---|
US (1) | US5680632A (de) |
EP (1) | EP0614137B1 (de) |
JP (1) | JP3616402B2 (de) |
KR (1) | KR100287600B1 (de) |
DE (1) | DE69315192T2 (de) |
HK (1) | HK1004611A1 (de) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW267222B (en) * | 1994-10-05 | 1996-01-01 | Ibm | Improved method and system of addressing |
JP2885197B2 (ja) * | 1996-08-16 | 1999-04-19 | 日本電気株式会社 | 演算処理装置及び演算処理方法 |
US5948076A (en) * | 1997-12-31 | 1999-09-07 | Adaptec, Inc. | Method and system for changing peripheral component interconnect configuration registers |
US6366998B1 (en) | 1998-10-14 | 2002-04-02 | Conexant Systems, Inc. | Reconfigurable functional units for implementing a hybrid VLIW-SIMD programming model |
WO2001025941A1 (en) | 1999-10-06 | 2001-04-12 | Cradle Technologies | Multiprocessor computer systems with command fifo buffer at each target device |
WO2001025900A1 (en) | 1999-10-06 | 2001-04-12 | Cradle Technologies | Risc processor using register codes for expanded instruction set |
US6988154B2 (en) | 2000-03-10 | 2006-01-17 | Arc International | Memory interface and method of interfacing between functional entities |
JP2003162411A (ja) * | 2001-11-28 | 2003-06-06 | Hitachi Ltd | データプロセッサ |
US7203820B2 (en) * | 2002-06-28 | 2007-04-10 | Sun Microsystems, Inc. | Extending a register file utilizing stack and queue techniques |
US20040049657A1 (en) | 2002-09-10 | 2004-03-11 | Kling Ralph M. | Extended register space apparatus and methods for processors |
US8464030B2 (en) * | 2010-04-09 | 2013-06-11 | International Business Machines Corporation | Instruction cracking and issue shortening based on instruction base fields, index fields, operand fields, and various other instruction text bits |
US9507599B2 (en) | 2013-07-22 | 2016-11-29 | Globalfoundries Inc. | Instruction set architecture with extensible register addressing |
JP6314717B2 (ja) * | 2014-07-18 | 2018-04-25 | 株式会社安川電機 | ラダープログラム作成装置、モニタリング装置、コンピュータプログラム及び機器制御装置 |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4040035A (en) * | 1974-10-30 | 1977-08-02 | Motorola, Inc. | Microprocessor having index register coupled to serial-coupled address bus sections and to data bus |
US4363091A (en) * | 1978-01-31 | 1982-12-07 | Intel Corporation | Extended address, single and multiple bit microprocessor |
NL7807314A (nl) * | 1978-07-06 | 1980-01-08 | Philips Nv | Inrichting voor het vergroten van de lengte van een logisch computeradres. |
US4240142A (en) * | 1978-12-29 | 1980-12-16 | Bell Telephone Laboratories, Incorporated | Data processing apparatus providing autoincrementing of memory pointer registers |
US4277827A (en) * | 1979-01-02 | 1981-07-07 | Texas Instruments Incorporated | Microprocessor based system for the development and emulation of programmable calculator control read only memory software |
US4300195A (en) * | 1979-08-09 | 1981-11-10 | Motorola, Inc. | CMOS Microprocessor architecture |
US4287566A (en) * | 1979-09-28 | 1981-09-01 | Culler-Harrison Inc. | Array processor with parallel operations per instruction |
US4430705A (en) * | 1980-05-23 | 1984-02-07 | International Business Machines Corp. | Authorization mechanism for establishing addressability to information in another address space |
US4679166A (en) * | 1983-01-17 | 1987-07-07 | Tandy Corporation | Co-processor combination |
US4876639A (en) * | 1983-09-20 | 1989-10-24 | Mensch Jr William D | Method and circuitry for causing sixteen bit microprocessor to execute eight bit op codes to produce either internal sixteen bit operation or internal eight bit operation in accordance with an emulation bit |
US4722047A (en) * | 1985-08-29 | 1988-01-26 | Ncr Corporation | Prefetch circuit and associated method for operation with a virtual command emulator |
US4878197A (en) * | 1987-08-17 | 1989-10-31 | Control Data Corporation | Data communication apparatus |
US5125087A (en) * | 1988-11-07 | 1992-06-23 | Microsoft Corporation | Method of resetting sequence of access to extended memory disrupted by interrupt processing in 80286 compatible system using code segment register |
US5297272A (en) * | 1989-08-02 | 1994-03-22 | Advanced Logic Research, Inc. | Apparatus for automatically disabling and isolating a computer's original processor upon installation of a processor upgrade card |
US5261077A (en) * | 1990-06-29 | 1993-11-09 | Digital Equipment Corporation | Configurable data path arrangement for resolving data type incompatibility |
EP0871108B1 (de) * | 1991-03-11 | 2000-09-13 | MIPS Technologies, Inc. | Rückwärts kompatible Rechnerarchitektur mit erweiterten Wortbreiten und Adressraum |
-
1992
- 1992-12-24 US US07/996,744 patent/US5680632A/en not_active Expired - Fee Related
-
1993
- 1993-11-11 EP EP93118261A patent/EP0614137B1/de not_active Expired - Lifetime
- 1993-11-11 DE DE69315192T patent/DE69315192T2/de not_active Expired - Fee Related
- 1993-12-22 KR KR1019930028977A patent/KR100287600B1/ko not_active IP Right Cessation
- 1993-12-22 JP JP34623293A patent/JP3616402B2/ja not_active Expired - Fee Related
-
1998
- 1998-04-28 HK HK98103584A patent/HK1004611A1/xx not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
DE69315192T2 (de) | 1998-04-02 |
KR100287600B1 (ko) | 2001-04-16 |
JPH06230962A (ja) | 1994-08-19 |
EP0614137B1 (de) | 1997-11-12 |
HK1004611A1 (en) | 1998-11-27 |
EP0614137A2 (de) | 1994-09-07 |
EP0614137A3 (de) | 1995-04-26 |
JP3616402B2 (ja) | 2005-02-02 |
US5680632A (en) | 1997-10-21 |
KR940015806A (ko) | 1994-07-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8328 | Change in the person/name/address of the agent |
Free format text: SCHUMACHER & WILLSAU, PATENTANWALTSSOZIETAET, 80335 MUENCHEN |
|
8327 | Change in the person/name/address of the patent owner |
Owner name: FREESCALE SEMICONDUCTOR, INC., AUSTIN, TEX., US |
|
8339 | Ceased/non-payment of the annual fee |